188 lines
3.9 KiB
C
188 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_ARM_IRQFLAGS_H
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#define __ASM_ARM_IRQFLAGS_H
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#ifdef __KERNEL__
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#include <asm/ptrace.h>
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/*
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* CPU interrupt mask handling.
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*/
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#ifdef CONFIG_CPU_V7M
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#define IRQMASK_REG_NAME_R "primask"
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#define IRQMASK_REG_NAME_W "primask"
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#define IRQMASK_I_BIT 1
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#else
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#define IRQMASK_REG_NAME_R "cpsr"
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#define IRQMASK_REG_NAME_W "cpsr_c"
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#define IRQMASK_I_BIT PSR_I_BIT
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#endif
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#if __LINUX_ARM_ARCH__ >= 6
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#define arch_local_irq_save arch_local_irq_save
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static inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags;
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asm volatile(
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" mrs %0, " IRQMASK_REG_NAME_R " @ arch_local_irq_save\n"
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" cpsid i"
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: "=r" (flags) : : "memory", "cc");
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return flags;
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}
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#define arch_local_irq_enable arch_local_irq_enable
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static inline void arch_local_irq_enable(void)
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{
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asm volatile(
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" cpsie i @ arch_local_irq_enable"
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:
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:
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: "memory", "cc");
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}
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#define arch_local_irq_disable arch_local_irq_disable
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static inline void arch_local_irq_disable(void)
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{
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asm volatile(
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" cpsid i @ arch_local_irq_disable"
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:
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:
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: "memory", "cc");
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}
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#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
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#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
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#ifndef CONFIG_CPU_V7M
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#define local_abt_enable() __asm__("cpsie a @ __sta" : : : "memory", "cc")
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#define local_abt_disable() __asm__("cpsid a @ __cla" : : : "memory", "cc")
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#else
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#define local_abt_enable() do { } while (0)
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#define local_abt_disable() do { } while (0)
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#endif
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#else
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/*
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* Save the current interrupt enable state & disable IRQs
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*/
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#define arch_local_irq_save arch_local_irq_save
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static inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags, temp;
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asm volatile(
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" mrs %0, cpsr @ arch_local_irq_save\n"
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" orr %1, %0, #128\n"
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" msr cpsr_c, %1"
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: "=r" (flags), "=r" (temp)
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:
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: "memory", "cc");
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return flags;
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}
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/*
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* Enable IRQs
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*/
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#define arch_local_irq_enable arch_local_irq_enable
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static inline void arch_local_irq_enable(void)
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{
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unsigned long temp;
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asm volatile(
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" mrs %0, cpsr @ arch_local_irq_enable\n"
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" bic %0, %0, #128\n"
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" msr cpsr_c, %0"
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: "=r" (temp)
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:
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: "memory", "cc");
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}
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/*
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* Disable IRQs
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*/
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#define arch_local_irq_disable arch_local_irq_disable
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static inline void arch_local_irq_disable(void)
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{
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unsigned long temp;
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asm volatile(
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" mrs %0, cpsr @ arch_local_irq_disable\n"
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" orr %0, %0, #128\n"
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" msr cpsr_c, %0"
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: "=r" (temp)
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:
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: "memory", "cc");
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}
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/*
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* Enable FIQs
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*/
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#define local_fiq_enable() \
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({ \
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unsigned long temp; \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ stf\n" \
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" bic %0, %0, #64\n" \
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" msr cpsr_c, %0" \
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: "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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/*
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* Disable FIQs
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*/
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#define local_fiq_disable() \
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({ \
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unsigned long temp; \
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__asm__ __volatile__( \
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"mrs %0, cpsr @ clf\n" \
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" orr %0, %0, #64\n" \
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" msr cpsr_c, %0" \
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: "=r" (temp) \
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: \
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: "memory", "cc"); \
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})
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#define local_abt_enable() do { } while (0)
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#define local_abt_disable() do { } while (0)
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#endif
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/*
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* Save the current interrupt enable state.
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*/
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#define arch_local_save_flags arch_local_save_flags
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static inline unsigned long arch_local_save_flags(void)
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{
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unsigned long flags;
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asm volatile(
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" mrs %0, " IRQMASK_REG_NAME_R " @ local_save_flags"
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: "=r" (flags) : : "memory", "cc");
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return flags;
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}
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/*
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* restore saved IRQ & FIQ state
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*/
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#define arch_local_irq_restore arch_local_irq_restore
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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asm volatile(
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" msr " IRQMASK_REG_NAME_W ", %0 @ local_irq_restore"
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:
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: "r" (flags)
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: "memory", "cc");
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}
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#define arch_irqs_disabled_flags arch_irqs_disabled_flags
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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return flags & IRQMASK_I_BIT;
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}
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#include <asm-generic/irqflags.h>
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#endif /* ifdef __KERNEL__ */
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#endif /* ifndef __ASM_ARM_IRQFLAGS_H */
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