348 lines
6.4 KiB
Plaintext
348 lines
6.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the iWave-RZ/G1H Qseven board development
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* platform with camera daughter board
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*
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* Copyright (C) 2020 Renesas Electronics Corp.
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*/
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/dts-v1/;
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#include "r8a7742-iwg21d-q7.dts"
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/ {
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model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
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compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
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aliases {
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serial0 = &scif0;
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serial1 = &scif1;
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serial3 = &scifb1;
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serial5 = &hscif0;
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ethernet1 = ðer;
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};
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mclk_cam1: mclk-cam1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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};
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mclk_cam2: mclk-cam2 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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};
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mclk_cam3: mclk-cam3 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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};
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mclk_cam4: mclk-cam4 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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};
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reg_1p8v: 1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1P8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_2p8v: 2p8v {
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compatible = "regulator-fixed";
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regulator-name = "2P8V";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-always-on;
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};
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};
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&avb {
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/* Pins shared with VIN0, keep status disabled */
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status = "disabled";
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};
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&can0 {
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pinctrl-0 = <&can0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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ðer {
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pinctrl-0 = <ðer_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy1>;
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renesas,ether-link-active-low;
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status = "okay";
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phy1: ethernet-phy@1 {
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compatible = "ethernet-phy-id0022.1560",
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"ethernet-phy-ieee802.3-c22";
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reg = <1>;
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micrel,led-mode = <1>;
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};
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};
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&gpio0 {
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/* Disable hogging GP0_18 to output LOW */
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/delete-node/ qspi-en-hog;
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/* Hog GP0_18 to output HIGH to enable VIN2 */
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vin2-en-hog {
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gpio-hog;
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gpios = <18 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "VIN2_EN";
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};
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};
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&hscif0 {
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pinctrl-0 = <&hscif0_pins>;
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pinctrl-names = "default";
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uart-has-rtscts;
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status = "okay";
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};
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&i2c1 {
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pinctrl-0 = <&i2c1_pins>;
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pinctrl-names = "default";
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/* status set to "okay" when needed by camera configuration below */
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clock-frequency = <400000>;
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};
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&i2c3 {
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pinctrl-0 = <&i2c3_pins>;
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pinctrl-names = "default";
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/* status set to "okay" when needed by camera configuration below */
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clock-frequency = <400000>;
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};
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&pfc {
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can0_pins: can0 {
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groups = "can0_data_d";
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function = "can0";
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};
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ether_pins: ether {
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groups = "eth_mdio", "eth_rmii";
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function = "eth";
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};
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hscif0_pins: hscif0 {
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groups = "hscif0_data", "hscif0_ctrl";
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function = "hscif0";
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};
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i2c1_pins: i2c1 {
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groups = "i2c1_c";
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function = "i2c1";
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};
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i2c3_pins: i2c3 {
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groups = "i2c3";
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function = "i2c3";
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};
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scif0_pins: scif0 {
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groups = "scif0_data";
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function = "scif0";
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};
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scif1_pins: scif1 {
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groups = "scif1_data";
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function = "scif1";
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};
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scifb1_pins: scifb1 {
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groups = "scifb1_data";
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function = "scifb1";
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};
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vin0_8bit_pins: vin0 {
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groups = "vin0_data8", "vin0_clk", "vin0_sync";
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function = "vin0";
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};
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vin1_8bit_pins: vin1 {
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groups = "vin1_data8_b", "vin1_clk_b", "vin1_sync_b";
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function = "vin1";
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};
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vin2_pins: vin2 {
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groups = "vin2_g8", "vin2_clk";
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function = "vin2";
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};
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vin3_pins: vin3 {
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groups = "vin3_data8", "vin3_clk", "vin3_sync";
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function = "vin3";
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};
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};
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&qspi {
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/* Pins shared with VIN2, keep status disabled */
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status = "disabled";
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};
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&scif0 {
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pinctrl-0 = <&scif0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&scif1 {
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pinctrl-0 = <&scif1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&scifb1 {
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pinctrl-0 = <&scifb1_pins>;
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pinctrl-names = "default";
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status = "okay";
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rts-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
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cts-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
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};
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/*
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* Below configuration ties VINx endpoints to ov5640/ov7725 camera endpoints
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*
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* (un)comment the #include statements to change configuration
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*/
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/* 8bit CMOS Camera 1 (J13) */
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#define CAM_PARENT_I2C i2c0
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#define MCLK_CAM mclk_cam1
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#define CAM_EP cam0ep
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#define VIN_EP vin0ep
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#undef CAM_ENABLED
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#include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
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//#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
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#ifdef CAM_ENABLED
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&vin0 {
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/*
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* Set SW2 switch on the SOM to 'ON'
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* Set SW1 switch on camera board to 'OFF' as we are using 8bit mode
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*/
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status = "okay";
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pinctrl-0 = <&vin0_8bit_pins>;
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pinctrl-names = "default";
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port {
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vin0ep: endpoint {
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remote-endpoint = <&cam0ep>;
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bus-width = <8>;
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bus-type = <6>;
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};
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};
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};
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#endif /* CAM_ENABLED */
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#undef CAM_PARENT_I2C
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#undef MCLK_CAM
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#undef CAM_EP
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#undef VIN_EP
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/* 8bit CMOS Camera 2 (J14) */
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#define CAM_PARENT_I2C i2c1
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#define MCLK_CAM mclk_cam2
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#define CAM_EP cam1ep
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#define VIN_EP vin1ep
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#undef CAM_ENABLED
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#include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
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//#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
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#ifdef CAM_ENABLED
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&vin1 {
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/* Set SW1 switch on the SOM to 'ON' */
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status = "okay";
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pinctrl-0 = <&vin1_8bit_pins>;
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pinctrl-names = "default";
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port {
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vin1ep: endpoint {
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remote-endpoint = <&cam1ep>;
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bus-width = <8>;
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bus-type = <6>;
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};
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};
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};
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#endif /* CAM_ENABLED */
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#undef CAM_PARENT_I2C
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#undef MCLK_CAM
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#undef CAM_EP
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#undef VIN_EP
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/* 8bit CMOS Camera 3 (J12) */
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#define CAM_PARENT_I2C i2c2
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#define MCLK_CAM mclk_cam3
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#define CAM_EP cam2ep
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#define VIN_EP vin2ep
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#undef CAM_ENABLED
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#include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
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//#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
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#ifdef CAM_ENABLED
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&vin2 {
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status = "okay";
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pinctrl-0 = <&vin2_pins>;
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pinctrl-names = "default";
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port {
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vin2ep: endpoint {
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remote-endpoint = <&cam2ep>;
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bus-width = <8>;
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data-shift = <8>;
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bus-type = <6>;
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};
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};
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};
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#endif /* CAM_ENABLED */
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#undef CAM_PARENT_I2C
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#undef MCLK_CAM
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#undef CAM_EP
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#undef VIN_EP
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/* 8bit CMOS Camera 4 (J11) */
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#define CAM_PARENT_I2C i2c3
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#define MCLK_CAM mclk_cam4
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#define CAM_EP cam3ep
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#define VIN_EP vin3ep
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#undef CAM_ENABLED
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#include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
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//#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
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#ifdef CAM_ENABLED
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&vin3 {
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status = "okay";
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pinctrl-0 = <&vin3_pins>;
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pinctrl-names = "default";
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port {
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vin3ep: endpoint {
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remote-endpoint = <&cam3ep>;
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bus-width = <8>;
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bus-type = <6>;
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};
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};
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};
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#endif /* CAM_ENABLED */
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#undef CAM_PARENT_I2C
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#undef MCLK_CAM
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#undef CAM_EP
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#undef VIN_EP
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