139 lines
2.6 KiB
Plaintext
139 lines
2.6 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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interrupt-parent = <&gic>;
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#address-cells = <1>;
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#size-cells = <1>;
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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npu_binary@84000000 {
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no-map;
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reg = <0x84000000 0xA00000>;
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};
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npu_flag@84B0000 {
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no-map;
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reg = <0x84B00000 0x100000>;
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};
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npu_pkt@85000000 {
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no-map;
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reg = <0x85000000 0x1A00000>;
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};
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npu_phyaddr@86B00000 {
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no-map;
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reg = <0x86B00000 0x100000>;
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};
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npu_rxdesc@86D00000 {
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no-map;
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reg = <0x86D00000 0x100000>;
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};
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&cpu0>;
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};
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core1 {
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cpu = <&cpu1>;
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};
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};
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};
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0>;
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enable-method = "psci";
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clock-frequency = <80000000>;
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next-level-cache = <&L2_0>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x1>;
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enable-method = "psci";
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clock-frequency = <80000000>;
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next-level-cache = <&L2_0>;
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};
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L2_0: l2-cache0 {
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compatible = "cache";
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};
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};
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gic: interrupt-controller@9000000 {
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compatible = "arm,gic-v3";
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interrupt-controller;
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#interrupt-cells = <3>;
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x09000000 0x20000>,
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<0x09080000 0x80000>,
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<0x09400000 0x2000>,
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<0x09500000 0x2000>,
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<0x09600000 0x20000>;
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interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&gic>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
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};
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uart1: serial@1fbf0000 {
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compatible = "ns16550";
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reg = <0x1fbf0000 0x30>;
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reg-io-width = <4>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <1843200>;
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status = "okay";
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};
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gpio0: gpio@1fbf0200 {
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compatible = "airoha,en7523-gpio";
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reg = <0x1fbf0204 0x4>,
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<0x1fbf0200 0x4>,
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<0x1fbf0220 0x4>,
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<0x1fbf0214 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio1: gpio@1fbf0270 {
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compatible = "airoha,en7523-gpio";
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reg = <0x1fbf0270 0x4>,
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<0x1fbf0260 0x4>,
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<0x1fbf0264 0x4>,
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<0x1fbf0278 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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