992 lines
26 KiB
C
992 lines
26 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2011-2014, Intel Corporation.
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*/
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#ifndef _NVME_H
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#define _NVME_H
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#include <linux/nvme.h>
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#include <linux/cdev.h>
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#include <linux/pci.h>
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#include <linux/kref.h>
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#include <linux/blk-mq.h>
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#include <linux/sed-opal.h>
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#include <linux/fault-inject.h>
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#include <linux/rcupdate.h>
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#include <linux/wait.h>
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#include <linux/t10-pi.h>
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#include <trace/events/block.h>
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extern unsigned int nvme_io_timeout;
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#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
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extern unsigned int admin_timeout;
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#define NVME_ADMIN_TIMEOUT (admin_timeout * HZ)
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#define NVME_DEFAULT_KATO 5
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#ifdef CONFIG_ARCH_NO_SG_CHAIN
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#define NVME_INLINE_SG_CNT 0
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#define NVME_INLINE_METADATA_SG_CNT 0
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#else
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#define NVME_INLINE_SG_CNT 2
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#define NVME_INLINE_METADATA_SG_CNT 1
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#endif
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/*
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* Default to a 4K page size, with the intention to update this
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* path in the future to accommodate architectures with differing
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* kernel and IO page sizes.
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*/
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#define NVME_CTRL_PAGE_SHIFT 12
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#define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT)
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extern struct workqueue_struct *nvme_wq;
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extern struct workqueue_struct *nvme_reset_wq;
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extern struct workqueue_struct *nvme_delete_wq;
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/*
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* List of workarounds for devices that required behavior not specified in
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* the standard.
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*/
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enum nvme_quirks {
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/*
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* Prefers I/O aligned to a stripe size specified in a vendor
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* specific Identify field.
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*/
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NVME_QUIRK_STRIPE_SIZE = (1 << 0),
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/*
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* The controller doesn't handle Identify value others than 0 or 1
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* correctly.
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*/
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NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
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/*
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* The controller deterministically returns O's on reads to
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* logical blocks that deallocate was called on.
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*/
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NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
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/*
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* The controller needs a delay before starts checking the device
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* readiness, which is done by reading the NVME_CSTS_RDY bit.
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*/
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NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
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/*
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* APST should not be used.
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*/
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NVME_QUIRK_NO_APST = (1 << 4),
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/*
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* The deepest sleep state should not be used.
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*/
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NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
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/*
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* Set MEDIUM priority on SQ creation
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*/
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NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7),
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/*
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* Ignore device provided subnqn.
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*/
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NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8),
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/*
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* Broken Write Zeroes.
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*/
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NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9),
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/*
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* Force simple suspend/resume path.
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*/
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NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10),
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/*
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* Use only one interrupt vector for all queues
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*/
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NVME_QUIRK_SINGLE_VECTOR = (1 << 11),
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/*
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* Use non-standard 128 bytes SQEs.
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*/
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NVME_QUIRK_128_BYTES_SQES = (1 << 12),
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/*
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* Prevent tag overlap between queues
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*/
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NVME_QUIRK_SHARED_TAGS = (1 << 13),
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/*
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* Don't change the value of the temperature threshold feature
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*/
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NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14),
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/*
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* The controller doesn't handle the Identify Namespace
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* Identification Descriptor list subcommand despite claiming
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* NVMe 1.3 compliance.
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*/
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NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15),
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/*
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* The controller does not properly handle DMA addresses over
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* 48 bits.
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*/
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NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16),
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/*
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* The controller requires the command_id value be be limited, so skip
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* encoding the generation sequence number.
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*/
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NVME_QUIRK_SKIP_CID_GEN = (1 << 17),
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/*
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* Reports garbage in the namespace identifiers (eui64, nguid, uuid).
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*/
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NVME_QUIRK_BOGUS_NID = (1 << 18),
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};
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/*
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* Common request structure for NVMe passthrough. All drivers must have
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* this structure as the first member of their request-private data.
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*/
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struct nvme_request {
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struct nvme_command *cmd;
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union nvme_result result;
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u8 genctr;
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u8 retries;
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u8 flags;
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u16 status;
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struct nvme_ctrl *ctrl;
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};
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/*
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* Mark a bio as coming in through the mpath node.
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*/
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#define REQ_NVME_MPATH REQ_DRV
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enum {
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NVME_REQ_CANCELLED = (1 << 0),
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NVME_REQ_USERCMD = (1 << 1),
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};
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static inline struct nvme_request *nvme_req(struct request *req)
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{
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return blk_mq_rq_to_pdu(req);
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}
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static inline u16 nvme_req_qid(struct request *req)
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{
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if (!req->q->queuedata)
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return 0;
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return req->mq_hctx->queue_num + 1;
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}
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/* The below value is the specific amount of delay needed before checking
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* readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
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* NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
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* found empirically.
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*/
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#define NVME_QUIRK_DELAY_AMOUNT 2300
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/*
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* enum nvme_ctrl_state: Controller state
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*
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* @NVME_CTRL_NEW: New controller just allocated, initial state
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* @NVME_CTRL_LIVE: Controller is connected and I/O capable
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* @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset)
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* @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the
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* transport
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* @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion)
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* @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not
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* disabled/failed immediately. This state comes
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* after all async event processing took place and
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* before ns removal and the controller deletion
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* progress
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* @NVME_CTRL_DEAD: Controller is non-present/unresponsive during
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* shutdown or removal. In this case we forcibly
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* kill all inflight I/O as they have no chance to
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* complete
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*/
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enum nvme_ctrl_state {
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NVME_CTRL_NEW,
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NVME_CTRL_LIVE,
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NVME_CTRL_RESETTING,
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NVME_CTRL_CONNECTING,
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NVME_CTRL_DELETING,
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NVME_CTRL_DELETING_NOIO,
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NVME_CTRL_DEAD,
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};
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struct nvme_fault_inject {
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#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
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struct fault_attr attr;
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struct dentry *parent;
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bool dont_retry; /* DNR, do not retry */
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u16 status; /* status code */
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#endif
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};
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struct nvme_ctrl {
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bool comp_seen;
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enum nvme_ctrl_state state;
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bool identified;
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spinlock_t lock;
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struct mutex scan_lock;
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const struct nvme_ctrl_ops *ops;
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struct request_queue *admin_q;
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struct request_queue *connect_q;
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struct request_queue *fabrics_q;
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struct device *dev;
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int instance;
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int numa_node;
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struct blk_mq_tag_set *tagset;
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struct blk_mq_tag_set *admin_tagset;
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struct list_head namespaces;
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struct rw_semaphore namespaces_rwsem;
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struct device ctrl_device;
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struct device *device; /* char device */
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#ifdef CONFIG_NVME_HWMON
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struct device *hwmon_device;
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#endif
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struct cdev cdev;
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struct work_struct reset_work;
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struct work_struct delete_work;
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wait_queue_head_t state_wq;
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struct nvme_subsystem *subsys;
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struct list_head subsys_entry;
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struct opal_dev *opal_dev;
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char name[12];
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u16 cntlid;
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u32 ctrl_config;
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u16 mtfa;
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u32 queue_count;
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u64 cap;
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u32 max_hw_sectors;
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u32 max_segments;
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u32 max_integrity_segments;
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u32 max_discard_sectors;
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u32 max_discard_segments;
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u32 max_zeroes_sectors;
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#ifdef CONFIG_BLK_DEV_ZONED
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u32 max_zone_append;
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#endif
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u16 crdt[3];
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u16 oncs;
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u16 oacs;
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u16 sqsize;
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u32 max_namespaces;
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atomic_t abort_limit;
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u8 vwc;
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u32 vs;
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u32 sgls;
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u16 kas;
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u8 npss;
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u8 apsta;
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u16 wctemp;
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u16 cctemp;
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u32 oaes;
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u32 aen_result;
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u32 ctratt;
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unsigned int shutdown_timeout;
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unsigned int kato;
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bool subsystem;
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unsigned long quirks;
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struct nvme_id_power_state psd[32];
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struct nvme_effects_log *effects;
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struct xarray cels;
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struct work_struct scan_work;
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struct work_struct async_event_work;
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struct delayed_work ka_work;
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struct delayed_work failfast_work;
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struct nvme_command ka_cmd;
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struct work_struct fw_act_work;
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unsigned long events;
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#ifdef CONFIG_NVME_MULTIPATH
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/* asymmetric namespace access: */
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u8 anacap;
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u8 anatt;
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u32 anagrpmax;
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u32 nanagrpid;
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struct mutex ana_lock;
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struct nvme_ana_rsp_hdr *ana_log_buf;
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size_t ana_log_size;
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struct timer_list anatt_timer;
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struct work_struct ana_work;
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#endif
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/* Power saving configuration */
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u64 ps_max_latency_us;
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bool apst_enabled;
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/* PCIe only: */
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u32 hmpre;
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u32 hmmin;
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u32 hmminds;
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u16 hmmaxd;
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/* Fabrics only */
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u32 ioccsz;
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u32 iorcsz;
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u16 icdoff;
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u16 maxcmd;
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int nr_reconnects;
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unsigned long flags;
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#define NVME_CTRL_FAILFAST_EXPIRED 0
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#define NVME_CTRL_ADMIN_Q_STOPPED 1
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struct nvmf_ctrl_options *opts;
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struct page *discard_page;
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unsigned long discard_page_busy;
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struct nvme_fault_inject fault_inject;
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enum nvme_ctrl_type cntrltype;
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enum nvme_dctype dctype;
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};
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enum nvme_iopolicy {
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NVME_IOPOLICY_NUMA,
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NVME_IOPOLICY_RR,
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};
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struct nvme_subsystem {
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int instance;
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struct device dev;
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/*
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* Because we unregister the device on the last put we need
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* a separate refcount.
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*/
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struct kref ref;
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struct list_head entry;
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struct mutex lock;
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struct list_head ctrls;
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struct list_head nsheads;
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char subnqn[NVMF_NQN_SIZE];
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char serial[20];
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char model[40];
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char firmware_rev[8];
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u8 cmic;
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enum nvme_subsys_type subtype;
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u16 vendor_id;
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u16 awupf; /* 0's based awupf value. */
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struct ida ns_ida;
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#ifdef CONFIG_NVME_MULTIPATH
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enum nvme_iopolicy iopolicy;
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#endif
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};
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/*
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* Container structure for uniqueue namespace identifiers.
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*/
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struct nvme_ns_ids {
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u8 eui64[8];
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u8 nguid[16];
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uuid_t uuid;
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u8 csi;
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};
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/*
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* Anchor structure for namespaces. There is one for each namespace in a
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* NVMe subsystem that any of our controllers can see, and the namespace
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* structure for each controller is chained of it. For private namespaces
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* there is a 1:1 relation to our namespace structures, that is ->list
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* only ever has a single entry for private namespaces.
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*/
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struct nvme_ns_head {
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struct list_head list;
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struct srcu_struct srcu;
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struct nvme_subsystem *subsys;
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unsigned ns_id;
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struct nvme_ns_ids ids;
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struct list_head entry;
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struct kref ref;
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bool shared;
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int instance;
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struct nvme_effects_log *effects;
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struct cdev cdev;
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struct device cdev_device;
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struct gendisk *disk;
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#ifdef CONFIG_NVME_MULTIPATH
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struct bio_list requeue_list;
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spinlock_t requeue_lock;
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struct work_struct requeue_work;
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struct mutex lock;
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unsigned long flags;
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#define NVME_NSHEAD_DISK_LIVE 0
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struct nvme_ns __rcu *current_path[];
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#endif
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};
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static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
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{
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return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
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}
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enum nvme_ns_features {
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NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
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NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
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};
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struct nvme_ns {
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struct list_head list;
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struct nvme_ctrl *ctrl;
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struct request_queue *queue;
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struct gendisk *disk;
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#ifdef CONFIG_NVME_MULTIPATH
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enum nvme_ana_state ana_state;
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u32 ana_grpid;
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#endif
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struct list_head siblings;
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struct kref kref;
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struct nvme_ns_head *head;
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int lba_shift;
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u16 ms;
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u16 pi_size;
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u16 sgs;
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u32 sws;
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u8 pi_type;
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u8 guard_type;
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#ifdef CONFIG_BLK_DEV_ZONED
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u64 zsze;
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#endif
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unsigned long features;
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unsigned long flags;
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#define NVME_NS_REMOVING 0
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#define NVME_NS_DEAD 1
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#define NVME_NS_ANA_PENDING 2
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#define NVME_NS_FORCE_RO 3
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#define NVME_NS_READY 4
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#define NVME_NS_STOPPED 5
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struct cdev cdev;
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struct device cdev_device;
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struct nvme_fault_inject fault_inject;
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};
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/* NVMe ns supports metadata actions by the controller (generate/strip) */
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static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
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{
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return ns->pi_type && ns->ms == ns->pi_size;
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}
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struct nvme_ctrl_ops {
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const char *name;
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struct module *module;
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unsigned int flags;
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#define NVME_F_FABRICS (1 << 0)
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#define NVME_F_METADATA_SUPPORTED (1 << 1)
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#define NVME_F_PCI_P2PDMA (1 << 2)
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int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
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int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
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int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
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void (*free_ctrl)(struct nvme_ctrl *ctrl);
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void (*submit_async_event)(struct nvme_ctrl *ctrl);
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void (*delete_ctrl)(struct nvme_ctrl *ctrl);
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int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
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};
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/*
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* nvme command_id is constructed as such:
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* | xxxx | xxxxxxxxxxxx |
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* gen request tag
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*/
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#define nvme_genctr_mask(gen) (gen & 0xf)
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#define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12)
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#define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12)
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#define nvme_tag_from_cid(cid) (cid & 0xfff)
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static inline u16 nvme_cid(struct request *rq)
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{
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return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
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}
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static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
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u16 command_id)
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{
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u8 genctr = nvme_genctr_from_cid(command_id);
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u16 tag = nvme_tag_from_cid(command_id);
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struct request *rq;
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rq = blk_mq_tag_to_rq(tags, tag);
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if (unlikely(!rq)) {
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pr_err("could not locate request for tag %#x\n",
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tag);
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return NULL;
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}
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if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
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dev_err(nvme_req(rq)->ctrl->device,
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"request %#x genctr mismatch (got %#x expected %#x)\n",
|
|
tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
|
|
return NULL;
|
|
}
|
|
return rq;
|
|
}
|
|
|
|
static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
|
|
u16 command_id)
|
|
{
|
|
return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
|
|
}
|
|
|
|
#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
|
|
void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
|
|
const char *dev_name);
|
|
void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
|
|
void nvme_should_fail(struct request *req);
|
|
#else
|
|
static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
|
|
const char *dev_name)
|
|
{
|
|
}
|
|
static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
|
|
{
|
|
}
|
|
static inline void nvme_should_fail(struct request *req) {}
|
|
#endif
|
|
|
|
static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
|
|
{
|
|
if (!ctrl->subsystem)
|
|
return -ENOTTY;
|
|
return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
|
|
}
|
|
|
|
/*
|
|
* Convert a 512B sector number to a device logical block number.
|
|
*/
|
|
static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
|
|
{
|
|
return sector >> (ns->lba_shift - SECTOR_SHIFT);
|
|
}
|
|
|
|
/*
|
|
* Convert a device logical block number to a 512B sector number.
|
|
*/
|
|
static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
|
|
{
|
|
return lba << (ns->lba_shift - SECTOR_SHIFT);
|
|
}
|
|
|
|
/*
|
|
* Convert byte length to nvme's 0-based num dwords
|
|
*/
|
|
static inline u32 nvme_bytes_to_numd(size_t len)
|
|
{
|
|
return (len >> 2) - 1;
|
|
}
|
|
|
|
static inline bool nvme_is_ana_error(u16 status)
|
|
{
|
|
switch (status & 0x7ff) {
|
|
case NVME_SC_ANA_TRANSITION:
|
|
case NVME_SC_ANA_INACCESSIBLE:
|
|
case NVME_SC_ANA_PERSISTENT_LOSS:
|
|
return true;
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
static inline bool nvme_is_path_error(u16 status)
|
|
{
|
|
/* check for a status code type of 'path related status' */
|
|
return (status & 0x700) == 0x300;
|
|
}
|
|
|
|
/*
|
|
* Fill in the status and result information from the CQE, and then figure out
|
|
* if blk-mq will need to use IPI magic to complete the request, and if yes do
|
|
* so. If not let the caller complete the request without an indirect function
|
|
* call.
|
|
*/
|
|
static inline bool nvme_try_complete_req(struct request *req, __le16 status,
|
|
union nvme_result result)
|
|
{
|
|
struct nvme_request *rq = nvme_req(req);
|
|
struct nvme_ctrl *ctrl = rq->ctrl;
|
|
|
|
if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
|
|
rq->genctr++;
|
|
|
|
rq->status = le16_to_cpu(status) >> 1;
|
|
rq->result = result;
|
|
/* inject error when permitted by fault injection framework */
|
|
nvme_should_fail(req);
|
|
if (unlikely(blk_should_fake_timeout(req->q)))
|
|
return true;
|
|
return blk_mq_complete_request_remote(req);
|
|
}
|
|
|
|
static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
|
|
{
|
|
get_device(ctrl->device);
|
|
}
|
|
|
|
static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
|
|
{
|
|
put_device(ctrl->device);
|
|
}
|
|
|
|
static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
|
|
{
|
|
return !qid &&
|
|
nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
|
|
}
|
|
|
|
void nvme_complete_rq(struct request *req);
|
|
void nvme_complete_batch_req(struct request *req);
|
|
|
|
static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
|
|
void (*fn)(struct request *rq))
|
|
{
|
|
struct request *req;
|
|
|
|
rq_list_for_each(&iob->req_list, req) {
|
|
fn(req);
|
|
nvme_complete_batch_req(req);
|
|
}
|
|
blk_mq_end_request_batch(iob);
|
|
}
|
|
|
|
blk_status_t nvme_host_path_error(struct request *req);
|
|
bool nvme_cancel_request(struct request *req, void *data, bool reserved);
|
|
void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
|
|
void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
|
|
bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
|
|
enum nvme_ctrl_state new_state);
|
|
bool nvme_wait_reset(struct nvme_ctrl *ctrl);
|
|
int nvme_disable_ctrl(struct nvme_ctrl *ctrl);
|
|
int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
|
|
int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
|
|
int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
|
|
const struct nvme_ctrl_ops *ops, unsigned long quirks);
|
|
void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
|
|
void nvme_start_ctrl(struct nvme_ctrl *ctrl);
|
|
void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
|
|
int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl);
|
|
|
|
void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
|
|
|
|
int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
|
|
bool send);
|
|
|
|
void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
|
|
volatile union nvme_result *res);
|
|
|
|
void nvme_stop_queues(struct nvme_ctrl *ctrl);
|
|
void nvme_start_queues(struct nvme_ctrl *ctrl);
|
|
void nvme_stop_admin_queue(struct nvme_ctrl *ctrl);
|
|
void nvme_start_admin_queue(struct nvme_ctrl *ctrl);
|
|
void nvme_kill_queues(struct nvme_ctrl *ctrl);
|
|
void nvme_sync_queues(struct nvme_ctrl *ctrl);
|
|
void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
|
|
void nvme_unfreeze(struct nvme_ctrl *ctrl);
|
|
void nvme_wait_freeze(struct nvme_ctrl *ctrl);
|
|
int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
|
|
void nvme_start_freeze(struct nvme_ctrl *ctrl);
|
|
|
|
static inline unsigned int nvme_req_op(struct nvme_command *cmd)
|
|
{
|
|
return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
|
|
}
|
|
|
|
#define NVME_QID_ANY -1
|
|
void nvme_init_request(struct request *req, struct nvme_command *cmd);
|
|
void nvme_cleanup_cmd(struct request *req);
|
|
blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
|
|
blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
|
|
struct request *req);
|
|
bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
|
|
bool queue_live);
|
|
|
|
static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
|
|
bool queue_live)
|
|
{
|
|
if (likely(ctrl->state == NVME_CTRL_LIVE))
|
|
return true;
|
|
if (ctrl->ops->flags & NVME_F_FABRICS &&
|
|
ctrl->state == NVME_CTRL_DELETING)
|
|
return queue_live;
|
|
return __nvme_check_ready(ctrl, rq, queue_live);
|
|
}
|
|
|
|
/*
|
|
* NSID shall be unique for all shared namespaces, or if at least one of the
|
|
* following conditions is met:
|
|
* 1. Namespace Management is supported by the controller
|
|
* 2. ANA is supported by the controller
|
|
* 3. NVM Set are supported by the controller
|
|
*
|
|
* In other case, private namespace are not required to report a unique NSID.
|
|
*/
|
|
static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
|
|
struct nvme_ns_head *head)
|
|
{
|
|
return head->shared ||
|
|
(ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
|
|
(ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
|
|
(ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
|
|
}
|
|
|
|
int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
|
|
void *buf, unsigned bufflen);
|
|
int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
|
|
union nvme_result *result, void *buffer, unsigned bufflen,
|
|
unsigned timeout, int qid, int at_head,
|
|
blk_mq_req_flags_t flags);
|
|
int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
|
|
unsigned int dword11, void *buffer, size_t buflen,
|
|
u32 *result);
|
|
int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
|
|
unsigned int dword11, void *buffer, size_t buflen,
|
|
u32 *result);
|
|
int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
|
|
void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
|
|
int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
|
|
int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
|
|
int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
|
|
int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
|
|
void nvme_queue_scan(struct nvme_ctrl *ctrl);
|
|
int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
|
|
void *log, size_t size, u64 offset);
|
|
bool nvme_tryget_ns_head(struct nvme_ns_head *head);
|
|
void nvme_put_ns_head(struct nvme_ns_head *head);
|
|
int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
|
|
const struct file_operations *fops, struct module *owner);
|
|
void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
|
|
int nvme_ioctl(struct block_device *bdev, fmode_t mode,
|
|
unsigned int cmd, unsigned long arg);
|
|
long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
|
|
int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode,
|
|
unsigned int cmd, unsigned long arg);
|
|
long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
|
|
unsigned long arg);
|
|
long nvme_dev_ioctl(struct file *file, unsigned int cmd,
|
|
unsigned long arg);
|
|
int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
|
|
|
|
extern const struct attribute_group *nvme_ns_id_attr_groups[];
|
|
extern const struct pr_ops nvme_pr_ops;
|
|
extern const struct block_device_operations nvme_ns_head_ops;
|
|
|
|
struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
|
|
#ifdef CONFIG_NVME_MULTIPATH
|
|
static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
|
|
{
|
|
return ctrl->ana_log_buf != NULL;
|
|
}
|
|
|
|
void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
|
|
void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
|
|
void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
|
|
void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
|
|
void nvme_failover_req(struct request *req);
|
|
void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
|
|
int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
|
|
void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id);
|
|
void nvme_mpath_remove_disk(struct nvme_ns_head *head);
|
|
int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
|
|
void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
|
|
void nvme_mpath_update(struct nvme_ctrl *ctrl);
|
|
void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
|
|
void nvme_mpath_stop(struct nvme_ctrl *ctrl);
|
|
bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
|
|
void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
|
|
void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
|
|
void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
|
|
|
|
static inline void nvme_trace_bio_complete(struct request *req)
|
|
{
|
|
struct nvme_ns *ns = req->q->queuedata;
|
|
|
|
if (req->cmd_flags & REQ_NVME_MPATH)
|
|
trace_block_bio_complete(ns->head->disk->queue, req->bio);
|
|
}
|
|
|
|
extern bool multipath;
|
|
extern struct device_attribute dev_attr_ana_grpid;
|
|
extern struct device_attribute dev_attr_ana_state;
|
|
extern struct device_attribute subsys_attr_iopolicy;
|
|
|
|
#else
|
|
#define multipath false
|
|
static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
|
|
{
|
|
return false;
|
|
}
|
|
static inline void nvme_failover_req(struct request *req)
|
|
{
|
|
}
|
|
static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
|
|
{
|
|
}
|
|
static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
|
|
struct nvme_ns_head *head)
|
|
{
|
|
return 0;
|
|
}
|
|
static inline void nvme_mpath_add_disk(struct nvme_ns *ns,
|
|
struct nvme_id_ns *id)
|
|
{
|
|
}
|
|
static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
|
|
{
|
|
}
|
|
static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
|
|
{
|
|
return false;
|
|
}
|
|
static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
|
|
{
|
|
}
|
|
static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
|
|
{
|
|
}
|
|
static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
|
|
{
|
|
}
|
|
static inline void nvme_trace_bio_complete(struct request *req)
|
|
{
|
|
}
|
|
static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
|
|
{
|
|
}
|
|
static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
|
|
struct nvme_id_ctrl *id)
|
|
{
|
|
if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
|
|
dev_warn(ctrl->device,
|
|
"Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
|
|
return 0;
|
|
}
|
|
static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
|
|
{
|
|
}
|
|
static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
|
|
{
|
|
}
|
|
static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
|
|
{
|
|
}
|
|
static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
|
|
{
|
|
}
|
|
static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
|
|
{
|
|
}
|
|
static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
|
|
{
|
|
}
|
|
static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
|
|
{
|
|
}
|
|
#endif /* CONFIG_NVME_MULTIPATH */
|
|
|
|
int nvme_revalidate_zones(struct nvme_ns *ns);
|
|
int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
|
|
unsigned int nr_zones, report_zones_cb cb, void *data);
|
|
#ifdef CONFIG_BLK_DEV_ZONED
|
|
int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
|
|
blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
|
|
struct nvme_command *cmnd,
|
|
enum nvme_zone_mgmt_action action);
|
|
#else
|
|
static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
|
|
struct request *req, struct nvme_command *cmnd,
|
|
enum nvme_zone_mgmt_action action)
|
|
{
|
|
return BLK_STS_NOTSUPP;
|
|
}
|
|
|
|
static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
|
|
{
|
|
dev_warn(ns->ctrl->device,
|
|
"Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
|
|
return -EPROTONOSUPPORT;
|
|
}
|
|
#endif
|
|
|
|
static inline int nvme_ctrl_init_connect_q(struct nvme_ctrl *ctrl)
|
|
{
|
|
ctrl->connect_q = blk_mq_init_queue(ctrl->tagset);
|
|
if (IS_ERR(ctrl->connect_q))
|
|
return PTR_ERR(ctrl->connect_q);
|
|
return 0;
|
|
}
|
|
|
|
static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
|
|
{
|
|
return dev_to_disk(dev)->private_data;
|
|
}
|
|
|
|
#ifdef CONFIG_NVME_HWMON
|
|
int nvme_hwmon_init(struct nvme_ctrl *ctrl);
|
|
void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
|
|
#else
|
|
static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
|
|
{
|
|
}
|
|
#endif
|
|
|
|
static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
|
|
{
|
|
return ctrl->sgls & ((1 << 0) | (1 << 1));
|
|
}
|
|
|
|
u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
|
|
u8 opcode);
|
|
int nvme_execute_passthru_rq(struct request *rq);
|
|
struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
|
|
struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
|
|
void nvme_put_ns(struct nvme_ns *ns);
|
|
|
|
static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
|
|
{
|
|
return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
|
|
}
|
|
|
|
#ifdef CONFIG_NVME_VERBOSE_ERRORS
|
|
const unsigned char *nvme_get_error_status_str(u16 status);
|
|
const unsigned char *nvme_get_opcode_str(u8 opcode);
|
|
const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
|
|
#else /* CONFIG_NVME_VERBOSE_ERRORS */
|
|
static inline const unsigned char *nvme_get_error_status_str(u16 status)
|
|
{
|
|
return "I/O Error";
|
|
}
|
|
static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
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|
{
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|
return "I/O Cmd";
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|
}
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static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
|
|
{
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|
return "Admin Cmd";
|
|
}
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#endif /* CONFIG_NVME_VERBOSE_ERRORS */
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#endif /* _NVME_H */
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