442 lines
10 KiB
C
442 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* SMP support for PowerNV machines.
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*
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* Copyright 2011 IBM Corp.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/sched/hotplug.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/cpu.h>
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#include <asm/irq.h>
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#include <asm/smp.h>
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#include <asm/paca.h>
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#include <asm/machdep.h>
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#include <asm/cputable.h>
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#include <asm/firmware.h>
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#include <asm/vdso_datapage.h>
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#include <asm/cputhreads.h>
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#include <asm/xics.h>
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#include <asm/xive.h>
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#include <asm/opal.h>
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#include <asm/runlatch.h>
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#include <asm/code-patching.h>
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#include <asm/dbell.h>
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#include <asm/kvm_ppc.h>
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#include <asm/ppc-opcode.h>
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#include <asm/cpuidle.h>
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#include <asm/kexec.h>
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#include <asm/reg.h>
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#include <asm/powernv.h>
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#include "powernv.h"
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#ifdef DEBUG
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#include <asm/udbg.h>
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...) do { } while (0)
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#endif
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static void pnv_smp_setup_cpu(int cpu)
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{
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/*
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* P9 workaround for CI vector load (see traps.c),
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* enable the corresponding HMI interrupt
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*/
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if (pvr_version_is(PVR_POWER9))
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mtspr(SPRN_HMEER, mfspr(SPRN_HMEER) | PPC_BIT(17));
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if (xive_enabled())
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xive_smp_setup_cpu();
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else if (cpu != boot_cpuid)
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xics_setup_cpu();
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}
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static int pnv_smp_kick_cpu(int nr)
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{
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unsigned int pcpu;
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unsigned long start_here =
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__pa(ppc_function_entry(generic_secondary_smp_init));
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long rc;
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uint8_t status;
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if (nr < 0 || nr >= nr_cpu_ids)
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return -EINVAL;
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pcpu = get_hard_smp_processor_id(nr);
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/*
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* If we already started or OPAL is not supported, we just
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* kick the CPU via the PACA
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*/
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if (paca_ptrs[nr]->cpu_start || !firmware_has_feature(FW_FEATURE_OPAL))
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goto kick;
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/*
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* At this point, the CPU can either be spinning on the way in
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* from kexec or be inside OPAL waiting to be started for the
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* first time. OPAL v3 allows us to query OPAL to know if it
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* has the CPUs, so we do that
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*/
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rc = opal_query_cpu_status(pcpu, &status);
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if (rc != OPAL_SUCCESS) {
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pr_warn("OPAL Error %ld querying CPU %d state\n", rc, nr);
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return -ENODEV;
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}
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/*
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* Already started, just kick it, probably coming from
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* kexec and spinning
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*/
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if (status == OPAL_THREAD_STARTED)
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goto kick;
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/*
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* Available/inactive, let's kick it
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*/
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if (status == OPAL_THREAD_INACTIVE) {
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pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
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rc = opal_start_cpu(pcpu, start_here);
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if (rc != OPAL_SUCCESS) {
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pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr);
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return -ENODEV;
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}
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} else {
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/*
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* An unavailable CPU (or any other unknown status)
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* shouldn't be started. It should also
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* not be in the possible map but currently it can
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* happen
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*/
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pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
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" (status %d)...\n", nr, pcpu, status);
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return -ENODEV;
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}
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kick:
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return smp_generic_kick_cpu(nr);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int pnv_smp_cpu_disable(void)
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{
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int cpu = smp_processor_id();
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/* This is identical to pSeries... might consolidate by
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* moving migrate_irqs_away to a ppc_md with default to
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* the generic fixup_irqs. --BenH.
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*/
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set_cpu_online(cpu, false);
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vdso_data->processorCount--;
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if (cpu == boot_cpuid)
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boot_cpuid = cpumask_any(cpu_online_mask);
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if (xive_enabled())
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xive_smp_disable_cpu();
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else
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xics_migrate_irqs_away();
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cleanup_cpu_mmu_context();
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return 0;
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}
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static void pnv_flush_interrupts(void)
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{
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if (cpu_has_feature(CPU_FTR_ARCH_300)) {
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if (xive_enabled())
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xive_flush_interrupt();
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else
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icp_opal_flush_interrupt();
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} else {
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icp_native_flush_interrupt();
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}
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}
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static void pnv_cpu_offline_self(void)
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{
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unsigned long srr1, unexpected_mask, wmask;
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unsigned int cpu;
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u64 lpcr_val;
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/* Standard hot unplug procedure */
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idle_task_exit();
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cpu = smp_processor_id();
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DBG("CPU%d offline\n", cpu);
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generic_set_cpu_dead(cpu);
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smp_wmb();
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wmask = SRR1_WAKEMASK;
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if (cpu_has_feature(CPU_FTR_ARCH_207S))
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wmask = SRR1_WAKEMASK_P8;
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/*
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* This turns the irq soft-disabled state we're called with, into a
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* hard-disabled state with pending irq_happened interrupts cleared.
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*
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* PACA_IRQ_DEC - Decrementer should be ignored.
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* PACA_IRQ_HMI - Can be ignored, processing is done in real mode.
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* PACA_IRQ_DBELL, EE, PMI - Unexpected.
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*/
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hard_irq_disable();
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if (generic_check_cpu_restart(cpu))
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goto out;
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unexpected_mask = ~(PACA_IRQ_DEC | PACA_IRQ_HMI | PACA_IRQ_HARD_DIS);
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if (local_paca->irq_happened & unexpected_mask) {
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if (local_paca->irq_happened & PACA_IRQ_EE)
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pnv_flush_interrupts();
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DBG("CPU%d Unexpected exit while offline irq_happened=%lx!\n",
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cpu, local_paca->irq_happened);
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}
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local_paca->irq_happened = PACA_IRQ_HARD_DIS;
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/*
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* We don't want to take decrementer interrupts while we are
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* offline, so clear LPCR:PECE1. We keep PECE2 (and
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* LPCR_PECE_HVEE on P9) enabled so as to let IPIs in.
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*
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* If the CPU gets woken up by a special wakeup, ensure that
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* the SLW engine sets LPCR with decrementer bit cleared, else
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* the CPU will come back to the kernel due to a spurious
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* wakeup.
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*/
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lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1;
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pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
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while (!generic_check_cpu_restart(cpu)) {
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/*
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* Clear IPI flag, since we don't handle IPIs while
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* offline, except for those when changing micro-threading
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* mode, which are handled explicitly below, and those
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* for coming online, which are handled via
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* generic_check_cpu_restart() calls.
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*/
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kvmppc_clear_host_ipi(cpu);
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srr1 = pnv_cpu_offline(cpu);
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WARN_ON_ONCE(!irqs_disabled());
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WARN_ON(lazy_irq_pending());
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/*
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* If the SRR1 value indicates that we woke up due to
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* an external interrupt, then clear the interrupt.
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* We clear the interrupt before checking for the
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* reason, so as to avoid a race where we wake up for
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* some other reason, find nothing and clear the interrupt
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* just as some other cpu is sending us an interrupt.
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* If we returned from power7_nap as a result of
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* having finished executing in a KVM guest, then srr1
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* contains 0.
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*/
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if (((srr1 & wmask) == SRR1_WAKEEE) ||
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((srr1 & wmask) == SRR1_WAKEHVI)) {
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pnv_flush_interrupts();
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} else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
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unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
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asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
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} else if ((srr1 & wmask) == SRR1_WAKERESET) {
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irq_set_pending_from_srr1(srr1);
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/* Does not return */
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}
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smp_mb();
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/*
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* For kdump kernels, we process the ipi and jump to
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* crash_ipi_callback
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*/
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if (kdump_in_progress()) {
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/*
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* If we got to this point, we've not used
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* NMI's, otherwise we would have gone
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* via the SRR1_WAKERESET path. We are
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* using regular IPI's for waking up offline
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* threads.
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*/
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struct pt_regs regs;
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ppc_save_regs(®s);
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crash_ipi_callback(®s);
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/* Does not return */
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}
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if (cpu_core_split_required())
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continue;
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if (srr1 && !generic_check_cpu_restart(cpu))
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DBG("CPU%d Unexpected exit while offline srr1=%lx!\n",
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cpu, srr1);
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}
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/*
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* Re-enable decrementer interrupts in LPCR.
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*
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* Further, we want stop states to be woken up by decrementer
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* for non-hotplug cases. So program the LPCR via stop api as
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* well.
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*/
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lpcr_val = mfspr(SPRN_LPCR) | (u64)LPCR_PECE1;
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pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
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out:
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DBG("CPU%d coming online...\n", cpu);
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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static int pnv_cpu_bootable(unsigned int nr)
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{
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/*
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* Starting with POWER8, the subcore logic relies on all threads of a
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* core being booted so that they can participate in split mode
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* switches. So on those machines we ignore the smt_enabled_at_boot
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* setting (smt-enabled on the kernel command line).
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*/
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if (cpu_has_feature(CPU_FTR_ARCH_207S))
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return 1;
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return smp_generic_cpu_bootable(nr);
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}
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static int pnv_smp_prepare_cpu(int cpu)
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{
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if (xive_enabled())
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return xive_smp_prepare_cpu(cpu);
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return 0;
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}
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/* Cause IPI as setup by the interrupt controller (xics or xive) */
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static void (*ic_cause_ipi)(int cpu);
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static void pnv_cause_ipi(int cpu)
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{
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if (doorbell_try_core_ipi(cpu))
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return;
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ic_cause_ipi(cpu);
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}
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static void __init pnv_smp_probe(void)
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{
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if (xive_enabled())
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xive_smp_probe();
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else
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xics_smp_probe();
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if (cpu_has_feature(CPU_FTR_DBELL)) {
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ic_cause_ipi = smp_ops->cause_ipi;
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WARN_ON(!ic_cause_ipi);
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if (cpu_has_feature(CPU_FTR_ARCH_300))
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smp_ops->cause_ipi = doorbell_global_ipi;
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else
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smp_ops->cause_ipi = pnv_cause_ipi;
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}
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}
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static int pnv_system_reset_exception(struct pt_regs *regs)
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{
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if (smp_handle_nmi_ipi(regs))
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return 1;
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return 0;
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}
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static int pnv_cause_nmi_ipi(int cpu)
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{
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int64_t rc;
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if (cpu >= 0) {
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int h = get_hard_smp_processor_id(cpu);
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if (opal_check_token(OPAL_QUIESCE))
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opal_quiesce(QUIESCE_HOLD, h);
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rc = opal_signal_system_reset(h);
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if (opal_check_token(OPAL_QUIESCE))
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opal_quiesce(QUIESCE_RESUME, h);
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if (rc != OPAL_SUCCESS)
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return 0;
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return 1;
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} else if (cpu == NMI_IPI_ALL_OTHERS) {
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bool success = true;
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int c;
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if (opal_check_token(OPAL_QUIESCE))
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opal_quiesce(QUIESCE_HOLD, -1);
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/*
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* We do not use broadcasts (yet), because it's not clear
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* exactly what semantics Linux wants or the firmware should
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* provide.
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*/
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for_each_online_cpu(c) {
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if (c == smp_processor_id())
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continue;
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rc = opal_signal_system_reset(
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get_hard_smp_processor_id(c));
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if (rc != OPAL_SUCCESS)
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success = false;
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}
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if (opal_check_token(OPAL_QUIESCE))
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opal_quiesce(QUIESCE_RESUME, -1);
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if (success)
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return 1;
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/*
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* Caller will fall back to doorbells, which may pick
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* up the remainders.
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*/
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}
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return 0;
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}
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static struct smp_ops_t pnv_smp_ops = {
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.message_pass = NULL, /* Use smp_muxed_ipi_message_pass */
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.cause_ipi = NULL, /* Filled at runtime by pnv_smp_probe() */
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.cause_nmi_ipi = NULL,
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.probe = pnv_smp_probe,
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.prepare_cpu = pnv_smp_prepare_cpu,
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.kick_cpu = pnv_smp_kick_cpu,
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.setup_cpu = pnv_smp_setup_cpu,
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.cpu_bootable = pnv_cpu_bootable,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = pnv_smp_cpu_disable,
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.cpu_die = generic_cpu_die,
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.cpu_offline_self = pnv_cpu_offline_self,
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#endif /* CONFIG_HOTPLUG_CPU */
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};
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/* This is called very early during platform setup_arch */
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void __init pnv_smp_init(void)
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{
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if (opal_check_token(OPAL_SIGNAL_SYSTEM_RESET)) {
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ppc_md.system_reset_exception = pnv_system_reset_exception;
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pnv_smp_ops.cause_nmi_ipi = pnv_cause_nmi_ipi;
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}
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smp_ops = &pnv_smp_ops;
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#ifdef CONFIG_HOTPLUG_CPU
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#ifdef CONFIG_KEXEC_CORE
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crash_wake_offline = 1;
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#endif
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#endif
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}
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