139 lines
4.1 KiB
C
139 lines
4.1 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_SM8250_H
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#define _DT_BINDINGS_CLK_QCOM_CAM_CC_SM8250_H
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/* CAM_CC clocks */
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#define CAM_CC_BPS_AHB_CLK 0
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#define CAM_CC_BPS_AREG_CLK 1
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#define CAM_CC_BPS_AXI_CLK 2
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#define CAM_CC_BPS_CLK 3
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#define CAM_CC_BPS_CLK_SRC 4
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#define CAM_CC_CAMNOC_AXI_CLK 5
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#define CAM_CC_CAMNOC_AXI_CLK_SRC 6
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#define CAM_CC_CAMNOC_DCD_XO_CLK 7
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#define CAM_CC_CCI_0_CLK 8
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#define CAM_CC_CCI_0_CLK_SRC 9
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#define CAM_CC_CCI_1_CLK 10
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#define CAM_CC_CCI_1_CLK_SRC 11
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#define CAM_CC_CORE_AHB_CLK 12
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#define CAM_CC_CPAS_AHB_CLK 13
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#define CAM_CC_CPHY_RX_CLK_SRC 14
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#define CAM_CC_CSI0PHYTIMER_CLK 15
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#define CAM_CC_CSI0PHYTIMER_CLK_SRC 16
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#define CAM_CC_CSI1PHYTIMER_CLK 17
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#define CAM_CC_CSI1PHYTIMER_CLK_SRC 18
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#define CAM_CC_CSI2PHYTIMER_CLK 19
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#define CAM_CC_CSI2PHYTIMER_CLK_SRC 20
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#define CAM_CC_CSI3PHYTIMER_CLK 21
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#define CAM_CC_CSI3PHYTIMER_CLK_SRC 22
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#define CAM_CC_CSI4PHYTIMER_CLK 23
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#define CAM_CC_CSI4PHYTIMER_CLK_SRC 24
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#define CAM_CC_CSI5PHYTIMER_CLK 25
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#define CAM_CC_CSI5PHYTIMER_CLK_SRC 26
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#define CAM_CC_CSIPHY0_CLK 27
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#define CAM_CC_CSIPHY1_CLK 28
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#define CAM_CC_CSIPHY2_CLK 29
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#define CAM_CC_CSIPHY3_CLK 30
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#define CAM_CC_CSIPHY4_CLK 31
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#define CAM_CC_CSIPHY5_CLK 32
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#define CAM_CC_FAST_AHB_CLK_SRC 33
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#define CAM_CC_FD_CORE_CLK 34
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#define CAM_CC_FD_CORE_CLK_SRC 35
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#define CAM_CC_FD_CORE_UAR_CLK 36
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#define CAM_CC_GDSC_CLK 37
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#define CAM_CC_ICP_AHB_CLK 38
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#define CAM_CC_ICP_CLK 39
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#define CAM_CC_ICP_CLK_SRC 40
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#define CAM_CC_IFE_0_AHB_CLK 41
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#define CAM_CC_IFE_0_AREG_CLK 42
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#define CAM_CC_IFE_0_AXI_CLK 43
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#define CAM_CC_IFE_0_CLK 44
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#define CAM_CC_IFE_0_CLK_SRC 45
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#define CAM_CC_IFE_0_CPHY_RX_CLK 46
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#define CAM_CC_IFE_0_CSID_CLK 47
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#define CAM_CC_IFE_0_CSID_CLK_SRC 48
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#define CAM_CC_IFE_0_DSP_CLK 49
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#define CAM_CC_IFE_1_AHB_CLK 50
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#define CAM_CC_IFE_1_AREG_CLK 51
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#define CAM_CC_IFE_1_AXI_CLK 52
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#define CAM_CC_IFE_1_CLK 53
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#define CAM_CC_IFE_1_CLK_SRC 54
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#define CAM_CC_IFE_1_CPHY_RX_CLK 55
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#define CAM_CC_IFE_1_CSID_CLK 56
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#define CAM_CC_IFE_1_CSID_CLK_SRC 57
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#define CAM_CC_IFE_1_DSP_CLK 58
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#define CAM_CC_IFE_LITE_AHB_CLK 59
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#define CAM_CC_IFE_LITE_AXI_CLK 60
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#define CAM_CC_IFE_LITE_CLK 61
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#define CAM_CC_IFE_LITE_CLK_SRC 62
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#define CAM_CC_IFE_LITE_CPHY_RX_CLK 63
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#define CAM_CC_IFE_LITE_CSID_CLK 64
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#define CAM_CC_IFE_LITE_CSID_CLK_SRC 65
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#define CAM_CC_IPE_0_AHB_CLK 66
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#define CAM_CC_IPE_0_AREG_CLK 67
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#define CAM_CC_IPE_0_AXI_CLK 68
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#define CAM_CC_IPE_0_CLK 69
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#define CAM_CC_IPE_0_CLK_SRC 70
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#define CAM_CC_JPEG_CLK 71
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#define CAM_CC_JPEG_CLK_SRC 72
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#define CAM_CC_MCLK0_CLK 73
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#define CAM_CC_MCLK0_CLK_SRC 74
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#define CAM_CC_MCLK1_CLK 75
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#define CAM_CC_MCLK1_CLK_SRC 76
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#define CAM_CC_MCLK2_CLK 77
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#define CAM_CC_MCLK2_CLK_SRC 78
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#define CAM_CC_MCLK3_CLK 79
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#define CAM_CC_MCLK3_CLK_SRC 80
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#define CAM_CC_MCLK4_CLK 81
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#define CAM_CC_MCLK4_CLK_SRC 82
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#define CAM_CC_MCLK5_CLK 83
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#define CAM_CC_MCLK5_CLK_SRC 84
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#define CAM_CC_MCLK6_CLK 85
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#define CAM_CC_MCLK6_CLK_SRC 86
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#define CAM_CC_PLL0 87
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#define CAM_CC_PLL0_OUT_EVEN 88
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#define CAM_CC_PLL0_OUT_ODD 89
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#define CAM_CC_PLL1 90
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#define CAM_CC_PLL1_OUT_EVEN 91
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#define CAM_CC_PLL2 92
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#define CAM_CC_PLL2_OUT_MAIN 93
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#define CAM_CC_PLL3 94
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#define CAM_CC_PLL3_OUT_EVEN 95
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#define CAM_CC_PLL4 96
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#define CAM_CC_PLL4_OUT_EVEN 97
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#define CAM_CC_SBI_AHB_CLK 98
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#define CAM_CC_SBI_AXI_CLK 99
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#define CAM_CC_SBI_CLK 100
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#define CAM_CC_SBI_CPHY_RX_CLK 101
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#define CAM_CC_SBI_CSID_CLK 102
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#define CAM_CC_SBI_CSID_CLK_SRC 103
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#define CAM_CC_SBI_DIV_CLK_SRC 104
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#define CAM_CC_SBI_IFE_0_CLK 105
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#define CAM_CC_SBI_IFE_1_CLK 106
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#define CAM_CC_SLEEP_CLK 107
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#define CAM_CC_SLEEP_CLK_SRC 108
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#define CAM_CC_SLOW_AHB_CLK_SRC 109
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#define CAM_CC_XO_CLK_SRC 110
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/* CAM_CC resets */
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#define CAM_CC_BPS_BCR 0
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#define CAM_CC_ICP_BCR 1
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#define CAM_CC_IFE_0_BCR 2
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#define CAM_CC_IFE_1_BCR 3
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#define CAM_CC_IPE_0_BCR 4
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#define CAM_CC_SBI_BCR 5
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/* CAM_CC GDSCRs */
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#define BPS_GDSC 0
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#define IPE_0_GDSC 1
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#define SBI_GDSC 2
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#define IFE_0_GDSC 3
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#define IFE_1_GDSC 4
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#define TITAN_TOP_GDSC 5
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#endif
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