344 lines
8.5 KiB
C
344 lines
8.5 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel Platform Monitory Technology Telemetry driver
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*
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* Copyright (c) 2020, Intel Corporation.
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* All Rights Reserved.
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*
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* Author: "Alexander Duyck" <alexander.h.duyck@linux.intel.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/pci.h>
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#include "../vsec.h"
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#include "class.h"
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#define PMT_XA_START 0
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#define PMT_XA_MAX INT_MAX
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#define PMT_XA_LIMIT XA_LIMIT(PMT_XA_START, PMT_XA_MAX)
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/*
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* Early implementations of PMT on client platforms have some
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* differences from the server platforms (which use the Out Of Band
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* Management Services Module OOBMSM). This list tracks those
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* platforms as needed to handle those differences. Newer client
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* platforms are expected to be fully compatible with server.
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*/
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static const struct pci_device_id pmt_telem_early_client_pci_ids[] = {
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{ PCI_VDEVICE(INTEL, 0x467d) }, /* ADL */
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{ PCI_VDEVICE(INTEL, 0x490e) }, /* DG1 */
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{ PCI_VDEVICE(INTEL, 0x9a0d) }, /* TGL */
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{ }
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};
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bool intel_pmt_is_early_client_hw(struct device *dev)
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{
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struct pci_dev *parent = to_pci_dev(dev->parent);
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return !!pci_match_id(pmt_telem_early_client_pci_ids, parent);
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}
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EXPORT_SYMBOL_GPL(intel_pmt_is_early_client_hw);
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/*
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* sysfs
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*/
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static ssize_t
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intel_pmt_read(struct file *filp, struct kobject *kobj,
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struct bin_attribute *attr, char *buf, loff_t off,
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size_t count)
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{
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struct intel_pmt_entry *entry = container_of(attr,
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struct intel_pmt_entry,
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pmt_bin_attr);
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if (off < 0)
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return -EINVAL;
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if (off >= entry->size)
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return 0;
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if (count > entry->size - off)
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count = entry->size - off;
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memcpy_fromio(buf, entry->base + off, count);
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return count;
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}
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static int
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intel_pmt_mmap(struct file *filp, struct kobject *kobj,
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struct bin_attribute *attr, struct vm_area_struct *vma)
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{
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struct intel_pmt_entry *entry = container_of(attr,
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struct intel_pmt_entry,
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pmt_bin_attr);
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unsigned long vsize = vma->vm_end - vma->vm_start;
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struct device *dev = kobj_to_dev(kobj);
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unsigned long phys = entry->base_addr;
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unsigned long pfn = PFN_DOWN(phys);
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unsigned long psize;
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if (vma->vm_flags & (VM_WRITE | VM_MAYWRITE))
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return -EROFS;
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psize = (PFN_UP(entry->base_addr + entry->size) - pfn) * PAGE_SIZE;
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if (vsize > psize) {
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dev_err(dev, "Requested mmap size is too large\n");
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return -EINVAL;
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}
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
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if (io_remap_pfn_range(vma, vma->vm_start, pfn,
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vsize, vma->vm_page_prot))
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return -EAGAIN;
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return 0;
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}
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static ssize_t
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guid_show(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct intel_pmt_entry *entry = dev_get_drvdata(dev);
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return sprintf(buf, "0x%x\n", entry->guid);
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}
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static DEVICE_ATTR_RO(guid);
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static ssize_t size_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct intel_pmt_entry *entry = dev_get_drvdata(dev);
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return sprintf(buf, "%zu\n", entry->size);
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}
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static DEVICE_ATTR_RO(size);
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static ssize_t
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offset_show(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct intel_pmt_entry *entry = dev_get_drvdata(dev);
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return sprintf(buf, "%lu\n", offset_in_page(entry->base_addr));
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}
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static DEVICE_ATTR_RO(offset);
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static struct attribute *intel_pmt_attrs[] = {
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&dev_attr_guid.attr,
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&dev_attr_size.attr,
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&dev_attr_offset.attr,
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NULL
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};
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ATTRIBUTE_GROUPS(intel_pmt);
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static struct class intel_pmt_class = {
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.name = "intel_pmt",
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.owner = THIS_MODULE,
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.dev_groups = intel_pmt_groups,
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};
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static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
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struct intel_pmt_header *header,
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struct device *dev,
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struct resource *disc_res)
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{
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struct pci_dev *pci_dev = to_pci_dev(dev->parent);
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u8 bir;
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/*
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* The base offset should always be 8 byte aligned.
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*
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* For non-local access types the lower 3 bits of base offset
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* contains the index of the base address register where the
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* telemetry can be found.
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*/
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bir = GET_BIR(header->base_offset);
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/* Local access and BARID only for now */
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switch (header->access_type) {
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case ACCESS_LOCAL:
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if (bir) {
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dev_err(dev,
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"Unsupported BAR index %d for access type %d\n",
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bir, header->access_type);
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return -EINVAL;
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}
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/*
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* For access_type LOCAL, the base address is as follows:
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* base address = end of discovery region + base offset
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*/
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entry->base_addr = disc_res->end + 1 + header->base_offset;
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/*
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* Some hardware use a different calculation for the base address
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* when access_type == ACCESS_LOCAL. On the these systems
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* ACCCESS_LOCAL refers to an address in the same BAR as the
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* header but at a fixed offset. But as the header address was
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* supplied to the driver, we don't know which BAR it was in.
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* So search for the bar whose range includes the header address.
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*/
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if (intel_pmt_is_early_client_hw(dev)) {
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int i;
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entry->base_addr = 0;
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for (i = 0; i < 6; i++)
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if (disc_res->start >= pci_resource_start(pci_dev, i) &&
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(disc_res->start <= pci_resource_end(pci_dev, i))) {
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entry->base_addr = pci_resource_start(pci_dev, i) +
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header->base_offset;
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break;
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}
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if (!entry->base_addr)
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return -EINVAL;
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}
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break;
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case ACCESS_BARID:
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/*
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* If another BAR was specified then the base offset
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* represents the offset within that BAR. SO retrieve the
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* address from the parent PCI device and add offset.
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*/
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entry->base_addr = pci_resource_start(pci_dev, bir) +
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GET_ADDRESS(header->base_offset);
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break;
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default:
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dev_err(dev, "Unsupported access type %d\n",
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header->access_type);
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return -EINVAL;
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}
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entry->guid = header->guid;
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entry->size = header->size;
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return 0;
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}
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static int intel_pmt_dev_register(struct intel_pmt_entry *entry,
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struct intel_pmt_namespace *ns,
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struct device *parent)
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{
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struct resource res = {0};
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struct device *dev;
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int ret;
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ret = xa_alloc(ns->xa, &entry->devid, entry, PMT_XA_LIMIT, GFP_KERNEL);
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if (ret)
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return ret;
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dev = device_create(&intel_pmt_class, parent, MKDEV(0, 0), entry,
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"%s%d", ns->name, entry->devid);
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if (IS_ERR(dev)) {
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dev_err(parent, "Could not create %s%d device node\n",
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ns->name, entry->devid);
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ret = PTR_ERR(dev);
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goto fail_dev_create;
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}
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entry->kobj = &dev->kobj;
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if (ns->attr_grp) {
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ret = sysfs_create_group(entry->kobj, ns->attr_grp);
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if (ret)
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goto fail_sysfs;
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}
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/* if size is 0 assume no data buffer, so no file needed */
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if (!entry->size)
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return 0;
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res.start = entry->base_addr;
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res.end = res.start + entry->size - 1;
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res.flags = IORESOURCE_MEM;
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entry->base = devm_ioremap_resource(dev, &res);
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if (IS_ERR(entry->base)) {
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ret = PTR_ERR(entry->base);
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goto fail_ioremap;
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}
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sysfs_bin_attr_init(&entry->pmt_bin_attr);
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entry->pmt_bin_attr.attr.name = ns->name;
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entry->pmt_bin_attr.attr.mode = 0440;
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entry->pmt_bin_attr.mmap = intel_pmt_mmap;
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entry->pmt_bin_attr.read = intel_pmt_read;
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entry->pmt_bin_attr.size = entry->size;
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ret = sysfs_create_bin_file(&dev->kobj, &entry->pmt_bin_attr);
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if (!ret)
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return 0;
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fail_ioremap:
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if (ns->attr_grp)
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sysfs_remove_group(entry->kobj, ns->attr_grp);
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fail_sysfs:
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device_unregister(dev);
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fail_dev_create:
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xa_erase(ns->xa, entry->devid);
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return ret;
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}
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int intel_pmt_dev_create(struct intel_pmt_entry *entry, struct intel_pmt_namespace *ns,
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struct intel_vsec_device *intel_vsec_dev, int idx)
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{
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struct device *dev = &intel_vsec_dev->auxdev.dev;
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struct intel_pmt_header header;
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struct resource *disc_res;
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int ret;
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disc_res = &intel_vsec_dev->resource[idx];
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entry->disc_table = devm_ioremap_resource(dev, disc_res);
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if (IS_ERR(entry->disc_table))
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return PTR_ERR(entry->disc_table);
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ret = ns->pmt_header_decode(entry, &header, dev);
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if (ret)
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return ret;
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ret = intel_pmt_populate_entry(entry, &header, dev, disc_res);
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if (ret)
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return ret;
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return intel_pmt_dev_register(entry, ns, dev);
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}
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EXPORT_SYMBOL_GPL(intel_pmt_dev_create);
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void intel_pmt_dev_destroy(struct intel_pmt_entry *entry,
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struct intel_pmt_namespace *ns)
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{
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struct device *dev = kobj_to_dev(entry->kobj);
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if (entry->size)
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sysfs_remove_bin_file(entry->kobj, &entry->pmt_bin_attr);
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if (ns->attr_grp)
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sysfs_remove_group(entry->kobj, ns->attr_grp);
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device_unregister(dev);
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xa_erase(ns->xa, entry->devid);
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}
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EXPORT_SYMBOL_GPL(intel_pmt_dev_destroy);
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static int __init pmt_class_init(void)
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{
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return class_register(&intel_pmt_class);
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}
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static void __exit pmt_class_exit(void)
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{
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class_unregister(&intel_pmt_class);
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}
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module_init(pmt_class_init);
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module_exit(pmt_class_exit);
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MODULE_AUTHOR("Alexander Duyck <alexander.h.duyck@linux.intel.com>");
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MODULE_DESCRIPTION("Intel PMT Class driver");
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MODULE_LICENSE("GPL v2");
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