362 lines
12 KiB
C
362 lines
12 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
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#ifndef _IONIC_DEV_H_
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#define _IONIC_DEV_H_
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#include <linux/atomic.h>
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#include <linux/mutex.h>
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#include <linux/workqueue.h>
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#include "ionic_if.h"
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#include "ionic_regs.h"
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#define IONIC_MAX_TX_DESC 8192
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#define IONIC_MAX_RX_DESC 16384
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#define IONIC_MIN_TXRX_DESC 64
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#define IONIC_DEF_TXRX_DESC 4096
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#define IONIC_RX_FILL_THRESHOLD 16
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#define IONIC_RX_FILL_DIV 8
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#define IONIC_LIFS_MAX 1024
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#define IONIC_WATCHDOG_SECS 5
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#define IONIC_ITR_COAL_USEC_DEFAULT 64
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#define IONIC_DEV_CMD_REG_VERSION 1
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#define IONIC_DEV_INFO_REG_COUNT 32
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#define IONIC_DEV_CMD_REG_COUNT 32
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struct ionic_dev_bar {
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void __iomem *vaddr;
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phys_addr_t bus_addr;
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unsigned long len;
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int res_index;
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};
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#ifndef __CHECKER__
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/* Registers */
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static_assert(sizeof(struct ionic_intr) == 32);
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static_assert(sizeof(struct ionic_doorbell) == 8);
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static_assert(sizeof(struct ionic_intr_status) == 8);
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static_assert(sizeof(union ionic_dev_regs) == 4096);
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static_assert(sizeof(union ionic_dev_info_regs) == 2048);
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static_assert(sizeof(union ionic_dev_cmd_regs) == 2048);
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static_assert(sizeof(struct ionic_lif_stats) == 1024);
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static_assert(sizeof(struct ionic_admin_cmd) == 64);
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static_assert(sizeof(struct ionic_admin_comp) == 16);
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static_assert(sizeof(struct ionic_nop_cmd) == 64);
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static_assert(sizeof(struct ionic_nop_comp) == 16);
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/* Device commands */
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static_assert(sizeof(struct ionic_dev_identify_cmd) == 64);
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static_assert(sizeof(struct ionic_dev_identify_comp) == 16);
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static_assert(sizeof(struct ionic_dev_init_cmd) == 64);
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static_assert(sizeof(struct ionic_dev_init_comp) == 16);
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static_assert(sizeof(struct ionic_dev_reset_cmd) == 64);
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static_assert(sizeof(struct ionic_dev_reset_comp) == 16);
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static_assert(sizeof(struct ionic_dev_getattr_cmd) == 64);
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static_assert(sizeof(struct ionic_dev_getattr_comp) == 16);
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static_assert(sizeof(struct ionic_dev_setattr_cmd) == 64);
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static_assert(sizeof(struct ionic_dev_setattr_comp) == 16);
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static_assert(sizeof(struct ionic_lif_setphc_cmd) == 64);
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/* Port commands */
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static_assert(sizeof(struct ionic_port_identify_cmd) == 64);
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static_assert(sizeof(struct ionic_port_identify_comp) == 16);
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static_assert(sizeof(struct ionic_port_init_cmd) == 64);
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static_assert(sizeof(struct ionic_port_init_comp) == 16);
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static_assert(sizeof(struct ionic_port_reset_cmd) == 64);
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static_assert(sizeof(struct ionic_port_reset_comp) == 16);
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static_assert(sizeof(struct ionic_port_getattr_cmd) == 64);
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static_assert(sizeof(struct ionic_port_getattr_comp) == 16);
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static_assert(sizeof(struct ionic_port_setattr_cmd) == 64);
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static_assert(sizeof(struct ionic_port_setattr_comp) == 16);
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/* LIF commands */
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static_assert(sizeof(struct ionic_lif_init_cmd) == 64);
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static_assert(sizeof(struct ionic_lif_init_comp) == 16);
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static_assert(sizeof(struct ionic_lif_reset_cmd) == 64);
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static_assert(sizeof(ionic_lif_reset_comp) == 16);
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static_assert(sizeof(struct ionic_lif_getattr_cmd) == 64);
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static_assert(sizeof(struct ionic_lif_getattr_comp) == 16);
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static_assert(sizeof(struct ionic_lif_setattr_cmd) == 64);
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static_assert(sizeof(struct ionic_lif_setattr_comp) == 16);
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static_assert(sizeof(struct ionic_q_init_cmd) == 64);
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static_assert(sizeof(struct ionic_q_init_comp) == 16);
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static_assert(sizeof(struct ionic_q_control_cmd) == 64);
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static_assert(sizeof(ionic_q_control_comp) == 16);
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static_assert(sizeof(struct ionic_q_identify_cmd) == 64);
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static_assert(sizeof(struct ionic_q_identify_comp) == 16);
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static_assert(sizeof(struct ionic_rx_mode_set_cmd) == 64);
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static_assert(sizeof(ionic_rx_mode_set_comp) == 16);
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static_assert(sizeof(struct ionic_rx_filter_add_cmd) == 64);
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static_assert(sizeof(struct ionic_rx_filter_add_comp) == 16);
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static_assert(sizeof(struct ionic_rx_filter_del_cmd) == 64);
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static_assert(sizeof(ionic_rx_filter_del_comp) == 16);
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/* RDMA commands */
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static_assert(sizeof(struct ionic_rdma_reset_cmd) == 64);
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static_assert(sizeof(struct ionic_rdma_queue_cmd) == 64);
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/* Events */
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static_assert(sizeof(struct ionic_notifyq_cmd) == 4);
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static_assert(sizeof(union ionic_notifyq_comp) == 64);
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static_assert(sizeof(struct ionic_notifyq_event) == 64);
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static_assert(sizeof(struct ionic_link_change_event) == 64);
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static_assert(sizeof(struct ionic_reset_event) == 64);
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static_assert(sizeof(struct ionic_heartbeat_event) == 64);
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static_assert(sizeof(struct ionic_log_event) == 64);
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/* I/O */
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static_assert(sizeof(struct ionic_txq_desc) == 16);
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static_assert(sizeof(struct ionic_txq_sg_desc) == 128);
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static_assert(sizeof(struct ionic_txq_comp) == 16);
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static_assert(sizeof(struct ionic_rxq_desc) == 16);
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static_assert(sizeof(struct ionic_rxq_sg_desc) == 128);
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static_assert(sizeof(struct ionic_rxq_comp) == 16);
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/* SR/IOV */
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static_assert(sizeof(struct ionic_vf_setattr_cmd) == 64);
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static_assert(sizeof(struct ionic_vf_setattr_comp) == 16);
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static_assert(sizeof(struct ionic_vf_getattr_cmd) == 64);
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static_assert(sizeof(struct ionic_vf_getattr_comp) == 16);
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#endif /* __CHECKER__ */
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struct ionic_devinfo {
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u8 asic_type;
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u8 asic_rev;
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char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN + 1];
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char serial_num[IONIC_DEVINFO_SERIAL_BUFLEN + 1];
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};
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struct ionic_dev {
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union ionic_dev_info_regs __iomem *dev_info_regs;
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union ionic_dev_cmd_regs __iomem *dev_cmd_regs;
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struct ionic_hwstamp_regs __iomem *hwstamp_regs;
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atomic_long_t last_check_time;
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unsigned long last_hb_time;
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u32 last_fw_hb;
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bool fw_hb_ready;
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bool fw_status_ready;
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u8 fw_generation;
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u64 __iomem *db_pages;
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dma_addr_t phy_db_pages;
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struct ionic_intr __iomem *intr_ctrl;
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u64 __iomem *intr_status;
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u32 port_info_sz;
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struct ionic_port_info *port_info;
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dma_addr_t port_info_pa;
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struct ionic_devinfo dev_info;
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};
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struct ionic_cq_info {
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union {
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void *cq_desc;
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struct ionic_admin_comp *admincq;
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struct ionic_notifyq_event *notifyq;
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};
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};
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struct ionic_queue;
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struct ionic_qcq;
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struct ionic_desc_info;
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typedef void (*ionic_desc_cb)(struct ionic_queue *q,
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struct ionic_desc_info *desc_info,
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struct ionic_cq_info *cq_info, void *cb_arg);
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#define IONIC_PAGE_SIZE PAGE_SIZE
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#define IONIC_PAGE_SPLIT_SZ (PAGE_SIZE / 2)
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#define IONIC_PAGE_GFP_MASK (GFP_ATOMIC | __GFP_NOWARN |\
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__GFP_COMP | __GFP_MEMALLOC)
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struct ionic_buf_info {
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struct page *page;
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dma_addr_t dma_addr;
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u32 page_offset;
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u32 len;
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};
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#define IONIC_MAX_FRAGS (1 + IONIC_TX_MAX_SG_ELEMS_V1)
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struct ionic_desc_info {
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union {
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void *desc;
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struct ionic_txq_desc *txq_desc;
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struct ionic_rxq_desc *rxq_desc;
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struct ionic_admin_cmd *adminq_desc;
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};
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union {
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void *sg_desc;
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struct ionic_txq_sg_desc *txq_sg_desc;
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struct ionic_rxq_sg_desc *rxq_sgl_desc;
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};
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unsigned int bytes;
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unsigned int nbufs;
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struct ionic_buf_info bufs[IONIC_MAX_FRAGS];
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ionic_desc_cb cb;
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void *cb_arg;
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};
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#define IONIC_QUEUE_NAME_MAX_SZ 32
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struct ionic_queue {
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struct device *dev;
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struct ionic_lif *lif;
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struct ionic_desc_info *info;
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u64 dbval;
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u16 head_idx;
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u16 tail_idx;
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unsigned int index;
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unsigned int num_descs;
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unsigned int max_sg_elems;
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u64 features;
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u64 drop;
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struct ionic_dev *idev;
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unsigned int type;
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unsigned int hw_index;
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unsigned int hw_type;
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union {
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void *base;
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struct ionic_txq_desc *txq;
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struct ionic_rxq_desc *rxq;
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struct ionic_admin_cmd *adminq;
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};
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union {
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void *sg_base;
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struct ionic_txq_sg_desc *txq_sgl;
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struct ionic_rxq_sg_desc *rxq_sgl;
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};
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dma_addr_t base_pa;
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dma_addr_t sg_base_pa;
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unsigned int desc_size;
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unsigned int sg_desc_size;
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unsigned int pid;
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char name[IONIC_QUEUE_NAME_MAX_SZ];
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} ____cacheline_aligned_in_smp;
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#define IONIC_INTR_INDEX_NOT_ASSIGNED -1
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#define IONIC_INTR_NAME_MAX_SZ 32
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struct ionic_intr_info {
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char name[IONIC_INTR_NAME_MAX_SZ];
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unsigned int index;
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unsigned int vector;
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u64 rearm_count;
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unsigned int cpu;
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cpumask_t affinity_mask;
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u32 dim_coal_hw;
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};
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struct ionic_cq {
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struct ionic_lif *lif;
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struct ionic_cq_info *info;
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struct ionic_queue *bound_q;
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struct ionic_intr_info *bound_intr;
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u16 tail_idx;
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bool done_color;
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unsigned int num_descs;
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unsigned int desc_size;
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void *base;
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dma_addr_t base_pa;
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} ____cacheline_aligned_in_smp;
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struct ionic;
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static inline void ionic_intr_init(struct ionic_dev *idev,
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struct ionic_intr_info *intr,
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unsigned long index)
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{
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ionic_intr_clean(idev->intr_ctrl, index);
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intr->index = index;
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}
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static inline unsigned int ionic_q_space_avail(struct ionic_queue *q)
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{
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unsigned int avail = q->tail_idx;
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if (q->head_idx >= avail)
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avail += q->num_descs - q->head_idx - 1;
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else
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avail -= q->head_idx + 1;
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return avail;
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}
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static inline bool ionic_q_has_space(struct ionic_queue *q, unsigned int want)
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{
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return ionic_q_space_avail(q) >= want;
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}
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void ionic_init_devinfo(struct ionic *ionic);
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int ionic_dev_setup(struct ionic *ionic);
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void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
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u8 ionic_dev_cmd_status(struct ionic_dev *idev);
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bool ionic_dev_cmd_done(struct ionic_dev *idev);
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void ionic_dev_cmd_comp(struct ionic_dev *idev, union ionic_dev_cmd_comp *comp);
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void ionic_dev_cmd_identify(struct ionic_dev *idev, u8 ver);
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void ionic_dev_cmd_init(struct ionic_dev *idev);
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void ionic_dev_cmd_reset(struct ionic_dev *idev);
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void ionic_dev_cmd_port_identify(struct ionic_dev *idev);
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void ionic_dev_cmd_port_init(struct ionic_dev *idev);
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void ionic_dev_cmd_port_reset(struct ionic_dev *idev);
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void ionic_dev_cmd_port_state(struct ionic_dev *idev, u8 state);
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void ionic_dev_cmd_port_speed(struct ionic_dev *idev, u32 speed);
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void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable);
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void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type);
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void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type);
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int ionic_set_vf_config(struct ionic *ionic, int vf,
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struct ionic_vf_setattr_cmd *vfc);
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int ionic_dev_cmd_vf_getattr(struct ionic *ionic, int vf, u8 attr,
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struct ionic_vf_getattr_comp *comp);
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void ionic_dev_cmd_queue_identify(struct ionic_dev *idev,
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u16 lif_type, u8 qtype, u8 qver);
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void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver);
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void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index,
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dma_addr_t addr);
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void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index);
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void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq,
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u16 lif_index, u16 intr_index);
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int ionic_db_page_num(struct ionic_lif *lif, int pid);
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int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq,
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struct ionic_intr_info *intr,
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unsigned int num_descs, size_t desc_size);
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void ionic_cq_map(struct ionic_cq *cq, void *base, dma_addr_t base_pa);
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void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q);
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typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, struct ionic_cq_info *cq_info);
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typedef void (*ionic_cq_done_cb)(void *done_arg);
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unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do,
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ionic_cq_cb cb, ionic_cq_done_cb done_cb,
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void *done_arg);
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int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
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struct ionic_queue *q, unsigned int index, const char *name,
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unsigned int num_descs, size_t desc_size,
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size_t sg_desc_size, unsigned int pid);
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void ionic_q_map(struct ionic_queue *q, void *base, dma_addr_t base_pa);
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void ionic_q_sg_map(struct ionic_queue *q, void *base, dma_addr_t base_pa);
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void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, ionic_desc_cb cb,
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void *cb_arg);
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void ionic_q_rewind(struct ionic_queue *q, struct ionic_desc_info *start);
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void ionic_q_service(struct ionic_queue *q, struct ionic_cq_info *cq_info,
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unsigned int stop_index);
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int ionic_heartbeat_check(struct ionic *ionic);
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bool ionic_is_fw_running(struct ionic_dev *idev);
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#endif /* _IONIC_DEV_H_ */
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