516 lines
13 KiB
C
516 lines
13 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2016-2019 HabanaLabs, Ltd.
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* All Rights Reserved.
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*/
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#include "habanalabs.h"
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#include <linux/slab.h>
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/**
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* struct hl_eqe_work - This structure is used to schedule work of EQ
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* entry and cpucp_reset event
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*
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* @eq_work: workqueue object to run when EQ entry is received
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* @hdev: pointer to device structure
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* @eq_entry: copy of the EQ entry
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*/
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struct hl_eqe_work {
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struct work_struct eq_work;
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struct hl_device *hdev;
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struct hl_eq_entry eq_entry;
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};
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/**
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* hl_cq_inc_ptr - increment ci or pi of cq
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*
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* @ptr: the current ci or pi value of the completion queue
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*
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* Increment ptr by 1. If it reaches the number of completion queue
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* entries, set it to 0
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*/
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inline u32 hl_cq_inc_ptr(u32 ptr)
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{
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ptr++;
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if (unlikely(ptr == HL_CQ_LENGTH))
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ptr = 0;
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return ptr;
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}
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/**
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* hl_eq_inc_ptr - increment ci of eq
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*
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* @ptr: the current ci value of the event queue
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*
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* Increment ptr by 1. If it reaches the number of event queue
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* entries, set it to 0
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*/
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static inline u32 hl_eq_inc_ptr(u32 ptr)
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{
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ptr++;
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if (unlikely(ptr == HL_EQ_LENGTH))
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ptr = 0;
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return ptr;
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}
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static void irq_handle_eqe(struct work_struct *work)
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{
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struct hl_eqe_work *eqe_work = container_of(work, struct hl_eqe_work,
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eq_work);
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struct hl_device *hdev = eqe_work->hdev;
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hdev->asic_funcs->handle_eqe(hdev, &eqe_work->eq_entry);
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kfree(eqe_work);
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}
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/**
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* hl_irq_handler_cq - irq handler for completion queue
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*
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* @irq: irq number
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* @arg: pointer to completion queue structure
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*
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*/
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irqreturn_t hl_irq_handler_cq(int irq, void *arg)
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{
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struct hl_cq *cq = arg;
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struct hl_device *hdev = cq->hdev;
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struct hl_hw_queue *queue;
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struct hl_cs_job *job;
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bool shadow_index_valid;
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u16 shadow_index;
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struct hl_cq_entry *cq_entry, *cq_base;
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if (hdev->disabled) {
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dev_dbg(hdev->dev,
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"Device disabled but received IRQ %d for CQ %d\n",
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irq, cq->hw_queue_id);
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return IRQ_HANDLED;
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}
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cq_base = cq->kernel_address;
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while (1) {
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bool entry_ready = ((le32_to_cpu(cq_base[cq->ci].data) &
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CQ_ENTRY_READY_MASK)
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>> CQ_ENTRY_READY_SHIFT);
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if (!entry_ready)
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break;
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cq_entry = (struct hl_cq_entry *) &cq_base[cq->ci];
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/* Make sure we read CQ entry contents after we've
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* checked the ownership bit.
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*/
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dma_rmb();
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shadow_index_valid = ((le32_to_cpu(cq_entry->data) &
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CQ_ENTRY_SHADOW_INDEX_VALID_MASK)
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>> CQ_ENTRY_SHADOW_INDEX_VALID_SHIFT);
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shadow_index = (u16) ((le32_to_cpu(cq_entry->data) &
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CQ_ENTRY_SHADOW_INDEX_MASK)
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>> CQ_ENTRY_SHADOW_INDEX_SHIFT);
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queue = &hdev->kernel_queues[cq->hw_queue_id];
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if ((shadow_index_valid) && (!hdev->disabled)) {
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job = queue->shadow_queue[hl_pi_2_offset(shadow_index)];
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queue_work(hdev->cq_wq[cq->cq_idx], &job->finish_work);
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}
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atomic_inc(&queue->ci);
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/* Clear CQ entry ready bit */
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cq_entry->data = cpu_to_le32(le32_to_cpu(cq_entry->data) &
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~CQ_ENTRY_READY_MASK);
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cq->ci = hl_cq_inc_ptr(cq->ci);
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/* Increment free slots */
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atomic_inc(&cq->free_slots_cnt);
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}
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return IRQ_HANDLED;
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}
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/*
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* hl_ts_free_objects - handler of the free objects workqueue.
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* This function should put refcount to objects that the registration node
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* took refcount to them.
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* @work: workqueue object pointer
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*/
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static void hl_ts_free_objects(struct work_struct *work)
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{
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struct timestamp_reg_work_obj *job =
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container_of(work, struct timestamp_reg_work_obj, free_obj);
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struct timestamp_reg_free_node *free_obj, *temp_free_obj;
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struct list_head *free_list_head = job->free_obj_head;
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struct hl_device *hdev = job->hdev;
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list_for_each_entry_safe(free_obj, temp_free_obj, free_list_head, free_objects_node) {
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dev_dbg(hdev->dev, "About to put refcount to ts_buff (%p) cq_cb(%p)\n",
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free_obj->ts_buff,
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free_obj->cq_cb);
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hl_ts_put(free_obj->ts_buff);
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hl_cb_put(free_obj->cq_cb);
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kfree(free_obj);
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}
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kfree(free_list_head);
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kfree(job);
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}
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/*
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* This function called with spin_lock of wait_list_lock taken
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* This function will set timestamp and delete the registration node from the
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* wait_list_lock.
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* and since we're protected with spin_lock here, so we cannot just put the refcount
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* for the objects here, since the release function may be called and it's also a long
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* logic (which might sleep also) that cannot be handled in irq context.
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* so here we'll be filling a list with nodes of "put" jobs and then will send this
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* list to a dedicated workqueue to do the actual put.
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*/
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static int handle_registration_node(struct hl_device *hdev, struct hl_user_pending_interrupt *pend,
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struct list_head **free_list)
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{
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struct timestamp_reg_free_node *free_node;
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u64 timestamp;
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if (!(*free_list)) {
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/* Alloc/Init the timestamp registration free objects list */
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*free_list = kmalloc(sizeof(struct list_head), GFP_ATOMIC);
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if (!(*free_list))
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return -ENOMEM;
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INIT_LIST_HEAD(*free_list);
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}
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free_node = kmalloc(sizeof(*free_node), GFP_ATOMIC);
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if (!free_node)
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return -ENOMEM;
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timestamp = ktime_get_ns();
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*pend->ts_reg_info.timestamp_kernel_addr = timestamp;
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dev_dbg(hdev->dev, "Timestamp is set to ts cb address (%p), ts: 0x%llx\n",
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pend->ts_reg_info.timestamp_kernel_addr,
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*(u64 *)pend->ts_reg_info.timestamp_kernel_addr);
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list_del(&pend->wait_list_node);
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/* Mark kernel CB node as free */
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pend->ts_reg_info.in_use = 0;
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/* Putting the refcount for ts_buff and cq_cb objects will be handled
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* in workqueue context, just add job to free_list.
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*/
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free_node->ts_buff = pend->ts_reg_info.ts_buff;
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free_node->cq_cb = pend->ts_reg_info.cq_cb;
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list_add(&free_node->free_objects_node, *free_list);
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return 0;
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}
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static void handle_user_cq(struct hl_device *hdev,
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struct hl_user_interrupt *user_cq)
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{
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struct hl_user_pending_interrupt *pend, *temp_pend;
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struct list_head *ts_reg_free_list_head = NULL;
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struct timestamp_reg_work_obj *job;
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bool reg_node_handle_fail = false;
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ktime_t now = ktime_get();
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int rc;
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/* For registration nodes:
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* As part of handling the registration nodes, we should put refcount to
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* some objects. the problem is that we cannot do that under spinlock
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* or in irq handler context at all (since release functions are long and
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* might sleep), so we will need to handle that part in workqueue context.
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* To avoid handling kmalloc failure which compels us rolling back actions
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* and move nodes hanged on the free list back to the interrupt wait list
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* we always alloc the job of the WQ at the beginning.
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*/
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job = kmalloc(sizeof(*job), GFP_ATOMIC);
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if (!job)
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return;
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spin_lock(&user_cq->wait_list_lock);
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list_for_each_entry_safe(pend, temp_pend, &user_cq->wait_list_head, wait_list_node) {
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if ((pend->cq_kernel_addr && *(pend->cq_kernel_addr) >= pend->cq_target_value) ||
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!pend->cq_kernel_addr) {
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if (pend->ts_reg_info.ts_buff) {
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if (!reg_node_handle_fail) {
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rc = handle_registration_node(hdev, pend,
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&ts_reg_free_list_head);
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if (rc)
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reg_node_handle_fail = true;
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}
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} else {
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/* Handle wait target value node */
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pend->fence.timestamp = now;
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complete_all(&pend->fence.completion);
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}
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}
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}
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spin_unlock(&user_cq->wait_list_lock);
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if (ts_reg_free_list_head) {
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INIT_WORK(&job->free_obj, hl_ts_free_objects);
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job->free_obj_head = ts_reg_free_list_head;
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job->hdev = hdev;
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queue_work(hdev->ts_free_obj_wq, &job->free_obj);
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} else {
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kfree(job);
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}
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}
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/**
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* hl_irq_handler_user_cq - irq handler for user completion queues
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*
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* @irq: irq number
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* @arg: pointer to user interrupt structure
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*
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*/
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irqreturn_t hl_irq_handler_user_cq(int irq, void *arg)
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{
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struct hl_user_interrupt *user_cq = arg;
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struct hl_device *hdev = user_cq->hdev;
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dev_dbg(hdev->dev,
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"got user completion interrupt id %u",
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user_cq->interrupt_id);
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/* Handle user cq interrupts registered on all interrupts */
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handle_user_cq(hdev, &hdev->common_user_interrupt);
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/* Handle user cq interrupts registered on this specific interrupt */
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handle_user_cq(hdev, user_cq);
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return IRQ_HANDLED;
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}
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/**
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* hl_irq_handler_default - default irq handler
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*
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* @irq: irq number
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* @arg: pointer to user interrupt structure
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*
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*/
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irqreturn_t hl_irq_handler_default(int irq, void *arg)
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{
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struct hl_user_interrupt *user_interrupt = arg;
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struct hl_device *hdev = user_interrupt->hdev;
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u32 interrupt_id = user_interrupt->interrupt_id;
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dev_err(hdev->dev,
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"got invalid user interrupt %u",
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interrupt_id);
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return IRQ_HANDLED;
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}
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/**
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* hl_irq_handler_eq - irq handler for event queue
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*
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* @irq: irq number
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* @arg: pointer to event queue structure
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*
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*/
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irqreturn_t hl_irq_handler_eq(int irq, void *arg)
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{
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struct hl_eq *eq = arg;
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struct hl_device *hdev = eq->hdev;
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struct hl_eq_entry *eq_entry;
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struct hl_eq_entry *eq_base;
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struct hl_eqe_work *handle_eqe_work;
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bool entry_ready;
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u32 cur_eqe;
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u16 cur_eqe_index;
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eq_base = eq->kernel_address;
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while (1) {
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cur_eqe = le32_to_cpu(eq_base[eq->ci].hdr.ctl);
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entry_ready = !!FIELD_GET(EQ_CTL_READY_MASK, cur_eqe);
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if (!entry_ready)
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break;
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cur_eqe_index = FIELD_GET(EQ_CTL_INDEX_MASK, cur_eqe);
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if ((hdev->event_queue.check_eqe_index) &&
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(((eq->prev_eqe_index + 1) & EQ_CTL_INDEX_MASK)
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!= cur_eqe_index)) {
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dev_dbg(hdev->dev,
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"EQE 0x%x in queue is ready but index does not match %d!=%d",
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eq_base[eq->ci].hdr.ctl,
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((eq->prev_eqe_index + 1) & EQ_CTL_INDEX_MASK),
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cur_eqe_index);
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break;
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}
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eq->prev_eqe_index++;
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eq_entry = &eq_base[eq->ci];
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/*
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* Make sure we read EQ entry contents after we've
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* checked the ownership bit.
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*/
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dma_rmb();
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if (hdev->disabled && !hdev->reset_info.is_in_soft_reset) {
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dev_warn(hdev->dev, "Device disabled but received an EQ event\n");
|
||
|
|
goto skip_irq;
|
||
|
|
}
|
||
|
|
|
||
|
|
handle_eqe_work = kmalloc(sizeof(*handle_eqe_work), GFP_ATOMIC);
|
||
|
|
if (handle_eqe_work) {
|
||
|
|
INIT_WORK(&handle_eqe_work->eq_work, irq_handle_eqe);
|
||
|
|
handle_eqe_work->hdev = hdev;
|
||
|
|
|
||
|
|
memcpy(&handle_eqe_work->eq_entry, eq_entry,
|
||
|
|
sizeof(*eq_entry));
|
||
|
|
|
||
|
|
queue_work(hdev->eq_wq, &handle_eqe_work->eq_work);
|
||
|
|
}
|
||
|
|
skip_irq:
|
||
|
|
/* Clear EQ entry ready bit */
|
||
|
|
eq_entry->hdr.ctl =
|
||
|
|
cpu_to_le32(le32_to_cpu(eq_entry->hdr.ctl) &
|
||
|
|
~EQ_CTL_READY_MASK);
|
||
|
|
|
||
|
|
eq->ci = hl_eq_inc_ptr(eq->ci);
|
||
|
|
|
||
|
|
hdev->asic_funcs->update_eq_ci(hdev, eq->ci);
|
||
|
|
}
|
||
|
|
|
||
|
|
return IRQ_HANDLED;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* hl_cq_init - main initialization function for an cq object
|
||
|
|
*
|
||
|
|
* @hdev: pointer to device structure
|
||
|
|
* @q: pointer to cq structure
|
||
|
|
* @hw_queue_id: The H/W queue ID this completion queue belongs to
|
||
|
|
*
|
||
|
|
* Allocate dma-able memory for the completion queue and initialize fields
|
||
|
|
* Returns 0 on success
|
||
|
|
*/
|
||
|
|
int hl_cq_init(struct hl_device *hdev, struct hl_cq *q, u32 hw_queue_id)
|
||
|
|
{
|
||
|
|
void *p;
|
||
|
|
|
||
|
|
p = hdev->asic_funcs->asic_dma_alloc_coherent(hdev, HL_CQ_SIZE_IN_BYTES,
|
||
|
|
&q->bus_address, GFP_KERNEL | __GFP_ZERO);
|
||
|
|
if (!p)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
q->hdev = hdev;
|
||
|
|
q->kernel_address = p;
|
||
|
|
q->hw_queue_id = hw_queue_id;
|
||
|
|
q->ci = 0;
|
||
|
|
q->pi = 0;
|
||
|
|
|
||
|
|
atomic_set(&q->free_slots_cnt, HL_CQ_LENGTH);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* hl_cq_fini - destroy completion queue
|
||
|
|
*
|
||
|
|
* @hdev: pointer to device structure
|
||
|
|
* @q: pointer to cq structure
|
||
|
|
*
|
||
|
|
* Free the completion queue memory
|
||
|
|
*/
|
||
|
|
void hl_cq_fini(struct hl_device *hdev, struct hl_cq *q)
|
||
|
|
{
|
||
|
|
hdev->asic_funcs->asic_dma_free_coherent(hdev, HL_CQ_SIZE_IN_BYTES,
|
||
|
|
q->kernel_address,
|
||
|
|
q->bus_address);
|
||
|
|
}
|
||
|
|
|
||
|
|
void hl_cq_reset(struct hl_device *hdev, struct hl_cq *q)
|
||
|
|
{
|
||
|
|
q->ci = 0;
|
||
|
|
q->pi = 0;
|
||
|
|
|
||
|
|
atomic_set(&q->free_slots_cnt, HL_CQ_LENGTH);
|
||
|
|
|
||
|
|
/*
|
||
|
|
* It's not enough to just reset the PI/CI because the H/W may have
|
||
|
|
* written valid completion entries before it was halted and therefore
|
||
|
|
* we need to clean the actual queues so we won't process old entries
|
||
|
|
* when the device is operational again
|
||
|
|
*/
|
||
|
|
|
||
|
|
memset(q->kernel_address, 0, HL_CQ_SIZE_IN_BYTES);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* hl_eq_init - main initialization function for an event queue object
|
||
|
|
*
|
||
|
|
* @hdev: pointer to device structure
|
||
|
|
* @q: pointer to eq structure
|
||
|
|
*
|
||
|
|
* Allocate dma-able memory for the event queue and initialize fields
|
||
|
|
* Returns 0 on success
|
||
|
|
*/
|
||
|
|
int hl_eq_init(struct hl_device *hdev, struct hl_eq *q)
|
||
|
|
{
|
||
|
|
void *p;
|
||
|
|
|
||
|
|
p = hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev,
|
||
|
|
HL_EQ_SIZE_IN_BYTES,
|
||
|
|
&q->bus_address);
|
||
|
|
if (!p)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
q->hdev = hdev;
|
||
|
|
q->kernel_address = p;
|
||
|
|
q->ci = 0;
|
||
|
|
q->prev_eqe_index = 0;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* hl_eq_fini - destroy event queue
|
||
|
|
*
|
||
|
|
* @hdev: pointer to device structure
|
||
|
|
* @q: pointer to eq structure
|
||
|
|
*
|
||
|
|
* Free the event queue memory
|
||
|
|
*/
|
||
|
|
void hl_eq_fini(struct hl_device *hdev, struct hl_eq *q)
|
||
|
|
{
|
||
|
|
flush_workqueue(hdev->eq_wq);
|
||
|
|
|
||
|
|
hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev,
|
||
|
|
HL_EQ_SIZE_IN_BYTES,
|
||
|
|
q->kernel_address);
|
||
|
|
}
|
||
|
|
|
||
|
|
void hl_eq_reset(struct hl_device *hdev, struct hl_eq *q)
|
||
|
|
{
|
||
|
|
q->ci = 0;
|
||
|
|
q->prev_eqe_index = 0;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* It's not enough to just reset the PI/CI because the H/W may have
|
||
|
|
* written valid completion entries before it was halted and therefore
|
||
|
|
* we need to clean the actual queues so we won't process old entries
|
||
|
|
* when the device is operational again
|
||
|
|
*/
|
||
|
|
|
||
|
|
memset(q->kernel_address, 0, HL_EQ_SIZE_IN_BYTES);
|
||
|
|
}
|