616 lines
17 KiB
C
616 lines
17 KiB
C
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net>
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*/
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_atomic_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_probe_helper.h>
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#include "sun8i_csc.h"
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#include "sun8i_mixer.h"
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#include "sun8i_vi_layer.h"
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#include "sun8i_vi_scaler.h"
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static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel,
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int overlay, bool enable, unsigned int zpos,
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unsigned int old_zpos)
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{
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u32 val, bld_base, ch_base;
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bld_base = sun8i_blender_base(mixer);
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ch_base = sun8i_channel_base(mixer, channel);
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DRM_DEBUG_DRIVER("%sabling VI channel %d overlay %d\n",
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enable ? "En" : "Dis", channel, overlay);
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if (enable)
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val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN;
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else
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val = 0;
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val);
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if (!enable || zpos != old_zpos) {
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
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SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos),
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0);
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_BLEND_ROUTE(bld_base),
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SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos),
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0);
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}
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if (enable) {
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val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos);
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
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val, val);
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val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos);
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_BLEND_ROUTE(bld_base),
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SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos),
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val);
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}
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}
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static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel,
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int overlay, struct drm_plane *plane)
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{
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u32 mask, val, ch_base;
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ch_base = sun8i_channel_base(mixer, channel);
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if (mixer->cfg->is_de3) {
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mask = SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK |
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SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_MASK;
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val = SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA
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(plane->state->alpha >> 8);
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val |= (plane->state->alpha == DRM_BLEND_ALPHA_OPAQUE) ?
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SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_PIXEL :
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SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_COMBINED;
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base,
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overlay),
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mask, val);
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} else if (mixer->cfg->vi_num == 1) {
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_FCC_GLOBAL_ALPHA_REG,
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SUN8I_MIXER_FCC_GLOBAL_ALPHA_MASK,
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SUN8I_MIXER_FCC_GLOBAL_ALPHA
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(plane->state->alpha >> 8));
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}
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}
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static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel,
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int overlay, struct drm_plane *plane,
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unsigned int zpos)
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{
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struct drm_plane_state *state = plane->state;
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const struct drm_format_info *format = state->fb->format;
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u32 src_w, src_h, dst_w, dst_h;
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u32 bld_base, ch_base;
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u32 outsize, insize;
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u32 hphase, vphase;
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u32 hn = 0, hm = 0;
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u32 vn = 0, vm = 0;
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bool subsampled;
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DRM_DEBUG_DRIVER("Updating VI channel %d overlay %d\n",
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channel, overlay);
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bld_base = sun8i_blender_base(mixer);
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ch_base = sun8i_channel_base(mixer, channel);
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src_w = drm_rect_width(&state->src) >> 16;
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src_h = drm_rect_height(&state->src) >> 16;
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dst_w = drm_rect_width(&state->dst);
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dst_h = drm_rect_height(&state->dst);
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hphase = state->src.x1 & 0xffff;
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vphase = state->src.y1 & 0xffff;
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/* make coordinates dividable by subsampling factor */
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if (format->hsub > 1) {
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int mask, remainder;
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mask = format->hsub - 1;
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remainder = (state->src.x1 >> 16) & mask;
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src_w = (src_w + remainder) & ~mask;
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hphase += remainder << 16;
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}
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if (format->vsub > 1) {
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int mask, remainder;
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mask = format->vsub - 1;
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remainder = (state->src.y1 >> 16) & mask;
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src_h = (src_h + remainder) & ~mask;
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vphase += remainder << 16;
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}
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insize = SUN8I_MIXER_SIZE(src_w, src_h);
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outsize = SUN8I_MIXER_SIZE(dst_w, dst_h);
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/* Set height and width */
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DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n",
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(state->src.x1 >> 16) & ~(format->hsub - 1),
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(state->src.y1 >> 16) & ~(format->vsub - 1));
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DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_LAYER_SIZE(ch_base, overlay),
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insize);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_OVL_SIZE(ch_base),
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insize);
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/*
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* Scaler must be enabled for subsampled formats, so it scales
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* chroma to same size as luma.
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*/
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subsampled = format->hsub > 1 || format->vsub > 1;
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if (insize != outsize || subsampled || hphase || vphase) {
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unsigned int scanline, required;
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struct drm_display_mode *mode;
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u32 hscale, vscale, fps;
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u64 ability;
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DRM_DEBUG_DRIVER("HW scaling is enabled\n");
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mode = &plane->state->crtc->state->mode;
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fps = (mode->clock * 1000) / (mode->vtotal * mode->htotal);
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ability = clk_get_rate(mixer->mod_clk);
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/* BSP algorithm assumes 80% efficiency of VI scaler unit */
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ability *= 80;
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do_div(ability, mode->vdisplay * fps * max(src_w, dst_w));
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required = src_h * 100 / dst_h;
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if (ability < required) {
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DRM_DEBUG_DRIVER("Using vertical coarse scaling\n");
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vm = src_h;
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vn = (u32)ability * dst_h / 100;
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src_h = vn;
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}
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/* it seems that every RGB scaler has buffer for 2048 pixels */
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scanline = subsampled ? mixer->cfg->scanline_yuv : 2048;
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if (src_w > scanline) {
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DRM_DEBUG_DRIVER("Using horizontal coarse scaling\n");
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hm = src_w;
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hn = scanline;
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src_w = hn;
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}
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hscale = (src_w << 16) / dst_w;
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vscale = (src_h << 16) / dst_h;
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sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w,
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dst_h, hscale, vscale, hphase, vphase,
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format);
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sun8i_vi_scaler_enable(mixer, channel, true);
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} else {
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DRM_DEBUG_DRIVER("HW scaling is not needed\n");
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sun8i_vi_scaler_enable(mixer, channel, false);
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}
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_HDS_Y(ch_base),
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SUN8I_MIXER_CHAN_VI_DS_N(hn) |
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SUN8I_MIXER_CHAN_VI_DS_M(hm));
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_HDS_UV(ch_base),
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SUN8I_MIXER_CHAN_VI_DS_N(hn) |
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SUN8I_MIXER_CHAN_VI_DS_M(hm));
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_VDS_Y(ch_base),
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SUN8I_MIXER_CHAN_VI_DS_N(vn) |
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SUN8I_MIXER_CHAN_VI_DS_M(vm));
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_VDS_UV(ch_base),
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SUN8I_MIXER_CHAN_VI_DS_N(vn) |
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SUN8I_MIXER_CHAN_VI_DS_M(vm));
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/* Set base coordinates */
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DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n",
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state->dst.x1, state->dst.y1);
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DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h);
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_BLEND_ATTR_COORD(bld_base, zpos),
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SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1));
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regmap_write(mixer->engine.regs,
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SUN8I_MIXER_BLEND_ATTR_INSIZE(bld_base, zpos),
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outsize);
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return 0;
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}
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static u32 sun8i_vi_layer_get_csc_mode(const struct drm_format_info *format)
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{
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if (!format->is_yuv)
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return SUN8I_CSC_MODE_OFF;
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switch (format->format) {
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case DRM_FORMAT_YVU411:
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case DRM_FORMAT_YVU420:
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case DRM_FORMAT_YVU422:
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case DRM_FORMAT_YVU444:
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return SUN8I_CSC_MODE_YVU2RGB;
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default:
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return SUN8I_CSC_MODE_YUV2RGB;
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}
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}
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static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
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int overlay, struct drm_plane *plane)
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{
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struct drm_plane_state *state = plane->state;
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u32 val, ch_base, csc_mode, hw_fmt;
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const struct drm_format_info *fmt;
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int ret;
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ch_base = sun8i_channel_base(mixer, channel);
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fmt = state->fb->format;
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ret = sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
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if (ret) {
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DRM_DEBUG_DRIVER("Invalid format\n");
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return ret;
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}
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val = hw_fmt << SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_OFFSET;
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val);
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csc_mode = sun8i_vi_layer_get_csc_mode(fmt);
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if (csc_mode != SUN8I_CSC_MODE_OFF) {
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sun8i_csc_set_ccsc_coefficients(mixer, channel, csc_mode,
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state->color_encoding,
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state->color_range);
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sun8i_csc_enable_ccsc(mixer, channel, true);
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} else {
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sun8i_csc_enable_ccsc(mixer, channel, false);
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}
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if (!fmt->is_yuv)
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val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE;
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else
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val = 0;
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regmap_update_bits(mixer->engine.regs,
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
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SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE, val);
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return 0;
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}
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static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel,
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int overlay, struct drm_plane *plane)
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{
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struct drm_plane_state *state = plane->state;
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struct drm_framebuffer *fb = state->fb;
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const struct drm_format_info *format = fb->format;
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struct drm_gem_cma_object *gem;
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u32 dx, dy, src_x, src_y;
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dma_addr_t paddr;
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u32 ch_base;
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int i;
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ch_base = sun8i_channel_base(mixer, channel);
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/* Adjust x and y to be dividable by subsampling factor */
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src_x = (state->src.x1 >> 16) & ~(format->hsub - 1);
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src_y = (state->src.y1 >> 16) & ~(format->vsub - 1);
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for (i = 0; i < format->num_planes; i++) {
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/* Get the physical address of the buffer in memory */
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gem = drm_fb_cma_get_gem_obj(fb, i);
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DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr);
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/* Compute the start of the displayed memory */
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paddr = gem->paddr + fb->offsets[i];
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dx = src_x;
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dy = src_y;
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if (i > 0) {
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dx /= format->hsub;
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dy /= format->vsub;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Fixup framebuffer address for src coordinates */
|
||
|
|
paddr += dx * format->cpp[i];
|
||
|
|
paddr += dy * fb->pitches[i];
|
||
|
|
|
||
|
|
/* Set the line width */
|
||
|
|
DRM_DEBUG_DRIVER("Layer %d. line width: %d bytes\n",
|
||
|
|
i + 1, fb->pitches[i]);
|
||
|
|
regmap_write(mixer->engine.regs,
|
||
|
|
SUN8I_MIXER_CHAN_VI_LAYER_PITCH(ch_base,
|
||
|
|
overlay, i),
|
||
|
|
fb->pitches[i]);
|
||
|
|
|
||
|
|
DRM_DEBUG_DRIVER("Setting %d. buffer address to %pad\n",
|
||
|
|
i + 1, &paddr);
|
||
|
|
|
||
|
|
regmap_write(mixer->engine.regs,
|
||
|
|
SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(ch_base,
|
||
|
|
overlay, i),
|
||
|
|
lower_32_bits(paddr));
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int sun8i_vi_layer_atomic_check(struct drm_plane *plane,
|
||
|
|
struct drm_atomic_state *state)
|
||
|
|
{
|
||
|
|
struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
|
||
|
|
plane);
|
||
|
|
struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane);
|
||
|
|
struct drm_crtc *crtc = new_plane_state->crtc;
|
||
|
|
struct drm_crtc_state *crtc_state;
|
||
|
|
int min_scale, max_scale;
|
||
|
|
|
||
|
|
if (!crtc)
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
crtc_state = drm_atomic_get_existing_crtc_state(state,
|
||
|
|
crtc);
|
||
|
|
if (WARN_ON(!crtc_state))
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
min_scale = DRM_PLANE_HELPER_NO_SCALING;
|
||
|
|
max_scale = DRM_PLANE_HELPER_NO_SCALING;
|
||
|
|
|
||
|
|
if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) {
|
||
|
|
min_scale = SUN8I_VI_SCALER_SCALE_MIN;
|
||
|
|
max_scale = SUN8I_VI_SCALER_SCALE_MAX;
|
||
|
|
}
|
||
|
|
|
||
|
|
return drm_atomic_helper_check_plane_state(new_plane_state,
|
||
|
|
crtc_state,
|
||
|
|
min_scale, max_scale,
|
||
|
|
true, true);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane,
|
||
|
|
struct drm_atomic_state *state)
|
||
|
|
{
|
||
|
|
struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
|
||
|
|
plane);
|
||
|
|
struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane);
|
||
|
|
unsigned int old_zpos = old_state->normalized_zpos;
|
||
|
|
struct sun8i_mixer *mixer = layer->mixer;
|
||
|
|
|
||
|
|
sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0,
|
||
|
|
old_zpos);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void sun8i_vi_layer_atomic_update(struct drm_plane *plane,
|
||
|
|
struct drm_atomic_state *state)
|
||
|
|
{
|
||
|
|
struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
|
||
|
|
plane);
|
||
|
|
struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
|
||
|
|
plane);
|
||
|
|
struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane);
|
||
|
|
unsigned int zpos = new_state->normalized_zpos;
|
||
|
|
unsigned int old_zpos = old_state->normalized_zpos;
|
||
|
|
struct sun8i_mixer *mixer = layer->mixer;
|
||
|
|
|
||
|
|
if (!new_state->visible) {
|
||
|
|
sun8i_vi_layer_enable(mixer, layer->channel,
|
||
|
|
layer->overlay, false, 0, old_zpos);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
sun8i_vi_layer_update_coord(mixer, layer->channel,
|
||
|
|
layer->overlay, plane, zpos);
|
||
|
|
sun8i_vi_layer_update_alpha(mixer, layer->channel,
|
||
|
|
layer->overlay, plane);
|
||
|
|
sun8i_vi_layer_update_formats(mixer, layer->channel,
|
||
|
|
layer->overlay, plane);
|
||
|
|
sun8i_vi_layer_update_buffer(mixer, layer->channel,
|
||
|
|
layer->overlay, plane);
|
||
|
|
sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay,
|
||
|
|
true, zpos, old_zpos);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = {
|
||
|
|
.atomic_check = sun8i_vi_layer_atomic_check,
|
||
|
|
.atomic_disable = sun8i_vi_layer_atomic_disable,
|
||
|
|
.atomic_update = sun8i_vi_layer_atomic_update,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct drm_plane_funcs sun8i_vi_layer_funcs = {
|
||
|
|
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
|
||
|
|
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
|
||
|
|
.destroy = drm_plane_cleanup,
|
||
|
|
.disable_plane = drm_atomic_helper_disable_plane,
|
||
|
|
.reset = drm_atomic_helper_plane_reset,
|
||
|
|
.update_plane = drm_atomic_helper_update_plane,
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* While DE2 VI layer supports same RGB formats as UI layer, alpha
|
||
|
|
* channel is ignored. This structure lists all unique variants
|
||
|
|
* where alpha channel is replaced with "don't care" (X) channel.
|
||
|
|
*/
|
||
|
|
static const u32 sun8i_vi_layer_formats[] = {
|
||
|
|
DRM_FORMAT_BGR565,
|
||
|
|
DRM_FORMAT_BGR888,
|
||
|
|
DRM_FORMAT_BGRX4444,
|
||
|
|
DRM_FORMAT_BGRX5551,
|
||
|
|
DRM_FORMAT_BGRX8888,
|
||
|
|
DRM_FORMAT_RGB565,
|
||
|
|
DRM_FORMAT_RGB888,
|
||
|
|
DRM_FORMAT_RGBX4444,
|
||
|
|
DRM_FORMAT_RGBX5551,
|
||
|
|
DRM_FORMAT_RGBX8888,
|
||
|
|
DRM_FORMAT_XBGR1555,
|
||
|
|
DRM_FORMAT_XBGR4444,
|
||
|
|
DRM_FORMAT_XBGR8888,
|
||
|
|
DRM_FORMAT_XRGB1555,
|
||
|
|
DRM_FORMAT_XRGB4444,
|
||
|
|
DRM_FORMAT_XRGB8888,
|
||
|
|
|
||
|
|
DRM_FORMAT_NV16,
|
||
|
|
DRM_FORMAT_NV12,
|
||
|
|
DRM_FORMAT_NV21,
|
||
|
|
DRM_FORMAT_NV61,
|
||
|
|
DRM_FORMAT_UYVY,
|
||
|
|
DRM_FORMAT_VYUY,
|
||
|
|
DRM_FORMAT_YUYV,
|
||
|
|
DRM_FORMAT_YVYU,
|
||
|
|
DRM_FORMAT_YUV411,
|
||
|
|
DRM_FORMAT_YUV420,
|
||
|
|
DRM_FORMAT_YUV422,
|
||
|
|
DRM_FORMAT_YVU411,
|
||
|
|
DRM_FORMAT_YVU420,
|
||
|
|
DRM_FORMAT_YVU422,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const u32 sun8i_vi_layer_de3_formats[] = {
|
||
|
|
DRM_FORMAT_ABGR1555,
|
||
|
|
DRM_FORMAT_ABGR2101010,
|
||
|
|
DRM_FORMAT_ABGR4444,
|
||
|
|
DRM_FORMAT_ABGR8888,
|
||
|
|
DRM_FORMAT_ARGB1555,
|
||
|
|
DRM_FORMAT_ARGB2101010,
|
||
|
|
DRM_FORMAT_ARGB4444,
|
||
|
|
DRM_FORMAT_ARGB8888,
|
||
|
|
DRM_FORMAT_BGR565,
|
||
|
|
DRM_FORMAT_BGR888,
|
||
|
|
DRM_FORMAT_BGRA1010102,
|
||
|
|
DRM_FORMAT_BGRA5551,
|
||
|
|
DRM_FORMAT_BGRA4444,
|
||
|
|
DRM_FORMAT_BGRA8888,
|
||
|
|
DRM_FORMAT_BGRX8888,
|
||
|
|
DRM_FORMAT_RGB565,
|
||
|
|
DRM_FORMAT_RGB888,
|
||
|
|
DRM_FORMAT_RGBA1010102,
|
||
|
|
DRM_FORMAT_RGBA4444,
|
||
|
|
DRM_FORMAT_RGBA5551,
|
||
|
|
DRM_FORMAT_RGBA8888,
|
||
|
|
DRM_FORMAT_RGBX8888,
|
||
|
|
DRM_FORMAT_XBGR8888,
|
||
|
|
DRM_FORMAT_XRGB8888,
|
||
|
|
|
||
|
|
DRM_FORMAT_NV16,
|
||
|
|
DRM_FORMAT_NV12,
|
||
|
|
DRM_FORMAT_NV21,
|
||
|
|
DRM_FORMAT_NV61,
|
||
|
|
DRM_FORMAT_P010,
|
||
|
|
DRM_FORMAT_P210,
|
||
|
|
DRM_FORMAT_UYVY,
|
||
|
|
DRM_FORMAT_VYUY,
|
||
|
|
DRM_FORMAT_YUYV,
|
||
|
|
DRM_FORMAT_YVYU,
|
||
|
|
DRM_FORMAT_YUV411,
|
||
|
|
DRM_FORMAT_YUV420,
|
||
|
|
DRM_FORMAT_YUV422,
|
||
|
|
DRM_FORMAT_YVU411,
|
||
|
|
DRM_FORMAT_YVU420,
|
||
|
|
DRM_FORMAT_YVU422,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const uint64_t sun8i_layer_modifiers[] = {
|
||
|
|
DRM_FORMAT_MOD_LINEAR,
|
||
|
|
DRM_FORMAT_MOD_INVALID
|
||
|
|
};
|
||
|
|
|
||
|
|
struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
|
||
|
|
struct sun8i_mixer *mixer,
|
||
|
|
int index)
|
||
|
|
{
|
||
|
|
u32 supported_encodings, supported_ranges;
|
||
|
|
unsigned int plane_cnt, format_count;
|
||
|
|
struct sun8i_vi_layer *layer;
|
||
|
|
const u32 *formats;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL);
|
||
|
|
if (!layer)
|
||
|
|
return ERR_PTR(-ENOMEM);
|
||
|
|
|
||
|
|
if (mixer->cfg->is_de3) {
|
||
|
|
formats = sun8i_vi_layer_de3_formats;
|
||
|
|
format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats);
|
||
|
|
} else {
|
||
|
|
formats = sun8i_vi_layer_formats;
|
||
|
|
format_count = ARRAY_SIZE(sun8i_vi_layer_formats);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* possible crtcs are set later */
|
||
|
|
ret = drm_universal_plane_init(drm, &layer->plane, 0,
|
||
|
|
&sun8i_vi_layer_funcs,
|
||
|
|
formats, format_count,
|
||
|
|
sun8i_layer_modifiers,
|
||
|
|
DRM_PLANE_TYPE_OVERLAY, NULL);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(drm->dev, "Couldn't initialize layer\n");
|
||
|
|
return ERR_PTR(ret);
|
||
|
|
}
|
||
|
|
|
||
|
|
plane_cnt = mixer->cfg->ui_num + mixer->cfg->vi_num;
|
||
|
|
|
||
|
|
if (mixer->cfg->vi_num == 1 || mixer->cfg->is_de3) {
|
||
|
|
ret = drm_plane_create_alpha_property(&layer->plane);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(drm->dev, "Couldn't add alpha property\n");
|
||
|
|
return ERR_PTR(ret);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = drm_plane_create_zpos_property(&layer->plane, index,
|
||
|
|
0, plane_cnt - 1);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(drm->dev, "Couldn't add zpos property\n");
|
||
|
|
return ERR_PTR(ret);
|
||
|
|
}
|
||
|
|
|
||
|
|
supported_encodings = BIT(DRM_COLOR_YCBCR_BT601) |
|
||
|
|
BIT(DRM_COLOR_YCBCR_BT709);
|
||
|
|
if (mixer->cfg->is_de3)
|
||
|
|
supported_encodings |= BIT(DRM_COLOR_YCBCR_BT2020);
|
||
|
|
|
||
|
|
supported_ranges = BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
|
||
|
|
BIT(DRM_COLOR_YCBCR_FULL_RANGE);
|
||
|
|
|
||
|
|
ret = drm_plane_create_color_properties(&layer->plane,
|
||
|
|
supported_encodings,
|
||
|
|
supported_ranges,
|
||
|
|
DRM_COLOR_YCBCR_BT709,
|
||
|
|
DRM_COLOR_YCBCR_LIMITED_RANGE);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(drm->dev, "Couldn't add encoding and range properties!\n");
|
||
|
|
return ERR_PTR(ret);
|
||
|
|
}
|
||
|
|
|
||
|
|
drm_plane_helper_add(&layer->plane, &sun8i_vi_layer_helper_funcs);
|
||
|
|
layer->mixer = mixer;
|
||
|
|
layer->channel = index;
|
||
|
|
layer->overlay = 0;
|
||
|
|
|
||
|
|
return layer;
|
||
|
|
}
|