267 lines
9.0 KiB
C
267 lines
9.0 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 OR MIT */
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/*
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* Copyright 2020-2021 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef KFD_SVM_H_
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#define KFD_SVM_H_
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#if IS_ENABLED(CONFIG_HSA_AMD_SVM)
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#include <linux/rwsem.h>
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#include <linux/list.h>
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#include <linux/mutex.h>
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#include <linux/sched/mm.h>
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#include <linux/hmm.h>
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#include "amdgpu.h"
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#include "kfd_priv.h"
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#define SVM_RANGE_VRAM_DOMAIN (1UL << 0)
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#define SVM_ADEV_PGMAP_OWNER(adev)\
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((adev)->hive ? (void *)(adev)->hive : (void *)(adev))
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struct svm_range_bo {
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struct amdgpu_bo *bo;
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struct kref kref;
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struct list_head range_list; /* all svm ranges shared this bo */
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spinlock_t list_lock;
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struct amdgpu_amdkfd_fence *eviction_fence;
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struct work_struct eviction_work;
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struct svm_range_list *svms;
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uint32_t evicting;
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struct work_struct release_work;
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};
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enum svm_work_list_ops {
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SVM_OP_NULL,
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SVM_OP_UNMAP_RANGE,
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SVM_OP_UPDATE_RANGE_NOTIFIER,
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SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP,
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SVM_OP_ADD_RANGE,
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SVM_OP_ADD_RANGE_AND_MAP
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};
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struct svm_work_list_item {
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enum svm_work_list_ops op;
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struct mm_struct *mm;
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};
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/**
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* struct svm_range - shared virtual memory range
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*
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* @svms: list of svm ranges, structure defined in kfd_process
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* @migrate_mutex: to serialize range migration, validation and mapping update
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* @start: range start address in pages
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* @last: range last address in pages
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* @it_node: node [start, last] stored in interval tree, start, last are page
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* aligned, page size is (last - start + 1)
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* @list: link list node, used to scan all ranges of svms
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* @update_list:link list node used to add to update_list
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* @mapping: bo_va mapping structure to create and update GPU page table
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* @npages: number of pages
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* @dma_addr: dma mapping address on each GPU for system memory physical page
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* @ttm_res: vram ttm resource map
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* @offset: range start offset within mm_nodes
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* @svm_bo: struct to manage splited amdgpu_bo
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* @svm_bo_list:link list node, to scan all ranges which share same svm_bo
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* @lock: protect prange start, last, child_list, svm_bo_list
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* @saved_flags:save/restore current PF_MEMALLOC flags
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* @flags: flags defined as KFD_IOCTL_SVM_FLAG_*
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* @perferred_loc: perferred location, 0 for CPU, or GPU id
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* @perfetch_loc: last prefetch location, 0 for CPU, or GPU id
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* @actual_loc: the actual location, 0 for CPU, or GPU id
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* @granularity:migration granularity, log2 num pages
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* @invalid: not 0 means cpu page table is invalidated
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* @validate_timestamp: system timestamp when range is validated
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* @notifier: register mmu interval notifier
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* @work_item: deferred work item information
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* @deferred_list: list header used to add range to deferred list
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* @child_list: list header for split ranges which are not added to svms yet
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* @bitmap_access: index bitmap of GPUs which can access the range
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* @bitmap_aip: index bitmap of GPUs which can access the range in place
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*
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* Data structure for virtual memory range shared by CPU and GPUs, it can be
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* allocated from system memory ram or device vram, and migrate from ram to vram
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* or from vram to ram.
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*/
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struct svm_range {
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struct svm_range_list *svms;
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struct mutex migrate_mutex;
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unsigned long start;
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unsigned long last;
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struct interval_tree_node it_node;
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struct list_head list;
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struct list_head update_list;
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uint64_t npages;
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dma_addr_t *dma_addr[MAX_GPU_INSTANCE];
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struct ttm_resource *ttm_res;
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uint64_t offset;
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struct svm_range_bo *svm_bo;
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struct list_head svm_bo_list;
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struct mutex lock;
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unsigned int saved_flags;
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uint32_t flags;
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uint32_t preferred_loc;
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uint32_t prefetch_loc;
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uint32_t actual_loc;
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uint8_t granularity;
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atomic_t invalid;
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uint64_t validate_timestamp;
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struct mmu_interval_notifier notifier;
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struct svm_work_list_item work_item;
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struct list_head deferred_list;
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struct list_head child_list;
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DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE);
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DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE);
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bool validated_once;
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};
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static inline void svm_range_lock(struct svm_range *prange)
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{
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mutex_lock(&prange->lock);
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prange->saved_flags = memalloc_noreclaim_save();
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}
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static inline void svm_range_unlock(struct svm_range *prange)
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{
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memalloc_noreclaim_restore(prange->saved_flags);
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mutex_unlock(&prange->lock);
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}
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static inline struct svm_range_bo *svm_range_bo_ref(struct svm_range_bo *svm_bo)
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{
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if (svm_bo)
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kref_get(&svm_bo->kref);
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return svm_bo;
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}
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int svm_range_list_init(struct kfd_process *p);
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void svm_range_list_fini(struct kfd_process *p);
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int svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start,
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uint64_t size, uint32_t nattrs,
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struct kfd_ioctl_svm_attribute *attrs);
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struct svm_range *svm_range_from_addr(struct svm_range_list *svms,
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unsigned long addr,
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struct svm_range **parent);
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struct amdgpu_device *svm_range_get_adev_by_id(struct svm_range *prange,
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uint32_t id);
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int svm_range_vram_node_new(struct amdgpu_device *adev,
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struct svm_range *prange, bool clear);
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void svm_range_vram_node_free(struct svm_range *prange);
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int svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm,
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unsigned long addr, struct svm_range *parent,
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struct svm_range *prange);
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int svm_range_restore_pages(struct amdgpu_device *adev,
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unsigned int pasid, uint64_t addr, bool write_fault);
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int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence);
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void svm_range_add_list_work(struct svm_range_list *svms,
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struct svm_range *prange, struct mm_struct *mm,
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enum svm_work_list_ops op);
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void schedule_deferred_list_work(struct svm_range_list *svms);
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void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr,
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unsigned long offset, unsigned long npages);
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void svm_range_free_dma_mappings(struct svm_range *prange);
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void svm_range_prefault(struct svm_range *prange, struct mm_struct *mm,
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void *owner);
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int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges,
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uint64_t *svm_priv_data_size);
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int kfd_criu_checkpoint_svm(struct kfd_process *p,
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uint8_t __user *user_priv_data,
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uint64_t *priv_offset);
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int kfd_criu_restore_svm(struct kfd_process *p,
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uint8_t __user *user_priv_ptr,
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uint64_t *priv_data_offset,
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uint64_t max_priv_data_size);
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int kfd_criu_resume_svm(struct kfd_process *p);
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struct kfd_process_device *
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svm_range_get_pdd_by_adev(struct svm_range *prange, struct amdgpu_device *adev);
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void svm_range_list_lock_and_flush_work(struct svm_range_list *svms, struct mm_struct *mm);
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/* SVM API and HMM page migration work together, device memory type
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* is initialized to not 0 when page migration register device memory.
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*/
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#define KFD_IS_SVM_API_SUPPORTED(dev) ((dev)->pgmap.type != 0)
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void svm_range_bo_unref_async(struct svm_range_bo *svm_bo);
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#else
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struct kfd_process;
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static inline int svm_range_list_init(struct kfd_process *p)
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{
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return 0;
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}
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static inline void svm_range_list_fini(struct kfd_process *p)
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{
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/* empty */
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}
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static inline int svm_range_restore_pages(struct amdgpu_device *adev,
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unsigned int pasid, uint64_t addr,
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bool write_fault)
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{
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return -EFAULT;
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}
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static inline int svm_range_schedule_evict_svm_bo(
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struct amdgpu_amdkfd_fence *fence)
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{
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WARN_ONCE(1, "SVM eviction fence triggered, but SVM is disabled");
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return -EINVAL;
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}
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static inline int svm_range_get_info(struct kfd_process *p,
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uint32_t *num_svm_ranges,
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uint64_t *svm_priv_data_size)
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{
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*num_svm_ranges = 0;
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*svm_priv_data_size = 0;
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return 0;
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}
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static inline int kfd_criu_checkpoint_svm(struct kfd_process *p,
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uint8_t __user *user_priv_data,
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uint64_t *priv_offset)
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{
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return 0;
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}
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static inline int kfd_criu_restore_svm(struct kfd_process *p,
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uint8_t __user *user_priv_ptr,
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uint64_t *priv_data_offset,
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uint64_t max_priv_data_size)
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{
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return -EINVAL;
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}
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static inline int kfd_criu_resume_svm(struct kfd_process *p)
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{
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return 0;
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}
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#define KFD_IS_SVM_API_SUPPORTED(dev) false
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#endif /* IS_ENABLED(CONFIG_HSA_AMD_SVM) */
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#endif /* KFD_SVM_H_ */
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