383 lines
10 KiB
C
383 lines
10 KiB
C
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// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
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/* Copyright(c) 2014 - 2020 Intel Corporation */
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include "adf_accel_devices.h"
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#include "adf_common_drv.h"
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#include "adf_cfg.h"
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#include "adf_cfg_strings.h"
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#include "adf_cfg_common.h"
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#include "adf_transport_access_macros.h"
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#include "adf_transport_internal.h"
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#define ADF_MAX_NUM_VFS 32
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static struct workqueue_struct *adf_misc_wq;
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static int adf_enable_msix(struct adf_accel_dev *accel_dev)
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{
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struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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u32 msix_num_entries = hw_data->num_banks + 1;
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int ret;
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if (hw_data->set_msix_rttable)
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hw_data->set_msix_rttable(accel_dev);
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ret = pci_alloc_irq_vectors(pci_dev_info->pci_dev, msix_num_entries,
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msix_num_entries, PCI_IRQ_MSIX);
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if (unlikely(ret < 0)) {
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dev_err(&GET_DEV(accel_dev),
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"Failed to allocate %d MSI-X vectors\n",
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msix_num_entries);
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return ret;
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}
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return 0;
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}
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static void adf_disable_msix(struct adf_accel_pci *pci_dev_info)
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{
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pci_free_irq_vectors(pci_dev_info->pci_dev);
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}
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static irqreturn_t adf_msix_isr_bundle(int irq, void *bank_ptr)
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{
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struct adf_etr_bank_data *bank = bank_ptr;
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struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev);
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csr_ops->write_csr_int_flag_and_col(bank->csr_addr, bank->bank_number,
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0);
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tasklet_hi_schedule(&bank->resp_handler);
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return IRQ_HANDLED;
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}
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#ifdef CONFIG_PCI_IOV
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void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask)
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{
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void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev);
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unsigned long flags;
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spin_lock_irqsave(&accel_dev->pf.vf2pf_ints_lock, flags);
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GET_PFVF_OPS(accel_dev)->enable_vf2pf_interrupts(pmisc_addr, vf_mask);
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spin_unlock_irqrestore(&accel_dev->pf.vf2pf_ints_lock, flags);
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}
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void adf_disable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask)
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{
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void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev);
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unsigned long flags;
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spin_lock_irqsave(&accel_dev->pf.vf2pf_ints_lock, flags);
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GET_PFVF_OPS(accel_dev)->disable_vf2pf_interrupts(pmisc_addr, vf_mask);
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spin_unlock_irqrestore(&accel_dev->pf.vf2pf_ints_lock, flags);
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}
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static u32 adf_disable_pending_vf2pf_interrupts(struct adf_accel_dev *accel_dev)
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{
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void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev);
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u32 pending;
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spin_lock(&accel_dev->pf.vf2pf_ints_lock);
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pending = GET_PFVF_OPS(accel_dev)->disable_pending_vf2pf_interrupts(pmisc_addr);
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spin_unlock(&accel_dev->pf.vf2pf_ints_lock);
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return pending;
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}
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static bool adf_handle_vf2pf_int(struct adf_accel_dev *accel_dev)
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{
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bool irq_handled = false;
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unsigned long vf_mask;
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/* Get the interrupt sources triggered by VFs, except for those already disabled */
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vf_mask = adf_disable_pending_vf2pf_interrupts(accel_dev);
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if (vf_mask) {
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struct adf_accel_vf_info *vf_info;
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int i;
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/*
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* Handle VF2PF interrupt unless the VF is malicious and
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* is attempting to flood the host OS with VF2PF interrupts.
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*/
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for_each_set_bit(i, &vf_mask, ADF_MAX_NUM_VFS) {
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vf_info = accel_dev->pf.vf_info + i;
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if (!__ratelimit(&vf_info->vf2pf_ratelimit)) {
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dev_info(&GET_DEV(accel_dev),
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"Too many ints from VF%d\n",
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vf_info->vf_nr);
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continue;
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}
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adf_schedule_vf2pf_handler(vf_info);
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irq_handled = true;
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}
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}
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return irq_handled;
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}
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#endif /* CONFIG_PCI_IOV */
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static bool adf_handle_pm_int(struct adf_accel_dev *accel_dev)
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{
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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if (hw_data->handle_pm_interrupt &&
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hw_data->handle_pm_interrupt(accel_dev))
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return true;
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return false;
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}
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static irqreturn_t adf_msix_isr_ae(int irq, void *dev_ptr)
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{
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struct adf_accel_dev *accel_dev = dev_ptr;
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#ifdef CONFIG_PCI_IOV
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/* If SR-IOV is enabled (vf_info is non-NULL), check for VF->PF ints */
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if (accel_dev->pf.vf_info && adf_handle_vf2pf_int(accel_dev))
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return IRQ_HANDLED;
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#endif /* CONFIG_PCI_IOV */
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if (adf_handle_pm_int(accel_dev))
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return IRQ_HANDLED;
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dev_dbg(&GET_DEV(accel_dev), "qat_dev%d spurious AE interrupt\n",
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accel_dev->accel_id);
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return IRQ_NONE;
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}
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static void adf_free_irqs(struct adf_accel_dev *accel_dev)
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{
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struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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struct adf_irq *irqs = pci_dev_info->msix_entries.irqs;
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struct adf_etr_data *etr_data = accel_dev->transport;
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int clust_irq = hw_data->num_banks;
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int irq, i = 0;
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if (pci_dev_info->msix_entries.num_entries > 1) {
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for (i = 0; i < hw_data->num_banks; i++) {
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if (irqs[i].enabled) {
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irq = pci_irq_vector(pci_dev_info->pci_dev, i);
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irq_set_affinity_hint(irq, NULL);
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free_irq(irq, &etr_data->banks[i]);
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}
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}
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}
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if (irqs[i].enabled) {
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irq = pci_irq_vector(pci_dev_info->pci_dev, clust_irq);
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free_irq(irq, accel_dev);
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}
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}
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static int adf_request_irqs(struct adf_accel_dev *accel_dev)
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{
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struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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struct adf_irq *irqs = pci_dev_info->msix_entries.irqs;
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struct adf_etr_data *etr_data = accel_dev->transport;
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int clust_irq = hw_data->num_banks;
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int ret, irq, i = 0;
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char *name;
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/* Request msix irq for all banks unless SR-IOV enabled */
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if (!accel_dev->pf.vf_info) {
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for (i = 0; i < hw_data->num_banks; i++) {
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struct adf_etr_bank_data *bank = &etr_data->banks[i];
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unsigned int cpu, cpus = num_online_cpus();
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name = irqs[i].name;
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snprintf(name, ADF_MAX_MSIX_VECTOR_NAME,
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"qat%d-bundle%d", accel_dev->accel_id, i);
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irq = pci_irq_vector(pci_dev_info->pci_dev, i);
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if (unlikely(irq < 0)) {
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dev_err(&GET_DEV(accel_dev),
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"Failed to get IRQ number of device vector %d - %s\n",
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i, name);
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ret = irq;
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goto err;
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}
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ret = request_irq(irq, adf_msix_isr_bundle, 0,
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&name[0], bank);
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if (ret) {
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dev_err(&GET_DEV(accel_dev),
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"Failed to allocate IRQ %d for %s\n",
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irq, name);
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goto err;
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}
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cpu = ((accel_dev->accel_id * hw_data->num_banks) +
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i) % cpus;
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irq_set_affinity_hint(irq, get_cpu_mask(cpu));
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irqs[i].enabled = true;
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}
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}
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/* Request msix irq for AE */
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name = irqs[i].name;
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snprintf(name, ADF_MAX_MSIX_VECTOR_NAME,
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"qat%d-ae-cluster", accel_dev->accel_id);
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irq = pci_irq_vector(pci_dev_info->pci_dev, clust_irq);
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if (unlikely(irq < 0)) {
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dev_err(&GET_DEV(accel_dev),
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"Failed to get IRQ number of device vector %d - %s\n",
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i, name);
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ret = irq;
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goto err;
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}
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ret = request_irq(irq, adf_msix_isr_ae, 0, &name[0], accel_dev);
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if (ret) {
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dev_err(&GET_DEV(accel_dev),
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"Failed to allocate IRQ %d for %s\n", irq, name);
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goto err;
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}
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irqs[i].enabled = true;
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return ret;
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err:
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adf_free_irqs(accel_dev);
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return ret;
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}
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static int adf_isr_alloc_msix_vectors_data(struct adf_accel_dev *accel_dev)
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{
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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u32 msix_num_entries = 1;
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struct adf_irq *irqs;
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/* If SR-IOV is disabled (vf_info is NULL), add entries for each bank */
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if (!accel_dev->pf.vf_info)
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msix_num_entries += hw_data->num_banks;
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irqs = kzalloc_node(msix_num_entries * sizeof(*irqs),
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GFP_KERNEL, dev_to_node(&GET_DEV(accel_dev)));
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if (!irqs)
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return -ENOMEM;
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accel_dev->accel_pci_dev.msix_entries.num_entries = msix_num_entries;
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accel_dev->accel_pci_dev.msix_entries.irqs = irqs;
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return 0;
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}
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static void adf_isr_free_msix_vectors_data(struct adf_accel_dev *accel_dev)
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{
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kfree(accel_dev->accel_pci_dev.msix_entries.irqs);
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accel_dev->accel_pci_dev.msix_entries.irqs = NULL;
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}
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static int adf_setup_bh(struct adf_accel_dev *accel_dev)
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{
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struct adf_etr_data *priv_data = accel_dev->transport;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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int i;
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for (i = 0; i < hw_data->num_banks; i++)
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tasklet_init(&priv_data->banks[i].resp_handler,
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adf_response_handler,
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(unsigned long)&priv_data->banks[i]);
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return 0;
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}
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static void adf_cleanup_bh(struct adf_accel_dev *accel_dev)
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{
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struct adf_etr_data *priv_data = accel_dev->transport;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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int i;
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for (i = 0; i < hw_data->num_banks; i++) {
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tasklet_disable(&priv_data->banks[i].resp_handler);
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tasklet_kill(&priv_data->banks[i].resp_handler);
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}
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}
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/**
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* adf_isr_resource_free() - Free IRQ for acceleration device
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* @accel_dev: Pointer to acceleration device.
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*
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* Function frees interrupts for acceleration device.
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*/
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void adf_isr_resource_free(struct adf_accel_dev *accel_dev)
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{
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adf_free_irqs(accel_dev);
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adf_cleanup_bh(accel_dev);
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adf_disable_msix(&accel_dev->accel_pci_dev);
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adf_isr_free_msix_vectors_data(accel_dev);
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}
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EXPORT_SYMBOL_GPL(adf_isr_resource_free);
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/**
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* adf_isr_resource_alloc() - Allocate IRQ for acceleration device
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* @accel_dev: Pointer to acceleration device.
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*
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* Function allocates interrupts for acceleration device.
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*
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* Return: 0 on success, error code otherwise.
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*/
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int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev)
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{
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int ret;
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ret = adf_isr_alloc_msix_vectors_data(accel_dev);
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if (ret)
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goto err_out;
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ret = adf_enable_msix(accel_dev);
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if (ret)
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goto err_free_msix_table;
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ret = adf_setup_bh(accel_dev);
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if (ret)
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goto err_disable_msix;
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ret = adf_request_irqs(accel_dev);
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if (ret)
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goto err_cleanup_bh;
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return 0;
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|
||
|
|
err_cleanup_bh:
|
||
|
|
adf_cleanup_bh(accel_dev);
|
||
|
|
|
||
|
|
err_disable_msix:
|
||
|
|
adf_disable_msix(&accel_dev->accel_pci_dev);
|
||
|
|
|
||
|
|
err_free_msix_table:
|
||
|
|
adf_isr_free_msix_vectors_data(accel_dev);
|
||
|
|
|
||
|
|
err_out:
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(adf_isr_resource_alloc);
|
||
|
|
|
||
|
|
/**
|
||
|
|
* adf_init_misc_wq() - Init misc workqueue
|
||
|
|
*
|
||
|
|
* Function init workqueue 'qat_misc_wq' for general purpose.
|
||
|
|
*
|
||
|
|
* Return: 0 on success, error code otherwise.
|
||
|
|
*/
|
||
|
|
int __init adf_init_misc_wq(void)
|
||
|
|
{
|
||
|
|
adf_misc_wq = alloc_workqueue("qat_misc_wq", WQ_MEM_RECLAIM, 0);
|
||
|
|
|
||
|
|
return !adf_misc_wq ? -ENOMEM : 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
void adf_exit_misc_wq(void)
|
||
|
|
{
|
||
|
|
if (adf_misc_wq)
|
||
|
|
destroy_workqueue(adf_misc_wq);
|
||
|
|
|
||
|
|
adf_misc_wq = NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
bool adf_misc_wq_queue_work(struct work_struct *work)
|
||
|
|
{
|
||
|
|
return queue_work(adf_misc_wq, work);
|
||
|
|
}
|