206 lines
6.1 KiB
C
206 lines
6.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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#include <linux/tboot.h>
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#include <asm/cpufeature.h>
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#include <asm/msr-index.h>
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#include <asm/processor.h>
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#include <asm/vmx.h>
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#include "cpu.h"
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#undef pr_fmt
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#define pr_fmt(fmt) "x86/cpu: " fmt
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#ifdef CONFIG_X86_VMX_FEATURE_NAMES
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enum vmx_feature_leafs {
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MISC_FEATURES = 0,
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PRIMARY_CTLS,
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SECONDARY_CTLS,
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NR_VMX_FEATURE_WORDS,
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};
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#define VMX_F(x) BIT(VMX_FEATURE_##x & 0x1f)
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static void init_vmx_capabilities(struct cpuinfo_x86 *c)
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{
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u32 supported, funcs, ept, vpid, ign;
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BUILD_BUG_ON(NVMXINTS != NR_VMX_FEATURE_WORDS);
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/*
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* The high bits contain the allowed-1 settings, i.e. features that can
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* be turned on. The low bits contain the allowed-0 settings, i.e.
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* features that can be turned off. Ignore the allowed-0 settings,
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* if a feature can be turned on then it's supported.
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*
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* Use raw rdmsr() for primary processor controls and pin controls MSRs
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* as they exist on any CPU that supports VMX, i.e. we want the WARN if
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* the RDMSR faults.
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*/
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rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, ign, supported);
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c->vmx_capability[PRIMARY_CTLS] = supported;
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rdmsr_safe(MSR_IA32_VMX_PROCBASED_CTLS2, &ign, &supported);
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c->vmx_capability[SECONDARY_CTLS] = supported;
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rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported);
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rdmsr_safe(MSR_IA32_VMX_VMFUNC, &ign, &funcs);
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/*
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* Except for EPT+VPID, which enumerates support for both in a single
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* MSR, low for EPT, high for VPID.
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*/
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rdmsr_safe(MSR_IA32_VMX_EPT_VPID_CAP, &ept, &vpid);
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/* Pin, EPT, VPID and VM-Func are merged into a single word. */
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WARN_ON_ONCE(supported >> 16);
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WARN_ON_ONCE(funcs >> 4);
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c->vmx_capability[MISC_FEATURES] = (supported & 0xffff) |
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((vpid & 0x1) << 16) |
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((funcs & 0xf) << 28);
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/* EPT bits are full on scattered and must be manually handled. */
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if (ept & VMX_EPT_EXECUTE_ONLY_BIT)
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c->vmx_capability[MISC_FEATURES] |= VMX_F(EPT_EXECUTE_ONLY);
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if (ept & VMX_EPT_AD_BIT)
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c->vmx_capability[MISC_FEATURES] |= VMX_F(EPT_AD);
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if (ept & VMX_EPT_1GB_PAGE_BIT)
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c->vmx_capability[MISC_FEATURES] |= VMX_F(EPT_1GB);
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/* Synthetic APIC features that are aggregates of multiple features. */
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if ((c->vmx_capability[PRIMARY_CTLS] & VMX_F(VIRTUAL_TPR)) &&
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(c->vmx_capability[SECONDARY_CTLS] & VMX_F(VIRT_APIC_ACCESSES)))
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c->vmx_capability[MISC_FEATURES] |= VMX_F(FLEXPRIORITY);
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if ((c->vmx_capability[PRIMARY_CTLS] & VMX_F(VIRTUAL_TPR)) &&
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(c->vmx_capability[SECONDARY_CTLS] & VMX_F(APIC_REGISTER_VIRT)) &&
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(c->vmx_capability[SECONDARY_CTLS] & VMX_F(VIRT_INTR_DELIVERY)) &&
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(c->vmx_capability[MISC_FEATURES] & VMX_F(POSTED_INTR)))
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c->vmx_capability[MISC_FEATURES] |= VMX_F(APICV);
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/* Set the synthetic cpufeatures to preserve /proc/cpuinfo's ABI. */
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if (c->vmx_capability[PRIMARY_CTLS] & VMX_F(VIRTUAL_TPR))
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set_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
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if (c->vmx_capability[MISC_FEATURES] & VMX_F(FLEXPRIORITY))
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set_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
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if (c->vmx_capability[MISC_FEATURES] & VMX_F(VIRTUAL_NMIS))
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set_cpu_cap(c, X86_FEATURE_VNMI);
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if (c->vmx_capability[SECONDARY_CTLS] & VMX_F(EPT))
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set_cpu_cap(c, X86_FEATURE_EPT);
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if (c->vmx_capability[MISC_FEATURES] & VMX_F(EPT_AD))
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set_cpu_cap(c, X86_FEATURE_EPT_AD);
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if (c->vmx_capability[MISC_FEATURES] & VMX_F(VPID))
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set_cpu_cap(c, X86_FEATURE_VPID);
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}
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#endif /* CONFIG_X86_VMX_FEATURE_NAMES */
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static int __init nosgx(char *str)
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{
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setup_clear_cpu_cap(X86_FEATURE_SGX);
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return 0;
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}
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early_param("nosgx", nosgx);
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void init_ia32_feat_ctl(struct cpuinfo_x86 *c)
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{
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bool enable_sgx_kvm = false, enable_sgx_driver = false;
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bool tboot = tboot_enabled();
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bool enable_vmx;
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u64 msr;
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if (rdmsrl_safe(MSR_IA32_FEAT_CTL, &msr)) {
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clear_cpu_cap(c, X86_FEATURE_VMX);
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clear_cpu_cap(c, X86_FEATURE_SGX);
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return;
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}
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enable_vmx = cpu_has(c, X86_FEATURE_VMX) &&
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IS_ENABLED(CONFIG_KVM_INTEL);
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if (cpu_has(c, X86_FEATURE_SGX) && IS_ENABLED(CONFIG_X86_SGX)) {
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/*
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* Separate out SGX driver enabling from KVM. This allows KVM
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* guests to use SGX even if the kernel SGX driver refuses to
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* use it. This happens if flexible Launch Control is not
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* available.
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*/
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enable_sgx_driver = cpu_has(c, X86_FEATURE_SGX_LC);
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enable_sgx_kvm = enable_vmx && IS_ENABLED(CONFIG_X86_SGX_KVM);
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}
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if (msr & FEAT_CTL_LOCKED)
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goto update_caps;
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/*
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* Ignore whatever value BIOS left in the MSR to avoid enabling random
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* features or faulting on the WRMSR.
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*/
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msr = FEAT_CTL_LOCKED;
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/*
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* Enable VMX if and only if the kernel may do VMXON at some point,
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* i.e. KVM is enabled, to avoid unnecessarily adding an attack vector
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* for the kernel, e.g. using VMX to hide malicious code.
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*/
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if (enable_vmx) {
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msr |= FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX;
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if (tboot)
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msr |= FEAT_CTL_VMX_ENABLED_INSIDE_SMX;
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}
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if (enable_sgx_kvm || enable_sgx_driver) {
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msr |= FEAT_CTL_SGX_ENABLED;
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if (enable_sgx_driver)
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msr |= FEAT_CTL_SGX_LC_ENABLED;
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}
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wrmsrl(MSR_IA32_FEAT_CTL, msr);
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update_caps:
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set_cpu_cap(c, X86_FEATURE_MSR_IA32_FEAT_CTL);
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if (!cpu_has(c, X86_FEATURE_VMX))
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goto update_sgx;
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if ( (tboot && !(msr & FEAT_CTL_VMX_ENABLED_INSIDE_SMX)) ||
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(!tboot && !(msr & FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX))) {
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if (IS_ENABLED(CONFIG_KVM_INTEL))
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pr_err_once("VMX (%s TXT) disabled by BIOS\n",
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tboot ? "inside" : "outside");
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clear_cpu_cap(c, X86_FEATURE_VMX);
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} else {
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#ifdef CONFIG_X86_VMX_FEATURE_NAMES
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init_vmx_capabilities(c);
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#endif
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}
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update_sgx:
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if (!(msr & FEAT_CTL_SGX_ENABLED)) {
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if (enable_sgx_kvm || enable_sgx_driver)
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pr_err_once("SGX disabled by BIOS.\n");
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clear_cpu_cap(c, X86_FEATURE_SGX);
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return;
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}
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/*
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* VMX feature bit may be cleared due to being disabled in BIOS,
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* in which case SGX virtualization cannot be supported either.
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*/
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if (!cpu_has(c, X86_FEATURE_VMX) && enable_sgx_kvm) {
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pr_err_once("SGX virtualization disabled due to lack of VMX.\n");
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enable_sgx_kvm = 0;
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}
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if (!(msr & FEAT_CTL_SGX_LC_ENABLED) && enable_sgx_driver) {
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if (!enable_sgx_kvm) {
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pr_err_once("SGX Launch Control is locked. Disable SGX.\n");
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clear_cpu_cap(c, X86_FEATURE_SGX);
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} else {
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pr_err_once("SGX Launch Control is locked. Support SGX virtualization only.\n");
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clear_cpu_cap(c, X86_FEATURE_SGX_LC);
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}
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}
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}
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