106 lines
2.2 KiB
C
106 lines
2.2 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_IBT_H
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#define _ASM_X86_IBT_H
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#include <linux/types.h>
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/*
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* The rules for enabling IBT are:
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*
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* - CC_HAS_IBT: the toolchain supports it
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* - X86_KERNEL_IBT: it is selected in Kconfig
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* - !__DISABLE_EXPORTS: this is regular kernel code
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*
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* Esp. that latter one is a bit non-obvious, but some code like compressed,
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* purgatory, realmode etc.. is built with custom CFLAGS that do not include
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* -fcf-protection=branch and things will go *bang*.
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*
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* When all the above are satisfied, HAS_KERNEL_IBT will be 1, otherwise 0.
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*/
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#if defined(CONFIG_X86_KERNEL_IBT) && !defined(__DISABLE_EXPORTS)
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#define HAS_KERNEL_IBT 1
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_X86_64
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#define ASM_ENDBR "endbr64\n\t"
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#else
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#define ASM_ENDBR "endbr32\n\t"
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#endif
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#define __noendbr __attribute__((nocf_check))
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static inline __attribute_const__ u32 gen_endbr(void)
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{
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u32 endbr;
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/*
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* Generate ENDBR64 in a way that is sure to not result in
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* an ENDBR64 instruction as immediate.
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*/
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asm ( "mov $~0xfa1e0ff3, %[endbr]\n\t"
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"not %[endbr]\n\t"
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: [endbr] "=&r" (endbr) );
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return endbr;
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}
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static inline __attribute_const__ u32 gen_endbr_poison(void)
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{
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/*
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* 4 byte NOP that isn't NOP4 (in fact it is OSP NOP3), such that it
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* will be unique to (former) ENDBR sites.
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*/
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return 0x001f0f66; /* osp nopl (%rax) */
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}
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static inline bool is_endbr(u32 val)
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{
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if (val == gen_endbr_poison())
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return true;
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val &= ~0x01000000U; /* ENDBR32 -> ENDBR64 */
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return val == gen_endbr();
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}
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extern __noendbr u64 ibt_save(void);
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extern __noendbr void ibt_restore(u64 save);
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#else /* __ASSEMBLY__ */
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#ifdef CONFIG_X86_64
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#define ENDBR endbr64
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#else
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#define ENDBR endbr32
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#endif
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#endif /* __ASSEMBLY__ */
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#else /* !IBT */
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#define HAS_KERNEL_IBT 0
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#ifndef __ASSEMBLY__
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#define ASM_ENDBR
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#define __noendbr
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static inline bool is_endbr(u32 val) { return false; }
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static inline u64 ibt_save(void) { return 0; }
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static inline void ibt_restore(u64 save) { }
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#else /* __ASSEMBLY__ */
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#define ENDBR
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_X86_KERNEL_IBT */
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#define ENDBR_INSN_SIZE (4*HAS_KERNEL_IBT)
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#endif /* _ASM_X86_IBT_H */
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