137 lines
3.9 KiB
C
137 lines
3.9 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_BOOK3S_64_HUGETLB_H
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#define _ASM_POWERPC_BOOK3S_64_HUGETLB_H
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/*
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* For radix we want generic code to handle hugetlb. But then if we want
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* both hash and radix to be enabled together we need to workaround the
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* limitations.
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*/
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void radix__flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
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void radix__local_flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
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extern unsigned long
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radix__hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
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unsigned long len, unsigned long pgoff,
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unsigned long flags);
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extern void radix__huge_ptep_modify_prot_commit(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep,
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pte_t old_pte, pte_t pte);
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static inline int hstate_get_psize(struct hstate *hstate)
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{
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unsigned long shift;
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shift = huge_page_shift(hstate);
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if (shift == mmu_psize_defs[MMU_PAGE_2M].shift)
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return MMU_PAGE_2M;
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else if (shift == mmu_psize_defs[MMU_PAGE_1G].shift)
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return MMU_PAGE_1G;
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else if (shift == mmu_psize_defs[MMU_PAGE_16M].shift)
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return MMU_PAGE_16M;
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else if (shift == mmu_psize_defs[MMU_PAGE_16G].shift)
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return MMU_PAGE_16G;
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else {
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WARN(1, "Wrong huge page shift\n");
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return mmu_virtual_psize;
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}
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}
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#define __HAVE_ARCH_GIGANTIC_PAGE_RUNTIME_SUPPORTED
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static inline bool gigantic_page_runtime_supported(void)
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{
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/*
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* We used gigantic page reservation with hypervisor assist in some case.
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* We cannot use runtime allocation of gigantic pages in those platforms
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* This is hash translation mode LPARs.
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*/
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if (firmware_has_feature(FW_FEATURE_LPAR) && !radix_enabled())
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return false;
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return true;
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}
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/* hugepd entry valid bit */
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#define HUGEPD_VAL_BITS (0x8000000000000000UL)
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#define huge_ptep_modify_prot_start huge_ptep_modify_prot_start
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extern pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep);
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#define huge_ptep_modify_prot_commit huge_ptep_modify_prot_commit
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extern void huge_ptep_modify_prot_commit(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep,
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pte_t old_pte, pte_t new_pte);
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/*
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* This should work for other subarchs too. But right now we use the
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* new format only for 64bit book3s
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*/
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static inline pte_t *hugepd_page(hugepd_t hpd)
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{
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BUG_ON(!hugepd_ok(hpd));
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/*
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* We have only four bits to encode, MMU page size
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*/
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BUILD_BUG_ON((MMU_PAGE_COUNT - 1) > 0xf);
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return __va(hpd_val(hpd) & HUGEPD_ADDR_MASK);
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}
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static inline unsigned int hugepd_mmu_psize(hugepd_t hpd)
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{
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return (hpd_val(hpd) & HUGEPD_SHIFT_MASK) >> 2;
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}
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static inline unsigned int hugepd_shift(hugepd_t hpd)
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{
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return mmu_psize_to_shift(hugepd_mmu_psize(hpd));
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}
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static inline void flush_hugetlb_page(struct vm_area_struct *vma,
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unsigned long vmaddr)
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{
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if (radix_enabled())
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return radix__flush_hugetlb_page(vma, vmaddr);
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}
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static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
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unsigned int pdshift)
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{
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unsigned long idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd);
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return hugepd_page(hpd) + idx;
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}
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static inline void hugepd_populate(hugepd_t *hpdp, pte_t *new, unsigned int pshift)
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{
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*hpdp = __hugepd(__pa(new) | HUGEPD_VAL_BITS | (shift_to_mmu_psize(pshift) << 2));
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}
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void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
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static inline int check_and_get_huge_psize(int shift)
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{
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int mmu_psize;
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if (shift > SLICE_HIGH_SHIFT)
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return -EINVAL;
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mmu_psize = shift_to_mmu_psize(shift);
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/*
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* We need to make sure that for different page sizes reported by
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* firmware we only add hugetlb support for page sizes that can be
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* supported by linux page table layout.
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* For now we have
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* Radix: 2M and 1G
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* Hash: 16M and 16G
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*/
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if (radix_enabled()) {
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if (mmu_psize != MMU_PAGE_2M && mmu_psize != MMU_PAGE_1G)
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return -EINVAL;
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} else {
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if (mmu_psize != MMU_PAGE_16M && mmu_psize != MMU_PAGE_16G)
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return -EINVAL;
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}
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return mmu_psize;
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}
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#endif
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