83 lines
1.9 KiB
Plaintext
83 lines
1.9 KiB
Plaintext
|
// SPDX-License-Identifier: GPL-2.0-or-later
|
||
|
/*
|
||
|
* MPC8548 CDS Device Tree Source (32-bit address map)
|
||
|
*
|
||
|
* Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc.
|
||
|
*/
|
||
|
|
||
|
/include/ "mpc8548si-pre.dtsi"
|
||
|
|
||
|
/ {
|
||
|
model = "MPC8548CDS";
|
||
|
compatible = "MPC8548CDS", "MPC85xxCDS";
|
||
|
|
||
|
memory {
|
||
|
device_type = "memory";
|
||
|
reg = <0 0 0x0 0x8000000>; // 128M at 0x0
|
||
|
};
|
||
|
|
||
|
board_lbc: lbc: localbus@e0005000 {
|
||
|
reg = <0 0xe0005000 0 0x1000>;
|
||
|
|
||
|
ranges = <0x0 0x0 0x0 0xff000000 0x01000000
|
||
|
0x1 0x0 0x0 0xf8004000 0x00001000>;
|
||
|
|
||
|
};
|
||
|
|
||
|
board_soc: soc: soc8548@e0000000 {
|
||
|
ranges = <0 0x0 0xe0000000 0x100000>;
|
||
|
};
|
||
|
|
||
|
board_pci0: pci0: pci@e0008000 {
|
||
|
reg = <0 0xe0008000 0 0x1000>;
|
||
|
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
|
||
|
0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>;
|
||
|
clock-frequency = <66666666>;
|
||
|
};
|
||
|
|
||
|
pci1: pci@e0009000 {
|
||
|
reg = <0 0xe0009000 0 0x1000>;
|
||
|
ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
|
||
|
0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>;
|
||
|
clock-frequency = <66666666>;
|
||
|
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||
|
interrupt-map = <
|
||
|
|
||
|
/* IDSEL 0x15 */
|
||
|
0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
|
||
|
0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
|
||
|
0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
|
||
|
0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
|
||
|
};
|
||
|
|
||
|
pci2: pcie@e000a000 {
|
||
|
reg = <0 0xe000a000 0 0x1000>;
|
||
|
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||
|
0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>;
|
||
|
pcie@0 {
|
||
|
ranges = <0x2000000 0x0 0xa0000000
|
||
|
0x2000000 0x0 0xa0000000
|
||
|
0x0 0x20000000
|
||
|
|
||
|
0x1000000 0x0 0x0
|
||
|
0x1000000 0x0 0x0
|
||
|
0x0 0x100000>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
rio: rapidio@e00c0000 {
|
||
|
reg = <0x0 0xe00c0000 0x0 0x20000>;
|
||
|
port1 {
|
||
|
ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
|
||
|
/*
|
||
|
* mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
|
||
|
* for interrupt-map & interrupt-map-mask.
|
||
|
*/
|
||
|
|
||
|
/include/ "mpc8548si-post.dtsi"
|
||
|
/include/ "mpc8548cds.dtsi"
|