599 lines
12 KiB
Plaintext
599 lines
12 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0
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#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
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#include <dt-bindings/clock/ingenic,tcu.h>
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#include <dt-bindings/dma/jz4780-dma.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ingenic,jz4780";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "ingenic,xburst-fpu1.0-mxu1.1";
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reg = <0>;
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clocks = <&cgu JZ4780_CLK_CPU>;
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clock-names = "cpu";
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "ingenic,xburst-fpu1.0-mxu1.1";
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reg = <1>;
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clocks = <&cgu JZ4780_CLK_CORE1>;
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clock-names = "cpu";
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};
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};
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cpuintc: interrupt-controller {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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intc: interrupt-controller@10001000 {
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compatible = "ingenic,jz4780-intc";
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reg = <0x10001000 0x50>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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ext: ext {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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};
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rtc: rtc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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cgu: jz4780-cgu@10000000 {
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compatible = "ingenic,jz4780-cgu", "simple-mfd";
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reg = <0x10000000 0x100>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x10000000 0x100>;
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#clock-cells = <1>;
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clocks = <&ext>, <&rtc>;
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clock-names = "ext", "rtc";
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otg_phy: usb-phy@3c {
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compatible = "ingenic,jz4780-phy";
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reg = <0x3c 0x10>;
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clocks = <&cgu JZ4780_CLK_OTG1>;
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#phy-cells = <0>;
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status = "disabled";
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};
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rng: rng@d8 {
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compatible = "ingenic,jz4780-rng";
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reg = <0xd8 0x8>;
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status = "disabled";
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};
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};
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tcu: timer@10002000 {
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compatible = "ingenic,jz4780-tcu",
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"ingenic,jz4770-tcu",
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"simple-mfd";
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reg = <0x10002000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x10002000 0x1000>;
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#clock-cells = <1>;
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clocks = <&cgu JZ4780_CLK_RTCLK>,
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<&cgu JZ4780_CLK_EXCLK>,
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<&cgu JZ4780_CLK_PCLK>;
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clock-names = "rtc", "ext", "pclk";
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&intc>;
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interrupts = <27 26 25>;
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watchdog: watchdog@0 {
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compatible = "ingenic,jz4780-watchdog";
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reg = <0x0 0xc>;
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clocks = <&tcu TCU_CLK_WDT>;
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clock-names = "wdt";
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};
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pwm: pwm@40 {
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compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
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reg = <0x40 0x80>;
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#pwm-cells = <3>;
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clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
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<&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
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<&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
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<&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
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clock-names = "timer0", "timer1", "timer2", "timer3",
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"timer4", "timer5", "timer6", "timer7";
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};
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ost: timer@e0 {
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compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
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reg = <0xe0 0x20>;
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clocks = <&tcu TCU_CLK_OST>;
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clock-names = "ost";
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interrupts = <15>;
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};
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};
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rtc_dev: rtc@10003000 {
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compatible = "ingenic,jz4780-rtc";
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reg = <0x10003000 0x4c>;
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interrupt-parent = <&intc>;
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interrupts = <32>;
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clocks = <&cgu JZ4780_CLK_RTCLK>;
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clock-names = "rtc";
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};
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pinctrl: pin-controller@10010000 {
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compatible = "ingenic,jz4780-pinctrl";
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reg = <0x10010000 0x600>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpa: gpio@0 {
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compatible = "ingenic,jz4780-gpio";
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reg = <0>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <17>;
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};
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gpb: gpio@1 {
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compatible = "ingenic,jz4780-gpio";
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reg = <1>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 32 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <16>;
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};
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gpc: gpio@2 {
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compatible = "ingenic,jz4780-gpio";
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reg = <2>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 64 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <15>;
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};
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gpd: gpio@3 {
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compatible = "ingenic,jz4780-gpio";
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reg = <3>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 96 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <14>;
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};
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gpe: gpio@4 {
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compatible = "ingenic,jz4780-gpio";
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reg = <4>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 128 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <13>;
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};
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gpf: gpio@5 {
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compatible = "ingenic,jz4780-gpio";
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reg = <5>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 160 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <12>;
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};
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};
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spi0: spi@10043000 {
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compatible = "ingenic,jz4780-spi";
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reg = <0x10043000 0x1c>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&intc>;
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interrupts = <8>;
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clocks = <&cgu JZ4780_CLK_SSI0>;
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clock-names = "spi";
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dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>,
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<&dma JZ4780_DMA_SSI0_TX 0xffffffff>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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uart0: serial@10030000 {
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compatible = "ingenic,jz4780-uart";
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reg = <0x10030000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <51>;
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clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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uart1: serial@10031000 {
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compatible = "ingenic,jz4780-uart";
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reg = <0x10031000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <50>;
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clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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uart2: serial@10032000 {
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compatible = "ingenic,jz4780-uart";
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reg = <0x10032000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <49>;
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clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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uart3: serial@10033000 {
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compatible = "ingenic,jz4780-uart";
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reg = <0x10033000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <48>;
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clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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uart4: serial@10034000 {
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compatible = "ingenic,jz4780-uart";
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reg = <0x10034000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <34>;
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clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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spi1: spi@10044000 {
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compatible = "ingenic,jz4780-spi";
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reg = <0x10044000 0x1c>;
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#address-cells = <1>;
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#size-sells = <0>;
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interrupt-parent = <&intc>;
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interrupts = <7>;
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clocks = <&cgu JZ4780_CLK_SSI1>;
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clock-names = "spi";
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dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>,
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<&dma JZ4780_DMA_SSI1_TX 0xffffffff>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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i2c0: i2c@10050000 {
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compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10050000 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <60>;
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clocks = <&cgu JZ4780_CLK_SMB0>;
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_i2c0_data>;
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status = "disabled";
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};
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i2c1: i2c@10051000 {
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compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10051000 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <59>;
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clocks = <&cgu JZ4780_CLK_SMB1>;
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pins_i2c1_data>;
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status = "disabled";
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};
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i2c2: i2c@10052000 {
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compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
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#address-cells = <1>;
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|
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#size-cells = <0>;
|
||
|
|
reg = <0x10052000 0x1000>;
|
||
|
|
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <58>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_SMB2>;
|
||
|
|
clock-frequency = <100000>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pins_i2c2_data>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c3: i2c@10053000 {
|
||
|
|
compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
reg = <0x10053000 0x1000>;
|
||
|
|
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <57>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_SMB3>;
|
||
|
|
clock-frequency = <100000>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pins_i2c3_data>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
i2c4: i2c@10054000 {
|
||
|
|
compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
reg = <0x10054000 0x1000>;
|
||
|
|
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <56>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_SMB4>;
|
||
|
|
clock-frequency = <100000>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&pins_i2c4_data>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
hdmi: hdmi@10180000 {
|
||
|
|
compatible = "ingenic,jz4780-dw-hdmi";
|
||
|
|
reg = <0x10180000 0x8000>;
|
||
|
|
reg-io-width = <4>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>;
|
||
|
|
clock-names = "iahb", "isfr";
|
||
|
|
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <3>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
lcdc0: lcdc0@13050000 {
|
||
|
|
compatible = "ingenic,jz4780-lcd";
|
||
|
|
reg = <0x13050000 0x1800>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>;
|
||
|
|
clock-names = "lcd", "lcd_pclk";
|
||
|
|
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <31>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
lcdc1: lcdc1@130a0000 {
|
||
|
|
compatible = "ingenic,jz4780-lcd";
|
||
|
|
reg = <0x130a0000 0x1800>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>;
|
||
|
|
clock-names = "lcd", "lcd_pclk";
|
||
|
|
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <23>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
nemc: nemc@13410000 {
|
||
|
|
compatible = "ingenic,jz4780-nemc", "simple-mfd";
|
||
|
|
reg = <0x13410000 0x10000>;
|
||
|
|
#address-cells = <2>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
ranges = <0 0 0x13410000 0x10000>,
|
||
|
|
<1 0 0x1b000000 0x1000000>,
|
||
|
|
<2 0 0x1a000000 0x1000000>,
|
||
|
|
<3 0 0x19000000 0x1000000>,
|
||
|
|
<4 0 0x18000000 0x1000000>,
|
||
|
|
<5 0 0x17000000 0x1000000>,
|
||
|
|
<6 0 0x16000000 0x1000000>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_NEMC>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
|
||
|
|
efuse: efuse@d0 {
|
||
|
|
reg = <0 0xd0 0x30>;
|
||
|
|
compatible = "ingenic,jz4780-efuse";
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_AHB2>;
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
|
||
|
|
eth0_addr: eth-mac-addr@22 {
|
||
|
|
reg = <0x22 0x6>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
dma: dma@13420000 {
|
||
|
|
compatible = "ingenic,jz4780-dma";
|
||
|
|
reg = <0x13420000 0x400>, <0x13421000 0x40>;
|
||
|
|
#dma-cells = <2>;
|
||
|
|
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <10>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_PDMA>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mmc0: mmc@13450000 {
|
||
|
|
compatible = "ingenic,jz4780-mmc";
|
||
|
|
reg = <0x13450000 0x1000>;
|
||
|
|
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <37>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_MSC0>;
|
||
|
|
clock-names = "mmc";
|
||
|
|
|
||
|
|
cap-sd-highspeed;
|
||
|
|
cap-mmc-highspeed;
|
||
|
|
cap-sdio-irq;
|
||
|
|
dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
|
||
|
|
<&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
|
||
|
|
dma-names = "rx", "tx";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
mmc1: mmc@13460000 {
|
||
|
|
compatible = "ingenic,jz4780-mmc";
|
||
|
|
reg = <0x13460000 0x1000>;
|
||
|
|
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <36>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_MSC1>;
|
||
|
|
clock-names = "mmc";
|
||
|
|
|
||
|
|
cap-sd-highspeed;
|
||
|
|
cap-mmc-highspeed;
|
||
|
|
cap-sdio-irq;
|
||
|
|
dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
|
||
|
|
<&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
|
||
|
|
dma-names = "rx", "tx";
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
bch: bch@134d0000 {
|
||
|
|
compatible = "ingenic,jz4780-bch";
|
||
|
|
reg = <0x134d0000 0x10000>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_BCH>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
otg: usb@13500000 {
|
||
|
|
compatible = "ingenic,jz4780-otg", "snps,dwc2";
|
||
|
|
reg = <0x13500000 0x40000>;
|
||
|
|
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <21>;
|
||
|
|
|
||
|
|
clocks = <&cgu JZ4780_CLK_UHC>;
|
||
|
|
clock-names = "otg";
|
||
|
|
|
||
|
|
phys = <&otg_phy>;
|
||
|
|
phy-names = "usb2-phy";
|
||
|
|
|
||
|
|
g-rx-fifo-size = <768>;
|
||
|
|
g-np-tx-fifo-size = <256>;
|
||
|
|
g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
|
||
|
|
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
};
|