95 lines
1.9 KiB
Plaintext
95 lines
1.9 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Device Tree Source for the RZ/G2LC SMARC pincontrol parts
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*
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* Copyright (C) 2021 Renesas Electronics Corp.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
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&pinctrl {
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pinctrl-0 = <&sound_clk_pins>;
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pinctrl-names = "default";
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scif0_pins: scif0 {
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pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
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<RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
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};
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#if SW_SCIF_CAN
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/* SW8 should be at position 2->1 */
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can1_pins: can1 {
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pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */
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<RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */
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};
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#endif
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scif1_pins: scif1 {
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pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */
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<RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */
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<RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */
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<RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
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};
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#if SW_RSPI_CAN
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/* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
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can1-stb-hog {
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gpio-hog;
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gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "can1_stb";
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};
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can1_pins: can1 {
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pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */
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<RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */
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};
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#endif
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sd1-pwr-en-hog {
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gpio-hog;
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gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "sd1_pwr_en";
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};
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sdhi1_pins: sd1 {
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sd1_data {
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pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
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power-source = <3300>;
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};
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sd1_ctrl {
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pins = "SD1_CLK", "SD1_CMD";
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power-source = <3300>;
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};
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sd1_mux {
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pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
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};
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};
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sdhi1_pins_uhs: sd1_uhs {
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sd1_data_uhs {
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pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
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power-source = <1800>;
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};
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sd1_ctrl_uhs {
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pins = "SD1_CLK", "SD1_CMD";
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power-source = <1800>;
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};
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sd1_mux_uhs {
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pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
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};
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};
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sound_clk_pins: sound_clk {
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pins = "AUDIO_CLK1", "AUDIO_CLK2";
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input-enable;
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};
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};
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