156 lines
3.7 KiB
C
156 lines
3.7 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/kernel/irq.c
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*
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* Copyright (C) 1992 Linus Torvalds
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* Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
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*
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* Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
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* Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
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* Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
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*
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* This file contains the code used by various IRQ handling routines:
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* asking for different IRQ's should be done through these routines
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* instead of just grabbing them. Thus setups with different IRQ numbers
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* shouldn't result in any weird surprises, and installing new handlers
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* should be easier.
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*
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* IRQ's are in fact implemented a bit like signal handlers for the kernel.
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* Naturally it's not a 1:1 relation, but there are similarities.
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*/
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#include <linux/signal.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/random.h>
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#include <linux/smp.h>
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#include <linux/init.h>
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#include <linux/seq_file.h>
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#include <linux/errno.h>
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#include <linux/list.h>
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#include <linux/kallsyms.h>
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#include <linux/proc_fs.h>
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#include <linux/export.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/hardware/cache-uniphier.h>
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#include <asm/outercache.h>
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#include <asm/softirq_stack.h>
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#include <asm/exception.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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#include "reboot.h"
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unsigned long irq_err_count;
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#ifdef CONFIG_IRQSTACKS
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asmlinkage DEFINE_PER_CPU_READ_MOSTLY(u8 *, irq_stack_ptr);
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static void __init init_irq_stacks(void)
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{
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u8 *stack;
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int cpu;
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for_each_possible_cpu(cpu) {
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if (!IS_ENABLED(CONFIG_VMAP_STACK))
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stack = (u8 *)__get_free_pages(GFP_KERNEL,
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THREAD_SIZE_ORDER);
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else
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stack = __vmalloc_node(THREAD_SIZE, THREAD_ALIGN,
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THREADINFO_GFP, NUMA_NO_NODE,
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__builtin_return_address(0));
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if (WARN_ON(!stack))
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break;
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per_cpu(irq_stack_ptr, cpu) = &stack[THREAD_SIZE];
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}
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}
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static void ____do_softirq(void *arg)
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{
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__do_softirq();
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}
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void do_softirq_own_stack(void)
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{
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call_with_stack(____do_softirq, NULL,
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__this_cpu_read(irq_stack_ptr));
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}
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#endif
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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#ifdef CONFIG_FIQ
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show_fiq_list(p, prec);
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#endif
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#ifdef CONFIG_SMP
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show_ipi_list(p, prec);
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#endif
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seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
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return 0;
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}
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/*
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* handle_IRQ handles all hardware IRQ's. Decoded IRQs should
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* not come via this function. Instead, they should provide their
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* own 'handler'. Used by platform code implementing C-based 1st
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* level decoding.
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*/
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void handle_IRQ(unsigned int irq, struct pt_regs *regs)
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{
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struct irq_desc *desc;
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/*
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* Some hardware gives randomly wrong interrupts. Rather
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* than crashing, do something sensible.
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*/
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if (unlikely(!irq || irq >= nr_irqs))
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desc = NULL;
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else
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desc = irq_to_desc(irq);
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if (likely(desc))
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handle_irq_desc(desc);
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else
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ack_bad_irq(irq);
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}
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void __init init_IRQ(void)
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{
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int ret;
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#ifdef CONFIG_IRQSTACKS
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init_irq_stacks();
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#endif
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if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
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irqchip_init();
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else
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machine_desc->init_irq();
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if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
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(machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
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if (!outer_cache.write_sec)
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outer_cache.write_sec = machine_desc->l2c_write_sec;
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ret = l2x0_of_init(machine_desc->l2c_aux_val,
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machine_desc->l2c_aux_mask);
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if (ret && ret != -ENODEV)
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pr_err("L2C: failed to init: %d\n", ret);
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}
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uniphier_cache_init();
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}
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#ifdef CONFIG_SPARSE_IRQ
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int __init arch_probe_nr_irqs(void)
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{
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nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
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return nr_irqs;
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}
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#endif
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