835 lines
18 KiB
Plaintext
835 lines
18 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (c) 2014 Protonic Holland
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* Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
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*/
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#include <dt-bindings/display/sdtv-standards.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/media/tvp5150.h>
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#include <dt-bindings/sound/fsl-imx-audmux.h>
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/ {
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chosen {
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stdout-path = &uart4;
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_backlight>;
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pwms = <&pwm1 0 5000000 0>;
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brightness-levels = <0 16 64 255>;
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num-interpolated-steps = <16>;
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default-brightness-level = <1>;
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power-supply = <®_3v3>;
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enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
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};
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connector {
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compatible = "composite-video-connector";
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label = "Composite0";
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sdtv-standards = <SDTV_STD_PAL_B>;
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port {
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comp0_out: endpoint {
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remote-endpoint = <&tvp5150_comp0_in>;
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};
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};
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};
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counter-0 {
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compatible = "interrupt-counter";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_counter0>;
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gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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};
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counter-1 {
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compatible = "interrupt-counter";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_counter1>;
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gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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};
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counter-2 {
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compatible = "interrupt-counter";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_counter2>;
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gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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autorepeat;
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power {
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label = "Power Button";
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gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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wakeup-source;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_leds>;
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led-0 {
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label = "LED_DI0_DEBUG_0";
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function = LED_FUNCTION_HEARTBEAT;
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gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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led-1 {
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label = "LED_DI0_DEBUG_1";
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function = LED_FUNCTION_DISK;
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gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "disk-activity";
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};
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led-2 {
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label = "POWER_LED";
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function = LED_FUNCTION_POWER;
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gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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panel {
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compatible = "kyo,tcg121xglp";
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backlight = <&backlight>;
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power-supply = <®_3v3>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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};
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reg_1v8: regulator-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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reg_3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_otg_vbus: regulator-otg-vbus {
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compatible = "regulator-fixed";
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regulator-name = "otg-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_wifi: regulator-wifi {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wifi_npd>;
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regulator-name = "wifi";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <70000>;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "prti6q-sgtl5000";
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simple-audio-card,format = "i2s";
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simple-audio-card,widgets =
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"Microphone", "Microphone Jack",
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"Line", "Line In Jack",
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"Headphone", "Headphone Jack",
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"Speaker", "External Speaker";
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simple-audio-card,routing =
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"MIC_IN", "Microphone Jack",
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"LINE_IN", "Line In Jack",
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"Headphone Jack", "HP_OUT",
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"External Speaker", "LINE_OUT";
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simple-audio-card,cpu {
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sound-dai = <&ssi1>;
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system-clock-frequency = <0>; /* Do NOT call fsl_ssi_set_dai_sysclk! */
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};
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simple-audio-card,codec {
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sound-dai = <&codec>;
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bitclock-master;
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frame-master;
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};
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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mux-ssi1 {
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fsl,audmux-port = <0>;
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fsl,port-config = <
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IMX_AUDMUX_V2_PTCR_SYN 0
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IMX_AUDMUX_V2_PTCR_TFSEL(2) 0
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IMX_AUDMUX_V2_PTCR_TCSEL(2) 0
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IMX_AUDMUX_V2_PTCR_TFSDIR 0
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IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
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>;
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};
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mux-pins3 {
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fsl,audmux-port = <2>;
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fsl,port-config = <
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IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
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0 IMX_AUDMUX_V2_PDCR_TXRXEN
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>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1>;
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termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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termination-ohms = <150>;
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status = "okay";
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};
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can2>;
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status = "okay";
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
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};
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&ecspi1 {
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cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <20000000>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii-id";
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phy-handle = <&rgmii_phy>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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/* Microchip KSZ9031RNX PHY */
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rgmii_phy: ethernet-phy@0 {
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reg = <0>;
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interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <300>;
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};
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};
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};
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&gpio1 {
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gpio-line-names =
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"CAN1_TERM", "SD1_CD", "ITU656_RESET", "CAM1_MIRROR",
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"CAM2_MIRROR", "", "", "SMBALERT",
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"DEBUG_0", "DEBUG_1", "SDIO_SCK", "SDIO_CMD", "SDIO_D3",
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"SDIO_D2", "SDIO_D1", "SDIO_D0",
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"SD1_DATA0", "SD1_DATA1", "SD1_CMD", "SD1_DATA2", "SD1_CLK",
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"SD1_DATA3", "", "",
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"", "ETH_RESET", "WIFI_PD", "WIFI_BT_RST", "ETH_INT", "",
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"WL_IRQ", "ETH_MDC";
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};
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&gpio2 {
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gpio-line-names =
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"count0", "count1", "count2", "", "", "", "", "",
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"REV_ID0", "REV_ID1", "REV_ID2", "REV_ID3", "REV_ID4",
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"BOARD_ID0", "BOARD_ID1", "BOARD_ID2",
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"", "", "", "", "", "", "", "ON_SWITCH",
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"POWER_LED", "", "ECSPI2_SS0", "", "", "", "", "";
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};
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&gpio3 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"ECSPI1_SCLK", "ECSPI1_MISO", "ECSPI1_MOSI", "ECSPI1_SS1",
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"CPU_ON1_FB", "USB_OTG_OC", "USB_OTG_PWR", "YACO_IRQ",
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"", "", "", "", "", "", "", "";
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};
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&gpio4 {
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gpio-line-names =
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"", "", "", "", "", "", "UART4_TXD", "UART4_RXD",
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"UART5_TXD", "UART5_RXD", "CAN1_TX", "CAN1_RX", "CAN1_SR",
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"CAN2_SR", "CAN2_TX", "CAN2_RX",
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"LED_DI0_DEBUG_0", "LED_DI0_DEBUG_1", "", "", "", "", "", "",
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"", "", "", "", "BL_EN", "BL_PWM", "", "";
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};
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&gpio5 {
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gpio-line-names =
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"", "", "", "", "", "PCIE_WAKE", "PCIE_CLKREQ", "PCIE_W_DIS",
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"PCIE_RESET", "", "", "", "", "", "", "",
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"", "", "ITU656_CLK", "I2S_MCLK", "ITU656_PDN", "AUDIO_RESET",
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"I2S_BITCLK", "I2S_DOUT",
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"I2S_LRCLK", "I2S_DIN", "I2C1_SDA", "I2C1_SCL", "YACO_AUX_RX",
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"YACO_AUX_TX", "ITU656_D0", "ITU656_D1";
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};
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&gpio6 {
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gpio-line-names =
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"ITU656_D2", "ITU656_D3", "ITU656_D4", "ITU656_D5",
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"ITU656_D6", "ITU656_D7", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "RGMII_TXC", "RGMII_TD0", "RGMII_TD1", "RGMII_TD2",
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"RGMII_TD3",
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"RGMII_RX_CTL", "RGMII_RD0", "RGMII_TX_CTL", "RGMII_RD1",
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"RGMII_RD2", "RGMII_RD3", "", "";
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};
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&gpio7 {
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gpio-line-names =
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"EMMC_DAT5", "EMMC_DAT4", "EMMC_CMD", "EMMC_CLK", "EMMC_DAT0",
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"EMMC_DAT1", "EMMC_DAT2", "EMMC_DAT3",
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"EMMC_RST", "", "", "", "CAM_DETECT", "", "", "",
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"", "EMMC_DAT7", "EMMC_DAT6", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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codec: audio-codec@a {
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compatible = "fsl,sgtl5000";
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reg = <0xa>;
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#sound-dai-cells = <0>;
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clocks = <&clks 201>;
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VDDA-supply = <®_3v3>;
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VDDIO-supply = <®_3v3>;
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VDDD-supply = <®_1v8>;
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};
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video-decoder@5c {
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compatible = "ti,tvp5150";
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reg = <0x5c>;
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tvp5150_comp0_in: endpoint {
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remote-endpoint = <&comp0_out>;
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};
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};
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/* Output port 2 is video output pad */
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port@2 {
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reg = <2>;
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tvp5151_to_ipu1_csi0_mux: endpoint {
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remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
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};
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};
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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adc@49 {
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compatible = "ti,ads1015";
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reg = <0x49>;
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#address-cells = <1>;
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#size-cells = <0>;
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channel@4 {
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reg = <4>;
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ti,gain = <3>;
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ti,datarate = <3>;
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};
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channel@5 {
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reg = <5>;
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ti,gain = <3>;
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ti,datarate = <3>;
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};
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channel@6 {
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reg = <6>;
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ti,gain = <3>;
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ti,datarate = <3>;
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};
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channel@7 {
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reg = <7>;
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ti,gain = <3>;
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ti,datarate = <3>;
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};
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};
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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temperature-sensor@70 {
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compatible = "ti,tmp103";
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reg = <0x70>;
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};
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};
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&ipu1_csi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu1_csi0>;
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status = "okay";
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};
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&ipu1_csi0_mux_from_parallel_sensor {
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remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
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};
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&ldb {
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status = "okay";
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lvds-channel@0 {
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||
|
status = "okay";
|
||
|
|
||
|
port@4 {
|
||
|
reg = <4>;
|
||
|
|
||
|
lvds0_out: endpoint {
|
||
|
remote-endpoint = <&panel_in>;
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&pcie {
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&pwm1 {
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_pwm1>;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&ssi1 {
|
||
|
#sound-dai-cells = <0>;
|
||
|
fsl,mode = "ac97-slave";
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&uart1 {
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_uart1>;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&uart2 {
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_uart2>;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&uart3 {
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_uart3>;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&uart4 {
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_uart4>;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&uart5 {
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_uart5>;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&usbh1 {
|
||
|
pinctrl-names = "default";
|
||
|
phy_type = "utmi";
|
||
|
dr_mode = "host";
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&usbotg {
|
||
|
vbus-supply = <®_otg_vbus>;
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_usbotg>;
|
||
|
phy_type = "utmi";
|
||
|
dr_mode = "host";
|
||
|
disable-over-current;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&usdhc1 {
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_usdhc1>;
|
||
|
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||
|
no-1-8-v;
|
||
|
disable-wp;
|
||
|
cap-sd-highspeed;
|
||
|
no-mmc;
|
||
|
no-sdio;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&usdhc2 {
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
||
|
vmmc-supply = <®_wifi>;
|
||
|
non-removable;
|
||
|
cap-power-off-card;
|
||
|
keep-power-in-suspend;
|
||
|
no-1-8-v;
|
||
|
no-mmc;
|
||
|
no-sd;
|
||
|
status = "okay";
|
||
|
|
||
|
wifi {
|
||
|
compatible = "ti,wl1271";
|
||
|
interrupts-extended = <&gpio1 30 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
ref-clock-frequency = "38400000";
|
||
|
tcxo-clock-frequency = "19200000";
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&usdhc3 {
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
||
|
bus-width = <8>;
|
||
|
no-1-8-v;
|
||
|
non-removable;
|
||
|
no-sd;
|
||
|
no-sdio;
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&iomuxc {
|
||
|
pinctrl-names = "default";
|
||
|
pinctrl-0 = <&pinctrl_hog>;
|
||
|
|
||
|
pinctrl_audmux: audmuxgrp {
|
||
|
fsl,pins = <
|
||
|
/* SGTL5000 sys_mclk */
|
||
|
MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0
|
||
|
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
|
||
|
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
|
||
|
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
|
||
|
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_backlight: backlightgrp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_can1: can1grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
|
||
|
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
|
||
|
/* CAN1_SR */
|
||
|
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
|
||
|
/* CAN1_TERM */
|
||
|
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b088
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_can2: can2grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
|
||
|
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
|
||
|
/* CAN2_SR */
|
||
|
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x13008
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_counter0: counter0grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b000
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_counter1: counter1grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b000
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_counter2: counter2grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b000
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_ecspi1: ecspi1grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
||
|
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
||
|
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
||
|
/* CS */
|
||
|
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_enet: enetgrp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
|
||
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
|
||
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
|
||
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
|
||
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
|
||
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
|
||
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030
|
||
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030
|
||
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030
|
||
|
/* Phy reset */
|
||
|
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
|
||
|
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_hog: hoggrp {
|
||
|
fsl,pins = <
|
||
|
/* ITU656_nRESET */
|
||
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
||
|
/* CAM1_MIRROR */
|
||
|
MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x130b0
|
||
|
/* CAM2_MIRROR */
|
||
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0
|
||
|
/* CAM_nDETECT */
|
||
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
|
||
|
/* nON_SWITCH */
|
||
|
MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b0
|
||
|
/* ISB_IN1 */
|
||
|
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0
|
||
|
/* ISB_nIN2 */
|
||
|
MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0
|
||
|
/* WARN_LIGHT */
|
||
|
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x100b0
|
||
|
/* ON2_FB */
|
||
|
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b0
|
||
|
/* YACO_nIRQ */
|
||
|
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0
|
||
|
/* YACO_BOOT0 */
|
||
|
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x130b0
|
||
|
/* YACO_nRESET */
|
||
|
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0
|
||
|
/* FORCE_ON1 */
|
||
|
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
|
||
|
/* AUDIO_nRESET */
|
||
|
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1f0b0
|
||
|
/* ITU656_nPDN */
|
||
|
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0
|
||
|
|
||
|
/* HW revision detect */
|
||
|
/* REV_ID0 */
|
||
|
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
|
||
|
/* REV_ID1 */
|
||
|
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
|
||
|
/* REV_ID2 */
|
||
|
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
|
||
|
/* REV_ID3 */
|
||
|
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
|
||
|
/* REV_ID4 */
|
||
|
MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0
|
||
|
|
||
|
/* New in HW revision 1 */
|
||
|
/* ON1_FB */
|
||
|
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x100b0
|
||
|
/* DIP1_FB */
|
||
|
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
|
||
|
|
||
|
/* New in UT2: FIXME: ISB PWM should start off, PD */
|
||
|
/* ISB_LED_PWM */
|
||
|
MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x130b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_i2c1: i2c1grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
|
||
|
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_i2c3: i2c3grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
|
||
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_ipu1_csi0: ipu1csi0grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
|
||
|
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
|
||
|
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
|
||
|
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
|
||
|
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
|
||
|
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
|
||
|
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
|
||
|
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
|
||
|
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_leds: ledsgrp {
|
||
|
fsl,pins = <
|
||
|
/* DEBUG0 */
|
||
|
MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b0
|
||
|
/* DEBUG1 */
|
||
|
MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x1b0b0
|
||
|
/* POWER_LED */
|
||
|
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_pwm1: pwm1grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
/* YaCO AUX Uart */
|
||
|
pinctrl_uart1: uart1grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
||
|
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_uart2: uart2grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
|
||
|
MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
|
||
|
MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
|
||
|
MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
/* YaCO Touchscreen UART */
|
||
|
pinctrl_uart3: uart3grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||
|
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_uart4: uart4grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
|
||
|
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_uart5: uart5grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||
|
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usbotg: usbotggrp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
|
||
|
/* power enable, high active */
|
||
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc1: usdhc1grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
|
||
|
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
|
||
|
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
|
||
|
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
|
||
|
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
|
||
|
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
|
||
|
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc2: usdhc2grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
|
||
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
|
||
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
|
||
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
|
||
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
|
||
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
|
||
|
/* WL12xx IRQ */
|
||
|
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x10880
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc3: usdhc3grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
|
||
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
|
||
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
|
||
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
|
||
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
|
||
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
|
||
|
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
|
||
|
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
|
||
|
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
|
||
|
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
|
||
|
MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_wifi_npd: wifinpdgrp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b8b0
|
||
|
>;
|
||
|
};
|
||
|
};
|