478 lines
9.8 KiB
Plaintext
478 lines
9.8 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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//
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// Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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chosen {
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stdout-path = &uart2;
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};
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aliases {
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can0 = &can1;
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can1 = &can2;
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mdio-gpio0 = &mdio;
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nand = &gpmi;
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rtc0 = &i2c_rtc;
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rtc1 = &snvs;
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usb0 = &usbh1;
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usb1 = &usbotg;
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};
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iio-hwmon {
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compatible = "iio-hwmon";
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io-channels = <&adc 0>, /* 24V */
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<&adc 1>; /* temperature */
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};
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leds {
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compatible = "gpio-leds";
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led-0 {
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label = "D1";
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gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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function = LED_FUNCTION_STATUS;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led-1 {
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label = "D2";
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gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-2 {
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label = "D3";
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gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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mdio: mdio {
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compatible = "microchip,mdio-smi0";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mdio>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>,
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<&gpio1 22 GPIO_ACTIVE_HIGH>;
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switch@0 {
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compatible = "microchip,ksz8873";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_switch>;
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interrupt-parent = <&gpio3>;
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interrupt = <30 IRQ_TYPE_LEVEL_HIGH>;
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reset-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
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reg = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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ports@0 {
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reg = <0>;
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phy-mode = "internal";
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label = "lan1";
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};
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ports@1 {
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reg = <1>;
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phy-mode = "internal";
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label = "lan2";
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};
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ports@2 {
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reg = <2>;
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label = "cpu";
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ethernet = <&fec>;
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phy-mode = "rmii";
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fixed-link {
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speed = <100>;
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full-duplex;
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};
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};
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};
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};
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};
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clk50m_phy: phy-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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};
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reg_3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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vin-supply = <®_5v0>;
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regulator-name = "3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_5v0: regulator-5v0 {
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compatible = "regulator-fixed";
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regulator-name = "5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_24v0: regulator-24v0 {
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compatible = "regulator-fixed";
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regulator-name = "24v0";
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regulator-min-microvolt = <24000000>;
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regulator-max-microvolt = <24000000>;
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};
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reg_can1_stby: regulator-can1-stby {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1_stby>;
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regulator-name = "can1-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 31 GPIO_ACTIVE_LOW>;
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};
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reg_can2_stby: regulator-can2-stby {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can2_stby>;
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regulator-name = "can2-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio4 11 GPIO_ACTIVE_LOW>;
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};
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reg_vcc_mmc: regulator-vcc-mmc {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_vcc_mmc>;
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vin-supply = <®_3v3>;
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regulator-name = "mmc_vcc_supply";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <100>;
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};
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reg_vcc_mmc_io: regulator-vcc-mmc-io {
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compatible = "regulator-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_vcc_mmc_io>;
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vin-supply = <®_5v0>;
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regulator-name = "mmc_io_supply";
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regulator-type = "voltage";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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states = <1800000 0x1>, <3300000 0x0>;
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startup-delay-us = <100>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1>;
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xceiver-supply = <®_can1_stby>;
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status = "okay";
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};
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can2>;
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xceiver-supply = <®_can2_stby>;
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status = "okay";
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <54000000>;
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reg = <0>;
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};
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
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status = "okay";
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adc: adc@0 {
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compatible = "microchip,mcp3002";
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reg = <0>;
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vref-supply = <®_3v3>;
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spi-max-frequency = <1000000>;
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#io-channel-cells = <1>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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clocks = <&clks IMX6QDL_CLK_ENET>,
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<&clks IMX6QDL_CLK_ENET>,
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<&clk50m_phy>;
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clock-names = "ipg", "ahb", "ptp";
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phy-mode = "rmii";
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phy-supply = <®_3v3>;
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status = "okay";
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fixed-link {
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speed = <100>;
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full-duplex;
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};
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};
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&gpmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpmi_nand>;
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nand-on-flash-bbt;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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clock-frequency = <400000>;
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status = "okay";
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i2c_rtc: rtc@51 {
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compatible = "nxp,pcf85063";
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reg = <0x51>;
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quartz-load-femtofarads = <12500>;
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};
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};
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&pwm2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm2>;
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#pwm-cells = <2>;
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status = "okay";
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};
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&pwm3 {
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/* used for LCD contrast control */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm3>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbh1 {
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vbus-supply = <®_5v0>;
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disable-over-current;
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status = "okay";
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};
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/* no usbh2 */
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&usbphynop1 {
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status = "disabled";
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};
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/* no usbh3 */
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&usbphynop2 {
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status = "disabled";
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};
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&usbotg {
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vbus-supply = <®_5v0>;
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disable-over-current;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
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cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
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cap-power-off-card;
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full-pwr-cycle;
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bus-width = <4>;
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max-frequency = <50000000>;
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cap-sd-highspeed;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr50;
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sd-uhs-ddr50;
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mmc-ddr-1_8v;
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vmmc-supply = <®_vcc_mmc>;
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vqmmc-supply = <®_vcc_mmc_io>;
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status = "okay";
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};
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&iomuxc {
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pinctrl_can1: can1grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x3008
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MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b000
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>;
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};
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pinctrl_can1_stby: can1stbygrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x13008
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>;
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};
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pinctrl_can2: can2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
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MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
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>;
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};
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pinctrl_can2_stby: can2stbygrp {
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fsl,pins = <
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MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x13008
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
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MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0xb1
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MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0xb1
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/* *no* external pull up */
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MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x58
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>;
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};
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
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MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0xb1
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MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0xb1
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/* external pull up */
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MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x58
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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/* RMII 50 MHz */
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MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x100f5
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MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x100f5
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MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x100c0
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MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x100c0
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MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x100f5
|
||
|
|
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x100f5
|
||
|
|
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
|
||
|
|
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x58
|
||
|
|
/* GPIO for "link active" */
|
||
|
|
MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x3038
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_gpmi_nand: gpminandgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||
|
|
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
|
||
|
|
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||
|
|
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||
|
|
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_i2c3: i2c3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
/* external 10 k pull up */
|
||
|
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x40010878
|
||
|
|
/* external 10 k pull up */
|
||
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x40010878
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_mdio: mdiogrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_ENET_MDIO__GPIO1_IO22 0x100b1
|
||
|
|
MX6QDL_PAD_ENET_MDC__GPIO1_IO31 0xb1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm2: pwm2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_1__PWM2_OUT 0x58
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm3: pwm3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x58
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_switch: switchgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0xb0
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart2: uart2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
|
||
|
|
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc3: usdhc3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
/* SoC internal pull up required */
|
||
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||
|
|
/* SoC internal pull up required */
|
||
|
|
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b040
|
||
|
|
/* SoC internal pull up required */
|
||
|
|
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b040
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_vcc_mmc: vccmmcgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x58
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_vcc_mmc_io: vccmmciogrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x58
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|