90 lines
2.0 KiB
Plaintext
90 lines
2.0 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
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*/
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#include "imx35.dtsi"
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/ {
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model = "Eukrea CPUIMX35";
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compatible = "eukrea,cpuimx35", "fsl,imx35";
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x8000000>; /* 128M */
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pcf8563@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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tsc2007: tsc2007@48 {
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compatible = "ti,tsc2007";
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gpios = <&gpio3 2 0>;
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interrupt-parent = <&gpio3>;
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interrupts = <0x2 0x8>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tsc2007_1>;
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reg = <0x48>;
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ti,x-plate-ohms = <180>;
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};
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};
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&iomuxc {
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imx35-eukrea {
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX35_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000
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MX35_PAD_FEC_RX_CLK__FEC_RX_CLK 0x80000000
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MX35_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000
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MX35_PAD_FEC_COL__FEC_COL 0x80000000
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MX35_PAD_FEC_RDATA0__FEC_RDATA_0 0x80000000
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MX35_PAD_FEC_TDATA0__FEC_TDATA_0 0x80000000
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MX35_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
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MX35_PAD_FEC_MDC__FEC_MDC 0x80000000
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MX35_PAD_FEC_MDIO__FEC_MDIO 0x80000000
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MX35_PAD_FEC_TX_ERR__FEC_TX_ERR 0x80000000
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MX35_PAD_FEC_RX_ERR__FEC_RX_ERR 0x80000000
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MX35_PAD_FEC_CRS__FEC_CRS 0x80000000
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MX35_PAD_FEC_RDATA1__FEC_RDATA_1 0x80000000
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MX35_PAD_FEC_TDATA1__FEC_TDATA_1 0x80000000
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MX35_PAD_FEC_RDATA2__FEC_RDATA_2 0x80000000
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MX35_PAD_FEC_TDATA2__FEC_TDATA_2 0x80000000
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MX35_PAD_FEC_RDATA3__FEC_RDATA_3 0x80000000
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MX35_PAD_FEC_TDATA3__FEC_TDATA_3 0x80000000
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX35_PAD_I2C1_CLK__I2C1_SCL 0x80000000
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MX35_PAD_I2C1_DAT__I2C1_SDA 0x80000000
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>;
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};
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pinctrl_tsc2007_1: tsc2007grp-1 {
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fsl,pins = <MX35_PAD_ATA_DA2__GPIO3_2 0x80000000>;
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};
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};
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};
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&nfc {
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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status = "okay";
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};
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