251 lines
6.2 KiB
ArmAsm
251 lines
6.2 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* arch/alpha/lib/ev6-memcpy.S
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* 21264 version by Rick Gorton <rick.gorton@alpha-processor.com>
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*
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* Reasonably optimized memcpy() routine for the Alpha 21264
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*
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* - memory accessed as aligned quadwords only
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* - uses bcmpge to compare 8 bytes in parallel
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*
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* Much of the information about 21264 scheduling/coding comes from:
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* Compiler Writer's Guide for the Alpha 21264
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* abbreviated as 'CWG' in other comments here
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* ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
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* Scheduling notation:
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* E - either cluster
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* U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
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* L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
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*
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* Temp usage notes:
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* $1,$2, - scratch
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*/
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#include <asm/export.h>
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.set noreorder
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.set noat
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.align 4
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.globl memcpy
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.ent memcpy
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memcpy:
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.frame $30,0,$26,0
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.prologue 0
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mov $16, $0 # E : copy dest to return
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ble $18, $nomoredata # U : done with the copy?
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xor $16, $17, $1 # E : are source and dest alignments the same?
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and $1, 7, $1 # E : are they the same mod 8?
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bne $1, $misaligned # U : Nope - gotta do this the slow way
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/* source and dest are same mod 8 address */
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and $16, 7, $1 # E : Are both 0mod8?
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beq $1, $both_0mod8 # U : Yes
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nop # E :
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/*
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* source and dest are same misalignment. move a byte at a time
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* until a 0mod8 alignment for both is reached.
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* At least one byte more to move
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*/
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$head_align:
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ldbu $1, 0($17) # L : grab a byte
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subq $18, 1, $18 # E : count--
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addq $17, 1, $17 # E : src++
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stb $1, 0($16) # L :
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addq $16, 1, $16 # E : dest++
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and $16, 7, $1 # E : Are we at 0mod8 yet?
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ble $18, $nomoredata # U : done with the copy?
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bne $1, $head_align # U :
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$both_0mod8:
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cmple $18, 127, $1 # E : Can we unroll the loop?
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bne $1, $no_unroll # U :
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and $16, 63, $1 # E : get mod64 alignment
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beq $1, $do_unroll # U : no single quads to fiddle
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$single_head_quad:
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ldq $1, 0($17) # L : get 8 bytes
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subq $18, 8, $18 # E : count -= 8
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addq $17, 8, $17 # E : src += 8
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nop # E :
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stq $1, 0($16) # L : store
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addq $16, 8, $16 # E : dest += 8
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and $16, 63, $1 # E : get mod64 alignment
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bne $1, $single_head_quad # U : still not fully aligned
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$do_unroll:
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addq $16, 64, $7 # E : Initial (+1 trip) wh64 address
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cmple $18, 127, $1 # E : Can we go through the unrolled loop?
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bne $1, $tail_quads # U : Nope
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nop # E :
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$unroll_body:
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wh64 ($7) # L1 : memory subsystem hint: 64 bytes at
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# ($7) are about to be over-written
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ldq $6, 0($17) # L0 : bytes 0..7
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nop # E :
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nop # E :
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ldq $4, 8($17) # L : bytes 8..15
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ldq $5, 16($17) # L : bytes 16..23
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addq $7, 64, $7 # E : Update next wh64 address
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nop # E :
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ldq $3, 24($17) # L : bytes 24..31
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addq $16, 64, $1 # E : fallback value for wh64
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nop # E :
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nop # E :
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addq $17, 32, $17 # E : src += 32 bytes
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stq $6, 0($16) # L : bytes 0..7
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nop # E :
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nop # E :
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stq $4, 8($16) # L : bytes 8..15
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stq $5, 16($16) # L : bytes 16..23
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subq $18, 192, $2 # E : At least two more trips to go?
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nop # E :
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stq $3, 24($16) # L : bytes 24..31
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addq $16, 32, $16 # E : dest += 32 bytes
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nop # E :
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nop # E :
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ldq $6, 0($17) # L : bytes 0..7
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ldq $4, 8($17) # L : bytes 8..15
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cmovlt $2, $1, $7 # E : Latency 2, extra map slot - Use
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# fallback wh64 address if < 2 more trips
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nop # E :
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ldq $5, 16($17) # L : bytes 16..23
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ldq $3, 24($17) # L : bytes 24..31
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addq $16, 32, $16 # E : dest += 32
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subq $18, 64, $18 # E : count -= 64
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addq $17, 32, $17 # E : src += 32
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stq $6, -32($16) # L : bytes 0..7
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stq $4, -24($16) # L : bytes 8..15
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cmple $18, 63, $1 # E : At least one more trip?
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stq $5, -16($16) # L : bytes 16..23
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stq $3, -8($16) # L : bytes 24..31
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nop # E :
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beq $1, $unroll_body
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$tail_quads:
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$no_unroll:
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.align 4
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subq $18, 8, $18 # E : At least a quad left?
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blt $18, $less_than_8 # U : Nope
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nop # E :
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nop # E :
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$move_a_quad:
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ldq $1, 0($17) # L : fetch 8
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subq $18, 8, $18 # E : count -= 8
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addq $17, 8, $17 # E : src += 8
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nop # E :
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stq $1, 0($16) # L : store 8
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addq $16, 8, $16 # E : dest += 8
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bge $18, $move_a_quad # U :
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nop # E :
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$less_than_8:
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.align 4
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addq $18, 8, $18 # E : add back for trailing bytes
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ble $18, $nomoredata # U : All-done
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nop # E :
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nop # E :
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/* Trailing bytes */
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$tail_bytes:
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subq $18, 1, $18 # E : count--
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ldbu $1, 0($17) # L : fetch a byte
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addq $17, 1, $17 # E : src++
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nop # E :
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stb $1, 0($16) # L : store a byte
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addq $16, 1, $16 # E : dest++
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bgt $18, $tail_bytes # U : more to be done?
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nop # E :
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/* branching to exit takes 3 extra cycles, so replicate exit here */
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ret $31, ($26), 1 # L0 :
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nop # E :
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nop # E :
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nop # E :
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$misaligned:
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mov $0, $4 # E : dest temp
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and $0, 7, $1 # E : dest alignment mod8
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beq $1, $dest_0mod8 # U : life doesnt totally suck
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nop
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$aligndest:
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ble $18, $nomoredata # U :
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ldbu $1, 0($17) # L : fetch a byte
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subq $18, 1, $18 # E : count--
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addq $17, 1, $17 # E : src++
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stb $1, 0($4) # L : store it
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addq $4, 1, $4 # E : dest++
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and $4, 7, $1 # E : dest 0mod8 yet?
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bne $1, $aligndest # U : go until we are aligned.
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/* Source has unknown alignment, but dest is known to be 0mod8 */
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$dest_0mod8:
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subq $18, 8, $18 # E : At least a quad left?
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blt $18, $misalign_tail # U : Nope
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ldq_u $3, 0($17) # L : seed (rotating load) of 8 bytes
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nop # E :
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$mis_quad:
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ldq_u $16, 8($17) # L : Fetch next 8
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extql $3, $17, $3 # U : masking
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extqh $16, $17, $1 # U : masking
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bis $3, $1, $1 # E : merged bytes to store
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subq $18, 8, $18 # E : count -= 8
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addq $17, 8, $17 # E : src += 8
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stq $1, 0($4) # L : store 8 (aligned)
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mov $16, $3 # E : "rotate" source data
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addq $4, 8, $4 # E : dest += 8
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bge $18, $mis_quad # U : More quads to move
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nop
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nop
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$misalign_tail:
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addq $18, 8, $18 # E : account for tail stuff
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ble $18, $nomoredata # U :
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nop
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nop
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$misalign_byte:
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ldbu $1, 0($17) # L : fetch 1
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subq $18, 1, $18 # E : count--
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addq $17, 1, $17 # E : src++
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nop # E :
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stb $1, 0($4) # L : store
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addq $4, 1, $4 # E : dest++
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bgt $18, $misalign_byte # U : more to go?
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nop
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$nomoredata:
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ret $31, ($26), 1 # L0 :
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nop # E :
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nop # E :
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nop # E :
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.end memcpy
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EXPORT_SYMBOL(memcpy)
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/* For backwards module compatibility. */
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__memcpy = memcpy
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.globl __memcpy
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