528 lines
23 KiB
ReStructuredText
528 lines
23 KiB
ReStructuredText
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=========================
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Audio Stream in SoundWire
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=========================
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An audio stream is a logical or virtual connection created between
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(1) System memory buffer(s) and Codec(s)
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(2) DSP memory buffer(s) and Codec(s)
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(3) FIFO(s) and Codec(s)
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(4) Codec(s) and Codec(s)
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which is typically driven by a DMA(s) channel through the data link. An
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audio stream contains one or more channels of data. All channels within
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stream must have same sample rate and same sample size.
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Assume a stream with two channels (Left & Right) is opened using SoundWire
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interface. Below are some ways a stream can be represented in SoundWire.
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Stream Sample in memory (System memory, DSP memory or FIFOs) ::
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-------------------------
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| L | R | L | R | L | R |
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-------------------------
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Example 1: Stereo Stream with L and R channels is rendered from Master to
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Slave. Both Master and Slave is using single port. ::
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+---------------+ Clock Signal +---------------+
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| Master +----------------------------------+ Slave |
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| Interface | | Interface |
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| | | 1 |
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| | Data Signal | |
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| L + R +----------------------------------+ L + R |
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| (Data) | Data Direction | (Data) |
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+---------------+ +-----------------------> +---------------+
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Example 2: Stereo Stream with L and R channels is captured from Slave to
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Master. Both Master and Slave is using single port. ::
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+---------------+ Clock Signal +---------------+
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| Master +----------------------------------+ Slave |
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| Interface | | Interface |
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| | | 1 |
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| | Data Signal | |
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| L + R +----------------------------------+ L + R |
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| (Data) | Data Direction | (Data) |
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+---------------+ <-----------------------+ +---------------+
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Example 3: Stereo Stream with L and R channels is rendered by Master. Each
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of the L and R channel is received by two different Slaves. Master and both
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Slaves are using single port. ::
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+---------------+ Clock Signal +---------------+
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| Master +---------+------------------------+ Slave |
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| Interface | | | Interface |
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| | | | 1 |
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| | | Data Signal | |
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| L + R +---+------------------------------+ L |
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| (Data) | | | Data Direction | (Data) |
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+---------------+ | | +-------------> +---------------+
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| | +---------------+
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| +----------------------> | Slave |
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| | Interface |
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| | 2 |
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+----------------------------> | R |
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| (Data) |
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+---------------+
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Example 4: Stereo Stream with L and R channels is rendered by
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Master. Both of the L and R channels are received by two different
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Slaves. Master and both Slaves are using single port handling
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L+R. Each Slave device processes the L + R data locally, typically
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based on static configuration or dynamic orientation, and may drive
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one or more speakers. ::
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+---------------+ Clock Signal +---------------+
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| Master +---------+------------------------+ Slave |
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| Interface | | | Interface |
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| | | | 1 |
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| | | Data Signal | |
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| L + R +---+------------------------------+ L + R |
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| (Data) | | | Data Direction | (Data) |
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+---------------+ | | +-------------> +---------------+
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| | +---------------+
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| +----------------------> | Slave |
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| | Interface |
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| | 2 |
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+----------------------------> | L + R |
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| (Data) |
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+---------------+
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Example 5: Stereo Stream with L and R channel is rendered by two different
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Ports of the Master and is received by only single Port of the Slave
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interface. ::
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+--------------------+
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| +--------------+ +----------------+
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| | Data Port || L Channel | |
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| | 1 |------------+ | |
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| | L Channel || | +-----+----+ |
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| | (Data) || | L + R Channel || Data | |
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| Master +----------+ | +---+---------> || Port | |
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| Interface | | || 1 | |
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| +--------------+ | || | |
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| | || | +----------+ |
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| | Data Port |------------+ | |
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| | 2 || R Channel | Slave |
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| | R Channel || | Interface |
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| | (Data) || | 1 |
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| +--------------+ Clock Signal | L + R |
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| +---------------------------> | (Data) |
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+--------------------+ | |
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+----------------+
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Example 6: Stereo Stream with L and R channel is rendered by 2 Masters, each
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rendering one channel, and is received by two different Slaves, each
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receiving one channel. Both Masters and both Slaves are using single port. ::
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+---------------+ Clock Signal +---------------+
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| Master +----------------------------------+ Slave |
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| Interface | | Interface |
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| 1 | | 1 |
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| | Data Signal | |
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| L +----------------------------------+ L |
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| (Data) | Data Direction | (Data) |
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+---------------+ +-----------------------> +---------------+
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+---------------+ Clock Signal +---------------+
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| Master +----------------------------------+ Slave |
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| Interface | | Interface |
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| 2 | | 2 |
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| | Data Signal | |
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| R +----------------------------------+ R |
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| (Data) | Data Direction | (Data) |
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+---------------+ +-----------------------> +---------------+
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Example 7: Stereo Stream with L and R channel is rendered by 2
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Masters, each rendering both channels. Each Slave receives L + R. This
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is the same application as Example 4 but with Slaves placed on
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separate links. ::
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+---------------+ Clock Signal +---------------+
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| Master +----------------------------------+ Slave |
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| Interface | | Interface |
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| 1 | | 1 |
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| | Data Signal | |
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| L + R +----------------------------------+ L + R |
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| (Data) | Data Direction | (Data) |
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+---------------+ +-----------------------> +---------------+
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+---------------+ Clock Signal +---------------+
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| Master +----------------------------------+ Slave |
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| Interface | | Interface |
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| 2 | | 2 |
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| | Data Signal | |
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| L + R +----------------------------------+ L + R |
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| (Data) | Data Direction | (Data) |
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+---------------+ +-----------------------> +---------------+
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Example 8: 4-channel Stream is rendered by 2 Masters, each rendering a
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2 channels. Each Slave receives 2 channels. ::
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+---------------+ Clock Signal +---------------+
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| Master +----------------------------------+ Slave |
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| Interface | | Interface |
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| 1 | | 1 |
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| | Data Signal | |
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| L1 + R1 +----------------------------------+ L1 + R1 |
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| (Data) | Data Direction | (Data) |
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+---------------+ +-----------------------> +---------------+
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+---------------+ Clock Signal +---------------+
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| Master +----------------------------------+ Slave |
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| Interface | | Interface |
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| 2 | | 2 |
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| | Data Signal | |
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| L2 + R2 +----------------------------------+ L2 + R2 |
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| (Data) | Data Direction | (Data) |
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+---------------+ +-----------------------> +---------------+
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Note1: In multi-link cases like above, to lock, one would acquire a global
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lock and then go on locking bus instances. But, in this case the caller
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framework(ASoC DPCM) guarantees that stream operations on a card are
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always serialized. So, there is no race condition and hence no need for
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global lock.
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Note2: A Slave device may be configured to receive all channels
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transmitted on a link for a given Stream (Example 4) or just a subset
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of the data (Example 3). The configuration of the Slave device is not
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handled by a SoundWire subsystem API, but instead by the
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snd_soc_dai_set_tdm_slot() API. The platform or machine driver will
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typically configure which of the slots are used. For Example 4, the
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same slots would be used by all Devices, while for Example 3 the Slave
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Device1 would use e.g. Slot 0 and Slave device2 slot 1.
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Note3: Multiple Sink ports can extract the same information for the
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same bitSlots in the SoundWire frame, however multiple Source ports
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shall be configured with different bitSlot configurations. This is the
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same limitation as with I2S/PCM TDM usages.
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SoundWire Stream Management flow
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================================
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Stream definitions
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------------------
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(1) Current stream: This is classified as the stream on which operation has
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to be performed like prepare, enable, disable, de-prepare etc.
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(2) Active stream: This is classified as the stream which is already active
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on Bus other than current stream. There can be multiple active streams
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on the Bus.
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SoundWire Bus manages stream operations for each stream getting
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rendered/captured on the SoundWire Bus. This section explains Bus operations
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done for each of the stream allocated/released on Bus. Following are the
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stream states maintained by the Bus for each of the audio stream.
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SoundWire stream states
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-----------------------
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Below shows the SoundWire stream states and state transition diagram. ::
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+-----------+ +------------+ +----------+ +----------+
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| ALLOCATED +---->| CONFIGURED +---->| PREPARED +---->| ENABLED |
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| STATE | | STATE | | STATE | | STATE |
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+-----------+ +------------+ +---+--+---+ +----+-----+
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^ ^ ^
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__| |___________ |
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v | v
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+----------+ +-----+------+ +-+--+-----+
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| RELEASED |<----------+ DEPREPARED |<-------+ DISABLED |
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| STATE | | STATE | | STATE |
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+----------+ +------------+ +----------+
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NOTE: State transitions between ``SDW_STREAM_ENABLED`` and
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``SDW_STREAM_DISABLED`` are only relevant when then INFO_PAUSE flag is
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supported at the ALSA/ASoC level. Likewise the transition between
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``SDW_DISABLED_STATE`` and ``SDW_PREPARED_STATE`` depends on the
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INFO_RESUME flag.
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NOTE2: The framework implements basic state transition checks, but
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does not e.g. check if a transition from DISABLED to ENABLED is valid
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on a specific platform. Such tests need to be added at the ALSA/ASoC
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level.
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Stream State Operations
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-----------------------
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Below section explains the operations done by the Bus on Master(s) and
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Slave(s) as part of stream state transitions.
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SDW_STREAM_ALLOCATED
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~~~~~~~~~~~~~~~~~~~~
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Allocation state for stream. This is the entry state
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of the stream. Operations performed before entering in this state:
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(1) A stream runtime is allocated for the stream. This stream
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runtime is used as a reference for all the operations performed
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on the stream.
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(2) The resources required for holding stream runtime information are
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allocated and initialized. This holds all stream related information
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such as stream type (PCM/PDM) and parameters, Master and Slave
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interface associated with the stream, stream state etc.
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After all above operations are successful, stream state is set to
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``SDW_STREAM_ALLOCATED``.
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Bus implements below API for allocate a stream which needs to be called once
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per stream. From ASoC DPCM framework, this stream state maybe linked to
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.startup() operation.
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.. code-block:: c
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int sdw_alloc_stream(char * stream_name);
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The SoundWire core provides a sdw_startup_stream() helper function,
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typically called during a dailink .startup() callback, which performs
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stream allocation and sets the stream pointer for all DAIs
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connected to a stream.
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SDW_STREAM_CONFIGURED
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~~~~~~~~~~~~~~~~~~~~~
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Configuration state of stream. Operations performed before entering in
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this state:
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(1) The resources allocated for stream information in SDW_STREAM_ALLOCATED
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state are updated here. This includes stream parameters, Master(s)
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and Slave(s) runtime information associated with current stream.
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(2) All the Master(s) and Slave(s) associated with current stream provide
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the port information to Bus which includes port numbers allocated by
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Master(s) and Slave(s) for current stream and their channel mask.
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After all above operations are successful, stream state is set to
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``SDW_STREAM_CONFIGURED``.
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Bus implements below APIs for CONFIG state which needs to be called by
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the respective Master(s) and Slave(s) associated with stream. These APIs can
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only be invoked once by respective Master(s) and Slave(s). From ASoC DPCM
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framework, this stream state is linked to .hw_params() operation.
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.. code-block:: c
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int sdw_stream_add_master(struct sdw_bus * bus,
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struct sdw_stream_config * stream_config,
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struct sdw_ports_config * ports_config,
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struct sdw_stream_runtime * stream);
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int sdw_stream_add_slave(struct sdw_slave * slave,
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struct sdw_stream_config * stream_config,
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struct sdw_ports_config * ports_config,
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struct sdw_stream_runtime * stream);
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SDW_STREAM_PREPARED
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~~~~~~~~~~~~~~~~~~~
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Prepare state of stream. Operations performed before entering in this state:
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(0) Steps 1 and 2 are omitted in the case of a resume operation,
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where the bus bandwidth is known.
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(1) Bus parameters such as bandwidth, frame shape, clock frequency,
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are computed based on current stream as well as already active
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stream(s) on Bus. Re-computation is required to accommodate current
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stream on the Bus.
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(2) Transport and port parameters of all Master(s) and Slave(s) port(s) are
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computed for the current as well as already active stream based on frame
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shape and clock frequency computed in step 1.
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(3) Computed Bus and transport parameters are programmed in Master(s) and
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Slave(s) registers. The banked registers programming is done on the
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alternate bank (bank currently unused). Port(s) are enabled for the
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already active stream(s) on the alternate bank (bank currently unused).
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This is done in order to not disrupt already active stream(s).
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(4) Once all the values are programmed, Bus initiates switch to alternate
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bank where all new values programmed gets into effect.
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(5) Ports of Master(s) and Slave(s) for current stream are prepared by
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programming PrepareCtrl register.
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After all above operations are successful, stream state is set to
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``SDW_STREAM_PREPARED``.
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Bus implements below API for PREPARE state which needs to be called
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once per stream. From ASoC DPCM framework, this stream state is linked
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to .prepare() operation. Since the .trigger() operations may not
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follow the .prepare(), a direct transition from
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``SDW_STREAM_PREPARED`` to ``SDW_STREAM_DEPREPARED`` is allowed.
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|
|
.. code-block:: c
|
||
|
|
|
||
|
|
int sdw_prepare_stream(struct sdw_stream_runtime * stream);
|
||
|
|
|
||
|
|
|
||
|
|
SDW_STREAM_ENABLED
|
||
|
|
~~~~~~~~~~~~~~~~~~
|
||
|
|
|
||
|
|
Enable state of stream. The data port(s) are enabled upon entering this state.
|
||
|
|
Operations performed before entering in this state:
|
||
|
|
|
||
|
|
(1) All the values computed in SDW_STREAM_PREPARED state are programmed
|
||
|
|
in alternate bank (bank currently unused). It includes programming of
|
||
|
|
already active stream(s) as well.
|
||
|
|
|
||
|
|
(2) All the Master(s) and Slave(s) port(s) for the current stream are
|
||
|
|
enabled on alternate bank (bank currently unused) by programming
|
||
|
|
ChannelEn register.
|
||
|
|
|
||
|
|
(3) Once all the values are programmed, Bus initiates switch to alternate
|
||
|
|
bank where all new values programmed gets into effect and port(s)
|
||
|
|
associated with current stream are enabled.
|
||
|
|
|
||
|
|
After all above operations are successful, stream state is set to
|
||
|
|
``SDW_STREAM_ENABLED``.
|
||
|
|
|
||
|
|
Bus implements below API for ENABLE state which needs to be called once per
|
||
|
|
stream. From ASoC DPCM framework, this stream state is linked to
|
||
|
|
.trigger() start operation.
|
||
|
|
|
||
|
|
.. code-block:: c
|
||
|
|
|
||
|
|
int sdw_enable_stream(struct sdw_stream_runtime * stream);
|
||
|
|
|
||
|
|
SDW_STREAM_DISABLED
|
||
|
|
~~~~~~~~~~~~~~~~~~~
|
||
|
|
|
||
|
|
Disable state of stream. The data port(s) are disabled upon exiting this state.
|
||
|
|
Operations performed before entering in this state:
|
||
|
|
|
||
|
|
(1) All the Master(s) and Slave(s) port(s) for the current stream are
|
||
|
|
disabled on alternate bank (bank currently unused) by programming
|
||
|
|
ChannelEn register.
|
||
|
|
|
||
|
|
(2) All the current configuration of Bus and active stream(s) are programmed
|
||
|
|
into alternate bank (bank currently unused).
|
||
|
|
|
||
|
|
(3) Once all the values are programmed, Bus initiates switch to alternate
|
||
|
|
bank where all new values programmed gets into effect and port(s) associated
|
||
|
|
with current stream are disabled.
|
||
|
|
|
||
|
|
After all above operations are successful, stream state is set to
|
||
|
|
``SDW_STREAM_DISABLED``.
|
||
|
|
|
||
|
|
Bus implements below API for DISABLED state which needs to be called once
|
||
|
|
per stream. From ASoC DPCM framework, this stream state is linked to
|
||
|
|
.trigger() stop operation.
|
||
|
|
|
||
|
|
When the INFO_PAUSE flag is supported, a direct transition to
|
||
|
|
``SDW_STREAM_ENABLED`` is allowed.
|
||
|
|
|
||
|
|
For resume operations where ASoC will use the .prepare() callback, the
|
||
|
|
stream can transition from ``SDW_STREAM_DISABLED`` to
|
||
|
|
``SDW_STREAM_PREPARED``, with all required settings restored but
|
||
|
|
without updating the bandwidth and bit allocation.
|
||
|
|
|
||
|
|
.. code-block:: c
|
||
|
|
|
||
|
|
int sdw_disable_stream(struct sdw_stream_runtime * stream);
|
||
|
|
|
||
|
|
|
||
|
|
SDW_STREAM_DEPREPARED
|
||
|
|
~~~~~~~~~~~~~~~~~~~~~
|
||
|
|
|
||
|
|
De-prepare state of stream. Operations performed before entering in this
|
||
|
|
state:
|
||
|
|
|
||
|
|
(1) All the port(s) of Master(s) and Slave(s) for current stream are
|
||
|
|
de-prepared by programming PrepareCtrl register.
|
||
|
|
|
||
|
|
(2) The payload bandwidth of current stream is reduced from the total
|
||
|
|
bandwidth requirement of bus and new parameters calculated and
|
||
|
|
applied by performing bank switch etc.
|
||
|
|
|
||
|
|
After all above operations are successful, stream state is set to
|
||
|
|
``SDW_STREAM_DEPREPARED``.
|
||
|
|
|
||
|
|
Bus implements below API for DEPREPARED state which needs to be called
|
||
|
|
once per stream. ALSA/ASoC do not have a concept of 'deprepare', and
|
||
|
|
the mapping from this stream state to ALSA/ASoC operation may be
|
||
|
|
implementation specific.
|
||
|
|
|
||
|
|
When the INFO_PAUSE flag is supported, the stream state is linked to
|
||
|
|
the .hw_free() operation - the stream is not deprepared on a
|
||
|
|
TRIGGER_STOP.
|
||
|
|
|
||
|
|
Other implementations may transition to the ``SDW_STREAM_DEPREPARED``
|
||
|
|
state on TRIGGER_STOP, should they require a transition through the
|
||
|
|
``SDW_STREAM_PREPARED`` state.
|
||
|
|
|
||
|
|
.. code-block:: c
|
||
|
|
|
||
|
|
int sdw_deprepare_stream(struct sdw_stream_runtime * stream);
|
||
|
|
|
||
|
|
|
||
|
|
SDW_STREAM_RELEASED
|
||
|
|
~~~~~~~~~~~~~~~~~~~
|
||
|
|
|
||
|
|
Release state of stream. Operations performed before entering in this state:
|
||
|
|
|
||
|
|
(1) Release port resources for all Master(s) and Slave(s) port(s)
|
||
|
|
associated with current stream.
|
||
|
|
|
||
|
|
(2) Release Master(s) and Slave(s) runtime resources associated with
|
||
|
|
current stream.
|
||
|
|
|
||
|
|
(3) Release stream runtime resources associated with current stream.
|
||
|
|
|
||
|
|
After all above operations are successful, stream state is set to
|
||
|
|
``SDW_STREAM_RELEASED``.
|
||
|
|
|
||
|
|
Bus implements below APIs for RELEASE state which needs to be called by
|
||
|
|
all the Master(s) and Slave(s) associated with stream. From ASoC DPCM
|
||
|
|
framework, this stream state is linked to .hw_free() operation.
|
||
|
|
|
||
|
|
.. code-block:: c
|
||
|
|
|
||
|
|
int sdw_stream_remove_master(struct sdw_bus * bus,
|
||
|
|
struct sdw_stream_runtime * stream);
|
||
|
|
int sdw_stream_remove_slave(struct sdw_slave * slave,
|
||
|
|
struct sdw_stream_runtime * stream);
|
||
|
|
|
||
|
|
|
||
|
|
The .shutdown() ASoC DPCM operation calls below Bus API to release
|
||
|
|
stream assigned as part of ALLOCATED state.
|
||
|
|
|
||
|
|
In .shutdown() the data structure maintaining stream state are freed up.
|
||
|
|
|
||
|
|
.. code-block:: c
|
||
|
|
|
||
|
|
void sdw_release_stream(struct sdw_stream_runtime * stream);
|
||
|
|
|
||
|
|
The SoundWire core provides a sdw_shutdown_stream() helper function,
|
||
|
|
typically called during a dailink .shutdown() callback, which clears
|
||
|
|
the stream pointer for all DAIS connected to a stream and releases the
|
||
|
|
memory allocated for the stream.
|
||
|
|
|
||
|
|
Not Supported
|
||
|
|
=============
|
||
|
|
|
||
|
|
1. A single port with multiple channels supported cannot be used between two
|
||
|
|
streams or across stream. For example a port with 4 channels cannot be used
|
||
|
|
to handle 2 independent stereo streams even though it's possible in theory
|
||
|
|
in SoundWire.
|