73 lines
3.3 KiB
ReStructuredText
73 lines
3.3 KiB
ReStructuredText
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TODO LIST
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=========
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::
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POW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - power
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RPW{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - reverse power
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POL{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - polar angle (arctan2)
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LOG{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base 10
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LGN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - logarithm to base e
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EXP{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - exponent
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SIN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - sine
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COS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - cosine
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TAN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - tangent
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ASN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arcsine
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ACS{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arccosine
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ATN{cond}<S|D|E>{P,M,Z} Fd, <Fm,#value> - arctangent
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These are not implemented. They are not currently issued by the compiler,
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and are handled by routines in libc. These are not implemented by the FPA11
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hardware, but are handled by the floating point support code. They should
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be implemented in future versions.
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There are a couple of ways to approach the implementation of these. One
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method would be to use accurate table methods for these routines. I have
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a couple of papers by S. Gal from IBM's research labs in Haifa, Israel that
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seem to promise extreme accuracy (in the order of 99.8%) and reasonable speed.
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These methods are used in GLIBC for some of the transcendental functions.
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Another approach, which I know little about is CORDIC. This stands for
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Coordinate Rotation Digital Computer, and is a method of computing
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transcendental functions using mostly shifts and adds and a few
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multiplications and divisions. The ARM excels at shifts and adds,
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so such a method could be promising, but requires more research to
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determine if it is feasible.
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Rounding Methods
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----------------
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The IEEE standard defines 4 rounding modes. Round to nearest is the
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default, but rounding to + or - infinity or round to zero are also allowed.
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Many architectures allow the rounding mode to be specified by modifying bits
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in a control register. Not so with the ARM FPA11 architecture. To change
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the rounding mode one must specify it with each instruction.
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This has made porting some benchmarks difficult. It is possible to
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introduce such a capability into the emulator. The FPCR contains
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bits describing the rounding mode. The emulator could be altered to
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examine a flag, which if set forced it to ignore the rounding mode in
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the instruction, and use the mode specified in the bits in the FPCR.
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This would require a method of getting/setting the flag, and the bits
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in the FPCR. This requires a kernel call in ArmLinux, as WFC/RFC are
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supervisor only instructions. If anyone has any ideas or comments I
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would like to hear them.
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NOTE:
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pulled out from some docs on ARM floating point, specifically
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for the Acorn FPE, but not limited to it:
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The floating point control register (FPCR) may only be present in some
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implementations: it is there to control the hardware in an implementation-
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specific manner, for example to disable the floating point system. The user
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mode of the ARM is not permitted to use this register (since the right is
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reserved to alter it between implementations) and the WFC and RFC
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instructions will trap if tried in user mode.
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Hence, the answer is yes, you could do this, but then you will run a high
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risk of becoming isolated if and when hardware FP emulation comes out
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-- Russell.
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