321 lines
8.0 KiB
C
321 lines
8.0 KiB
C
/*
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* Copyright 2010-2011 Picochip Ltd., Jamie Iles
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* http://www.picochip.com
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* This file implements a driver for the Synopsys DesignWare watchdog device
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* in the many subsystems. The watchdog has 16 different timeout periods
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* and these are a function of the input clock frequency.
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*
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* The DesignWare watchdog cannot be stopped once it has been started so we
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* do not implement a stop function. The watchdog core will continue to send
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* heartbeat requests after the watchdog device has been closed.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/of.h>
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#include <linux/pm.h>
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#include <linux/platform_device.h>
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#include <linux/reset.h>
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#include <linux/watchdog.h>
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#define WDOG_CONTROL_REG_OFFSET 0x00
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#define WDOG_CONTROL_REG_WDT_EN_MASK 0x01
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#define WDOG_TIMEOUT_RANGE_REG_OFFSET 0x04
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#define WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT 4
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#define WDOG_CURRENT_COUNT_REG_OFFSET 0x08
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#define WDOG_COUNTER_RESTART_REG_OFFSET 0x0c
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#define WDOG_COUNTER_RESTART_KICK_VALUE 0x76
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/* The maximum TOP (timeout period) value that can be set in the watchdog. */
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#define DW_WDT_MAX_TOP 15
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#define DW_WDT_DEFAULT_SECONDS 30
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
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"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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struct dw_wdt {
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void __iomem *regs;
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struct clk *clk;
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unsigned long rate;
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struct watchdog_device wdd;
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struct reset_control *rst;
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};
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#define to_dw_wdt(wdd) container_of(wdd, struct dw_wdt, wdd)
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static inline int dw_wdt_is_enabled(struct dw_wdt *dw_wdt)
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{
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return readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET) &
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WDOG_CONTROL_REG_WDT_EN_MASK;
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}
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static inline int dw_wdt_top_in_seconds(struct dw_wdt *dw_wdt, unsigned top)
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{
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/*
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* There are 16 possible timeout values in 0..15 where the number of
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* cycles is 2 ^ (16 + i) and the watchdog counts down.
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*/
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return (1U << (16 + top)) / dw_wdt->rate;
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}
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static int dw_wdt_get_top(struct dw_wdt *dw_wdt)
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{
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int top = readl(dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET) & 0xF;
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return dw_wdt_top_in_seconds(dw_wdt, top);
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}
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static int dw_wdt_ping(struct watchdog_device *wdd)
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{
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struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
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writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt->regs +
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WDOG_COUNTER_RESTART_REG_OFFSET);
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return 0;
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}
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static int dw_wdt_set_timeout(struct watchdog_device *wdd, unsigned int top_s)
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{
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struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
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int i, top_val = DW_WDT_MAX_TOP;
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/*
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* Iterate over the timeout values until we find the closest match. We
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* always look for >=.
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*/
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for (i = 0; i <= DW_WDT_MAX_TOP; ++i)
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if (dw_wdt_top_in_seconds(dw_wdt, i) >= top_s) {
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top_val = i;
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break;
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}
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/*
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* Set the new value in the watchdog. Some versions of dw_wdt
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* have have TOPINIT in the TIMEOUT_RANGE register (as per
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* CP_WDT_DUAL_TOP in WDT_COMP_PARAMS_1). On those we
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* effectively get a pat of the watchdog right here.
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*/
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writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
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dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
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wdd->timeout = dw_wdt_top_in_seconds(dw_wdt, top_val);
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return 0;
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}
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static int dw_wdt_start(struct watchdog_device *wdd)
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{
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struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
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dw_wdt_set_timeout(wdd, wdd->timeout);
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set_bit(WDOG_HW_RUNNING, &wdd->status);
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writel(WDOG_CONTROL_REG_WDT_EN_MASK,
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dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
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return 0;
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}
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static int dw_wdt_restart(struct watchdog_device *wdd,
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unsigned long action, void *data)
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{
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struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
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u32 val;
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writel(0, dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
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val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
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if (val & WDOG_CONTROL_REG_WDT_EN_MASK)
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writel(WDOG_COUNTER_RESTART_KICK_VALUE,
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dw_wdt->regs + WDOG_COUNTER_RESTART_REG_OFFSET);
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else
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writel(WDOG_CONTROL_REG_WDT_EN_MASK,
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dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
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/* wait for reset to assert... */
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mdelay(500);
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return 0;
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}
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static unsigned int dw_wdt_get_timeleft(struct watchdog_device *wdd)
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{
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struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
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return readl(dw_wdt->regs + WDOG_CURRENT_COUNT_REG_OFFSET) /
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dw_wdt->rate;
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}
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static const struct watchdog_info dw_wdt_ident = {
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.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
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WDIOF_MAGICCLOSE,
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.identity = "Synopsys DesignWare Watchdog",
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};
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static const struct watchdog_ops dw_wdt_ops = {
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.owner = THIS_MODULE,
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.start = dw_wdt_start,
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.ping = dw_wdt_ping,
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.set_timeout = dw_wdt_set_timeout,
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.get_timeleft = dw_wdt_get_timeleft,
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.restart = dw_wdt_restart,
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};
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#ifdef CONFIG_PM_SLEEP
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static int dw_wdt_suspend(struct device *dev)
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{
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struct dw_wdt *dw_wdt = dev_get_drvdata(dev);
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clk_disable_unprepare(dw_wdt->clk);
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return 0;
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}
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static int dw_wdt_resume(struct device *dev)
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{
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struct dw_wdt *dw_wdt = dev_get_drvdata(dev);
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int err = clk_prepare_enable(dw_wdt->clk);
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if (err)
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return err;
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dw_wdt_ping(&dw_wdt->wdd);
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return 0;
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}
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#endif /* CONFIG_PM_SLEEP */
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static SIMPLE_DEV_PM_OPS(dw_wdt_pm_ops, dw_wdt_suspend, dw_wdt_resume);
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static int dw_wdt_drv_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct watchdog_device *wdd;
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struct dw_wdt *dw_wdt;
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struct resource *mem;
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int ret;
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dw_wdt = devm_kzalloc(dev, sizeof(*dw_wdt), GFP_KERNEL);
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if (!dw_wdt)
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return -ENOMEM;
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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dw_wdt->regs = devm_ioremap_resource(dev, mem);
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if (IS_ERR(dw_wdt->regs))
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return PTR_ERR(dw_wdt->regs);
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dw_wdt->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(dw_wdt->clk))
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return PTR_ERR(dw_wdt->clk);
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ret = clk_prepare_enable(dw_wdt->clk);
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if (ret)
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return ret;
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dw_wdt->rate = clk_get_rate(dw_wdt->clk);
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if (dw_wdt->rate == 0) {
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ret = -EINVAL;
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goto out_disable_clk;
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}
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dw_wdt->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
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if (IS_ERR(dw_wdt->rst)) {
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ret = PTR_ERR(dw_wdt->rst);
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goto out_disable_clk;
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}
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reset_control_deassert(dw_wdt->rst);
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wdd = &dw_wdt->wdd;
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wdd->info = &dw_wdt_ident;
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wdd->ops = &dw_wdt_ops;
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wdd->min_timeout = 1;
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wdd->max_hw_heartbeat_ms =
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dw_wdt_top_in_seconds(dw_wdt, DW_WDT_MAX_TOP) * 1000;
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wdd->parent = dev;
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watchdog_set_drvdata(wdd, dw_wdt);
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watchdog_set_nowayout(wdd, nowayout);
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watchdog_init_timeout(wdd, 0, dev);
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/*
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* If the watchdog is already running, use its already configured
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* timeout. Otherwise use the default or the value provided through
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* devicetree.
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*/
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if (dw_wdt_is_enabled(dw_wdt)) {
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wdd->timeout = dw_wdt_get_top(dw_wdt);
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set_bit(WDOG_HW_RUNNING, &wdd->status);
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} else {
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wdd->timeout = DW_WDT_DEFAULT_SECONDS;
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watchdog_init_timeout(wdd, 0, dev);
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}
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platform_set_drvdata(pdev, dw_wdt);
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watchdog_set_restart_priority(wdd, 128);
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ret = watchdog_register_device(wdd);
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if (ret)
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goto out_disable_clk;
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return 0;
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out_disable_clk:
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clk_disable_unprepare(dw_wdt->clk);
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return ret;
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}
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static int dw_wdt_drv_remove(struct platform_device *pdev)
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{
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struct dw_wdt *dw_wdt = platform_get_drvdata(pdev);
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watchdog_unregister_device(&dw_wdt->wdd);
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reset_control_assert(dw_wdt->rst);
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clk_disable_unprepare(dw_wdt->clk);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id dw_wdt_of_match[] = {
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{ .compatible = "snps,dw-wdt", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, dw_wdt_of_match);
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#endif
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static struct platform_driver dw_wdt_driver = {
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.probe = dw_wdt_drv_probe,
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.remove = dw_wdt_drv_remove,
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.driver = {
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.name = "dw_wdt",
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.of_match_table = of_match_ptr(dw_wdt_of_match),
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.pm = &dw_wdt_pm_ops,
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},
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};
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module_platform_driver(dw_wdt_driver);
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MODULE_AUTHOR("Jamie Iles");
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MODULE_DESCRIPTION("Synopsys DesignWare Watchdog Driver");
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MODULE_LICENSE("GPL");
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