835 lines
23 KiB
C
835 lines
23 KiB
C
/******************************************************************************
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called COPYING.
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*
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* Contact Information:
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* Intel Linux Wireless <linuxwifi@intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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* BSD LICENSE
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*
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* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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#include <linux/firmware.h>
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#include <linux/rtnetlink.h>
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#include "iwl-trans.h"
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#include "iwl-csr.h"
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#include "mvm.h"
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#include "iwl-eeprom-parse.h"
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#include "iwl-eeprom-read.h"
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#include "iwl-nvm-parse.h"
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#include "iwl-prph.h"
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#include "fw/acpi.h"
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/* Default NVM size to read */
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#define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
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#define IWL_MAX_NVM_SECTION_SIZE 0x1b58
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#define IWL_MAX_EXT_NVM_SECTION_SIZE 0x1ffc
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#define NVM_WRITE_OPCODE 1
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#define NVM_READ_OPCODE 0
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/* load nvm chunk response */
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enum {
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READ_NVM_CHUNK_SUCCEED = 0,
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READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
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};
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/*
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* prepare the NVM host command w/ the pointers to the nvm buffer
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* and send it to fw
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*/
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static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
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u16 offset, u16 length, const u8 *data)
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{
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struct iwl_nvm_access_cmd nvm_access_cmd = {
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.offset = cpu_to_le16(offset),
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.length = cpu_to_le16(length),
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.type = cpu_to_le16(section),
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.op_code = NVM_WRITE_OPCODE,
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};
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struct iwl_host_cmd cmd = {
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.id = NVM_ACCESS_CMD,
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.len = { sizeof(struct iwl_nvm_access_cmd), length },
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.flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
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.data = { &nvm_access_cmd, data },
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/* data may come from vmalloc, so use _DUP */
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.dataflags = { 0, IWL_HCMD_DFL_DUP },
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};
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struct iwl_rx_packet *pkt;
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struct iwl_nvm_access_resp *nvm_resp;
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int ret;
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ret = iwl_mvm_send_cmd(mvm, &cmd);
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if (ret)
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return ret;
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pkt = cmd.resp_pkt;
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/* Extract & check NVM write response */
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nvm_resp = (void *)pkt->data;
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if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
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IWL_ERR(mvm,
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"NVM access write command failed for section %u (status = 0x%x)\n",
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section, le16_to_cpu(nvm_resp->status));
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ret = -EIO;
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}
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iwl_free_resp(&cmd);
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return ret;
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}
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static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
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u16 offset, u16 length, u8 *data)
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{
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struct iwl_nvm_access_cmd nvm_access_cmd = {
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.offset = cpu_to_le16(offset),
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.length = cpu_to_le16(length),
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.type = cpu_to_le16(section),
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.op_code = NVM_READ_OPCODE,
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};
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struct iwl_nvm_access_resp *nvm_resp;
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struct iwl_rx_packet *pkt;
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struct iwl_host_cmd cmd = {
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.id = NVM_ACCESS_CMD,
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.flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
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.data = { &nvm_access_cmd, },
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};
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int ret, bytes_read, offset_read;
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u8 *resp_data;
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cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
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ret = iwl_mvm_send_cmd(mvm, &cmd);
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if (ret)
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return ret;
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pkt = cmd.resp_pkt;
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/* Extract NVM response */
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nvm_resp = (void *)pkt->data;
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ret = le16_to_cpu(nvm_resp->status);
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bytes_read = le16_to_cpu(nvm_resp->length);
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offset_read = le16_to_cpu(nvm_resp->offset);
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resp_data = nvm_resp->data;
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if (ret) {
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if ((offset != 0) &&
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(ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
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/*
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* meaning of NOT_VALID_ADDRESS:
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* driver try to read chunk from address that is
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* multiple of 2K and got an error since addr is empty.
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* meaning of (offset != 0): driver already
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* read valid data from another chunk so this case
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* is not an error.
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*/
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IWL_DEBUG_EEPROM(mvm->trans->dev,
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"NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
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offset);
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ret = 0;
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} else {
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IWL_DEBUG_EEPROM(mvm->trans->dev,
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"NVM access command failed with status %d (device: %s)\n",
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ret, mvm->cfg->name);
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ret = -EIO;
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}
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goto exit;
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}
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if (offset_read != offset) {
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IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
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offset_read);
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ret = -EINVAL;
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goto exit;
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}
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/* Write data to NVM */
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memcpy(data + offset, resp_data, bytes_read);
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ret = bytes_read;
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exit:
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iwl_free_resp(&cmd);
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return ret;
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}
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static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
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const u8 *data, u16 length)
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{
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int offset = 0;
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/* copy data in chunks of 2k (and remainder if any) */
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while (offset < length) {
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int chunk_size, ret;
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chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
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length - offset);
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ret = iwl_nvm_write_chunk(mvm, section, offset,
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chunk_size, data + offset);
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if (ret < 0)
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return ret;
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offset += chunk_size;
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}
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return 0;
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}
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static void iwl_mvm_nvm_fixups(struct iwl_mvm *mvm, unsigned int section,
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u8 *data, unsigned int len)
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{
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#define IWL_4165_DEVICE_ID 0x5501
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#define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
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if (section == NVM_SECTION_TYPE_PHY_SKU &&
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mvm->trans->hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
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(data[4] & NVM_SKU_CAP_MIMO_DISABLE))
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/* OTP 0x52 bug work around: it's a 1x1 device */
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data[3] = ANT_B | (ANT_B << 4);
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}
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/*
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* Reads an NVM section completely.
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* NICs prior to 7000 family doesn't have a real NVM, but just read
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* section 0 which is the EEPROM. Because the EEPROM reading is unlimited
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* by uCode, we need to manually check in this case that we don't
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* overflow and try to read more than the EEPROM size.
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* For 7000 family NICs, we supply the maximal size we can read, and
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* the uCode fills the response with as much data as we can,
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* without overflowing, so no check is needed.
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*/
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static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
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u8 *data, u32 size_read)
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{
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u16 length, offset = 0;
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int ret;
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/* Set nvm section read length */
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length = IWL_NVM_DEFAULT_CHUNK_SIZE;
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ret = length;
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/* Read the NVM until exhausted (reading less than requested) */
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while (ret == length) {
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/* Check no memory assumptions fail and cause an overflow */
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if ((size_read + offset + length) >
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mvm->cfg->base_params->eeprom_size) {
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IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
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return -ENOBUFS;
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}
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ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
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if (ret < 0) {
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IWL_DEBUG_EEPROM(mvm->trans->dev,
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"Cannot read NVM from section %d offset %d, length %d\n",
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section, offset, length);
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return ret;
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}
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offset += ret;
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}
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iwl_mvm_nvm_fixups(mvm, section, data, offset);
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IWL_DEBUG_EEPROM(mvm->trans->dev,
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"NVM section %d read completed\n", section);
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return offset;
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}
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static struct iwl_nvm_data *
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iwl_parse_nvm_sections(struct iwl_mvm *mvm)
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{
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struct iwl_nvm_section *sections = mvm->nvm_sections;
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const __be16 *hw;
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const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
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bool lar_enabled;
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int regulatory_type;
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/* Checking for required sections */
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if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT) {
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if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
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!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
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IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
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return NULL;
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}
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} else {
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if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
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regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
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else
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regulatory_type = NVM_SECTION_TYPE_REGULATORY;
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/* SW and REGULATORY sections are mandatory */
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if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
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!mvm->nvm_sections[regulatory_type].data) {
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IWL_ERR(mvm,
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"Can't parse empty family 8000 OTP/NVM sections\n");
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return NULL;
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}
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/* MAC_OVERRIDE or at least HW section must exist */
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if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
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!mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
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IWL_ERR(mvm,
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"Can't parse mac_address, empty sections\n");
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return NULL;
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}
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/* PHY_SKU section is mandatory in B0 */
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if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
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IWL_ERR(mvm,
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"Can't parse phy_sku in B0, empty sections\n");
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return NULL;
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}
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}
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hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
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sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
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calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
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mac_override =
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(const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
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phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
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regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
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(const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
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(const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
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lar_enabled = !iwlwifi_mod_params.lar_disable &&
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fw_has_capa(&mvm->fw->ucode_capa,
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IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
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return iwl_parse_nvm_data(mvm->trans, mvm->cfg, hw, sw, calib,
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regulatory, mac_override, phy_sku,
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mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
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lar_enabled);
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}
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#define MAX_NVM_FILE_LEN 16384
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/*
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* Reads external NVM from a file into mvm->nvm_sections
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*
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* HOW TO CREATE THE NVM FILE FORMAT:
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* ------------------------------
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* 1. create hex file, format:
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* 3800 -> header
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* 0000 -> header
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* 5a40 -> data
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*
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* rev - 6 bit (word1)
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* len - 10 bit (word1)
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* id - 4 bit (word2)
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* rsv - 12 bit (word2)
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*
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* 2. flip 8bits with 8 bits per line to get the right NVM file format
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*
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* 3. create binary file from the hex file
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*
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* 4. save as "iNVM_xxx.bin" under /lib/firmware
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*/
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int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
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{
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int ret, section_size;
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u16 section_id;
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const struct firmware *fw_entry;
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const struct {
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__le16 word1;
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__le16 word2;
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u8 data[];
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} *file_sec;
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const u8 *eof;
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u8 *temp;
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int max_section_size;
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const __le32 *dword_buff;
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#define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
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#define NVM_WORD2_ID(x) (x >> 12)
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#define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8))
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#define EXT_NVM_WORD1_ID(x) ((x) >> 4)
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#define NVM_HEADER_0 (0x2A504C54)
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#define NVM_HEADER_1 (0x4E564D2A)
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#define NVM_HEADER_SIZE (4 * sizeof(u32))
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|
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IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
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|
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/* Maximal size depends on NVM version */
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if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT)
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max_section_size = IWL_MAX_NVM_SECTION_SIZE;
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else
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max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
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|
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/*
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* Obtain NVM image via request_firmware. Since we already used
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* request_firmware_nowait() for the firmware binary load and only
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* get here after that we assume the NVM request can be satisfied
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* synchronously.
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*/
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ret = request_firmware(&fw_entry, mvm->nvm_file_name,
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mvm->trans->dev);
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if (ret) {
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IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
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mvm->nvm_file_name, ret);
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return ret;
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}
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|
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IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
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mvm->nvm_file_name, fw_entry->size);
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|
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if (fw_entry->size > MAX_NVM_FILE_LEN) {
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IWL_ERR(mvm, "NVM file too large\n");
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ret = -EINVAL;
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goto out;
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}
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eof = fw_entry->data + fw_entry->size;
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dword_buff = (__le32 *)fw_entry->data;
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|
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/* some NVM file will contain a header.
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* The header is identified by 2 dwords header as follow:
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* dword[0] = 0x2A504C54
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* dword[1] = 0x4E564D2A
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*
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* This header must be skipped when providing the NVM data to the FW.
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*/
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if (fw_entry->size > NVM_HEADER_SIZE &&
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dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
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dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
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file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
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IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
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IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
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le32_to_cpu(dword_buff[3]));
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|
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/* nvm file validation, dword_buff[2] holds the file version */
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if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000 &&
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CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_C_STEP &&
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le32_to_cpu(dword_buff[2]) < 0xE4A) {
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ret = -EFAULT;
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goto out;
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}
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} else {
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file_sec = (void *)fw_entry->data;
|
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}
|
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|
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while (true) {
|
|
if (file_sec->data > eof) {
|
|
IWL_ERR(mvm,
|
|
"ERROR - NVM file too short for section header\n");
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
/* check for EOF marker */
|
|
if (!file_sec->word1 && !file_sec->word2) {
|
|
ret = 0;
|
|
break;
|
|
}
|
|
|
|
if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT) {
|
|
section_size =
|
|
2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
|
|
section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
|
|
} else {
|
|
section_size = 2 * EXT_NVM_WORD2_LEN(
|
|
le16_to_cpu(file_sec->word2));
|
|
section_id = EXT_NVM_WORD1_ID(
|
|
le16_to_cpu(file_sec->word1));
|
|
}
|
|
|
|
if (section_size > max_section_size) {
|
|
IWL_ERR(mvm, "ERROR - section too large (%d)\n",
|
|
section_size);
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
if (!section_size) {
|
|
IWL_ERR(mvm, "ERROR - section empty\n");
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
if (file_sec->data + section_size > eof) {
|
|
IWL_ERR(mvm,
|
|
"ERROR - NVM file too short for section (%d bytes)\n",
|
|
section_size);
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
|
|
"Invalid NVM section ID %d\n", section_id)) {
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
|
|
if (!temp) {
|
|
ret = -ENOMEM;
|
|
break;
|
|
}
|
|
|
|
iwl_mvm_nvm_fixups(mvm, section_id, temp, section_size);
|
|
|
|
kfree(mvm->nvm_sections[section_id].data);
|
|
mvm->nvm_sections[section_id].data = temp;
|
|
mvm->nvm_sections[section_id].length = section_size;
|
|
|
|
/* advance to the next section */
|
|
file_sec = (void *)(file_sec->data + section_size);
|
|
}
|
|
out:
|
|
release_firmware(fw_entry);
|
|
return ret;
|
|
}
|
|
|
|
/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
|
|
int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
|
|
{
|
|
int i, ret = 0;
|
|
struct iwl_nvm_section *sections = mvm->nvm_sections;
|
|
|
|
IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
|
|
|
|
for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
|
|
if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
|
|
continue;
|
|
ret = iwl_nvm_write_section(mvm, i, sections[i].data,
|
|
sections[i].length);
|
|
if (ret < 0) {
|
|
IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
|
|
break;
|
|
}
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
int iwl_nvm_init(struct iwl_mvm *mvm)
|
|
{
|
|
int ret, section;
|
|
u32 size_read = 0;
|
|
u8 *nvm_buffer, *temp;
|
|
const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
|
|
|
|
if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
|
|
return -EINVAL;
|
|
|
|
/* load NVM values from nic */
|
|
/* Read From FW NVM */
|
|
IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
|
|
|
|
nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
|
|
GFP_KERNEL);
|
|
if (!nvm_buffer)
|
|
return -ENOMEM;
|
|
for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
|
|
/* we override the constness for initial read */
|
|
ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
|
|
size_read);
|
|
if (ret < 0)
|
|
continue;
|
|
size_read += ret;
|
|
temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
|
|
if (!temp) {
|
|
ret = -ENOMEM;
|
|
break;
|
|
}
|
|
|
|
iwl_mvm_nvm_fixups(mvm, section, temp, ret);
|
|
|
|
mvm->nvm_sections[section].data = temp;
|
|
mvm->nvm_sections[section].length = ret;
|
|
|
|
#ifdef CONFIG_IWLWIFI_DEBUGFS
|
|
switch (section) {
|
|
case NVM_SECTION_TYPE_SW:
|
|
mvm->nvm_sw_blob.data = temp;
|
|
mvm->nvm_sw_blob.size = ret;
|
|
break;
|
|
case NVM_SECTION_TYPE_CALIBRATION:
|
|
mvm->nvm_calib_blob.data = temp;
|
|
mvm->nvm_calib_blob.size = ret;
|
|
break;
|
|
case NVM_SECTION_TYPE_PRODUCTION:
|
|
mvm->nvm_prod_blob.data = temp;
|
|
mvm->nvm_prod_blob.size = ret;
|
|
break;
|
|
case NVM_SECTION_TYPE_PHY_SKU:
|
|
mvm->nvm_phy_sku_blob.data = temp;
|
|
mvm->nvm_phy_sku_blob.size = ret;
|
|
break;
|
|
default:
|
|
if (section == mvm->cfg->nvm_hw_section_num) {
|
|
mvm->nvm_hw_blob.data = temp;
|
|
mvm->nvm_hw_blob.size = ret;
|
|
break;
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
if (!size_read)
|
|
IWL_ERR(mvm, "OTP is blank\n");
|
|
kfree(nvm_buffer);
|
|
|
|
/* Only if PNVM selected in the mod param - load external NVM */
|
|
if (mvm->nvm_file_name) {
|
|
/* read External NVM file from the mod param */
|
|
ret = iwl_mvm_read_external_nvm(mvm);
|
|
if (ret) {
|
|
mvm->nvm_file_name = nvm_file_C;
|
|
|
|
if ((ret == -EFAULT || ret == -ENOENT) &&
|
|
mvm->nvm_file_name) {
|
|
/* in case nvm file was failed try again */
|
|
ret = iwl_mvm_read_external_nvm(mvm);
|
|
if (ret)
|
|
return ret;
|
|
} else {
|
|
return ret;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* parse the relevant nvm sections */
|
|
mvm->nvm_data = iwl_parse_nvm_sections(mvm);
|
|
if (!mvm->nvm_data)
|
|
return -ENODATA;
|
|
IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
|
|
mvm->nvm_data->nvm_version);
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct iwl_mcc_update_resp *
|
|
iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
|
|
enum iwl_mcc_source src_id)
|
|
{
|
|
struct iwl_mcc_update_cmd mcc_update_cmd = {
|
|
.mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
|
|
.source_id = (u8)src_id,
|
|
};
|
|
struct iwl_mcc_update_resp *resp_cp;
|
|
struct iwl_rx_packet *pkt;
|
|
struct iwl_host_cmd cmd = {
|
|
.id = MCC_UPDATE_CMD,
|
|
.flags = CMD_WANT_SKB,
|
|
.data = { &mcc_update_cmd },
|
|
};
|
|
|
|
int ret;
|
|
u32 status;
|
|
int resp_len, n_channels;
|
|
u16 mcc;
|
|
bool resp_v2 = fw_has_capa(&mvm->fw->ucode_capa,
|
|
IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2);
|
|
|
|
if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
|
|
return ERR_PTR(-EOPNOTSUPP);
|
|
|
|
cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
|
|
if (!resp_v2)
|
|
cmd.len[0] = sizeof(struct iwl_mcc_update_cmd_v1);
|
|
|
|
IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
|
|
alpha2[0], alpha2[1], src_id);
|
|
|
|
ret = iwl_mvm_send_cmd(mvm, &cmd);
|
|
if (ret)
|
|
return ERR_PTR(ret);
|
|
|
|
pkt = cmd.resp_pkt;
|
|
|
|
/* Extract MCC response */
|
|
if (resp_v2) {
|
|
struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data;
|
|
|
|
n_channels = __le32_to_cpu(mcc_resp->n_channels);
|
|
resp_len = sizeof(struct iwl_mcc_update_resp) +
|
|
n_channels * sizeof(__le32);
|
|
resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
|
|
if (!resp_cp) {
|
|
resp_cp = ERR_PTR(-ENOMEM);
|
|
goto exit;
|
|
}
|
|
} else {
|
|
struct iwl_mcc_update_resp_v1 *mcc_resp_v1 = (void *)pkt->data;
|
|
|
|
n_channels = __le32_to_cpu(mcc_resp_v1->n_channels);
|
|
resp_len = sizeof(struct iwl_mcc_update_resp) +
|
|
n_channels * sizeof(__le32);
|
|
resp_cp = kzalloc(resp_len, GFP_KERNEL);
|
|
if (!resp_cp) {
|
|
resp_cp = ERR_PTR(-ENOMEM);
|
|
goto exit;
|
|
}
|
|
|
|
resp_cp->status = mcc_resp_v1->status;
|
|
resp_cp->mcc = mcc_resp_v1->mcc;
|
|
resp_cp->cap = mcc_resp_v1->cap;
|
|
resp_cp->source_id = mcc_resp_v1->source_id;
|
|
resp_cp->n_channels = mcc_resp_v1->n_channels;
|
|
memcpy(resp_cp->channels, mcc_resp_v1->channels,
|
|
n_channels * sizeof(__le32));
|
|
}
|
|
|
|
status = le32_to_cpu(resp_cp->status);
|
|
|
|
mcc = le16_to_cpu(resp_cp->mcc);
|
|
|
|
/* W/A for a FW/NVM issue - returns 0x00 for the world domain */
|
|
if (mcc == 0) {
|
|
mcc = 0x3030; /* "00" - world */
|
|
resp_cp->mcc = cpu_to_le16(mcc);
|
|
}
|
|
|
|
IWL_DEBUG_LAR(mvm,
|
|
"MCC response status: 0x%x. new MCC: 0x%x ('%c%c') change: %d n_chans: %d\n",
|
|
status, mcc, mcc >> 8, mcc & 0xff,
|
|
!!(status == MCC_RESP_NEW_CHAN_PROFILE), n_channels);
|
|
|
|
exit:
|
|
iwl_free_resp(&cmd);
|
|
return resp_cp;
|
|
}
|
|
|
|
int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
|
|
{
|
|
bool tlv_lar;
|
|
bool nvm_lar;
|
|
int retval;
|
|
struct ieee80211_regdomain *regd;
|
|
char mcc[3];
|
|
|
|
if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
|
|
tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
|
|
IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
|
|
nvm_lar = mvm->nvm_data->lar_enabled;
|
|
if (tlv_lar != nvm_lar)
|
|
IWL_INFO(mvm,
|
|
"Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
|
|
tlv_lar ? "enabled" : "disabled",
|
|
nvm_lar ? "enabled" : "disabled");
|
|
}
|
|
|
|
if (!iwl_mvm_is_lar_supported(mvm))
|
|
return 0;
|
|
|
|
/*
|
|
* try to replay the last set MCC to FW. If it doesn't exist,
|
|
* queue an update to cfg80211 to retrieve the default alpha2 from FW.
|
|
*/
|
|
retval = iwl_mvm_init_fw_regd(mvm);
|
|
if (retval != -ENOENT)
|
|
return retval;
|
|
|
|
/*
|
|
* Driver regulatory hint for initial update, this also informs the
|
|
* firmware we support wifi location updates.
|
|
* Disallow scans that might crash the FW while the LAR regdomain
|
|
* is not set.
|
|
*/
|
|
mvm->lar_regdom_set = false;
|
|
|
|
regd = iwl_mvm_get_current_regdomain(mvm, NULL);
|
|
if (IS_ERR_OR_NULL(regd))
|
|
return -EIO;
|
|
|
|
if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
|
|
!iwl_acpi_get_mcc(mvm->dev, mcc)) {
|
|
kfree(regd);
|
|
regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
|
|
MCC_SOURCE_BIOS, NULL);
|
|
if (IS_ERR_OR_NULL(regd))
|
|
return -EIO;
|
|
}
|
|
|
|
retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
|
|
kfree(regd);
|
|
return retval;
|
|
}
|
|
|
|
void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
|
|
struct iwl_rx_cmd_buffer *rxb)
|
|
{
|
|
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
|
struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
|
|
enum iwl_mcc_source src;
|
|
char mcc[3];
|
|
struct ieee80211_regdomain *regd;
|
|
|
|
lockdep_assert_held(&mvm->mutex);
|
|
|
|
if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
|
|
IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
|
|
return;
|
|
}
|
|
|
|
if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
|
|
return;
|
|
|
|
mcc[0] = le16_to_cpu(notif->mcc) >> 8;
|
|
mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
|
|
mcc[2] = '\0';
|
|
src = notif->source_id;
|
|
|
|
IWL_DEBUG_LAR(mvm,
|
|
"RX: received chub update mcc cmd (mcc '%s' src %d)\n",
|
|
mcc, src);
|
|
regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
|
|
if (IS_ERR_OR_NULL(regd))
|
|
return;
|
|
|
|
regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
|
|
kfree(regd);
|
|
}
|