1542 lines
40 KiB
C
1542 lines
40 KiB
C
/* bnx2x_sp.h: Qlogic Everest network driver.
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*
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* Copyright 2011-2013 Broadcom Corporation
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* Copyright (c) 2014 QLogic Corporation
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* All rights reserved
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*
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* Unless you and Qlogic execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2, available
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* at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Qlogic software provided under a
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* license other than the GPL, without Qlogic's express prior written
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* consent.
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*
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* Maintained by: Ariel Elior <ariel.elior@qlogic.com>
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* Written by: Vladislav Zolotarov
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*
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*/
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#ifndef BNX2X_SP_VERBS
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#define BNX2X_SP_VERBS
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struct bnx2x;
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struct eth_context;
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/* Bits representing general command's configuration */
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enum {
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RAMROD_TX,
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RAMROD_RX,
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/* Wait until all pending commands complete */
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RAMROD_COMP_WAIT,
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/* Don't send a ramrod, only update a registry */
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RAMROD_DRV_CLR_ONLY,
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/* Configure HW according to the current object state */
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RAMROD_RESTORE,
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/* Execute the next command now */
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RAMROD_EXEC,
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/* Don't add a new command and continue execution of postponed
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* commands. If not set a new command will be added to the
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* pending commands list.
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*/
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RAMROD_CONT,
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/* If there is another pending ramrod, wait until it finishes and
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* re-try to submit this one. This flag can be set only in sleepable
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* context, and should not be set from the context that completes the
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* ramrods as deadlock will occur.
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*/
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RAMROD_RETRY,
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};
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typedef enum {
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BNX2X_OBJ_TYPE_RX,
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BNX2X_OBJ_TYPE_TX,
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BNX2X_OBJ_TYPE_RX_TX,
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} bnx2x_obj_type;
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/* Public slow path states */
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enum {
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BNX2X_FILTER_MAC_PENDING,
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BNX2X_FILTER_VLAN_PENDING,
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BNX2X_FILTER_VLAN_MAC_PENDING,
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BNX2X_FILTER_RX_MODE_PENDING,
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BNX2X_FILTER_RX_MODE_SCHED,
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BNX2X_FILTER_ISCSI_ETH_START_SCHED,
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BNX2X_FILTER_ISCSI_ETH_STOP_SCHED,
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BNX2X_FILTER_FCOE_ETH_START_SCHED,
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BNX2X_FILTER_FCOE_ETH_STOP_SCHED,
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BNX2X_FILTER_MCAST_PENDING,
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BNX2X_FILTER_MCAST_SCHED,
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BNX2X_FILTER_RSS_CONF_PENDING,
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BNX2X_AFEX_FCOE_Q_UPDATE_PENDING,
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BNX2X_AFEX_PENDING_VIFSET_MCP_ACK
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};
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struct bnx2x_raw_obj {
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u8 func_id;
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/* Queue params */
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u8 cl_id;
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u32 cid;
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/* Ramrod data buffer params */
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void *rdata;
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dma_addr_t rdata_mapping;
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/* Ramrod state params */
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int state; /* "ramrod is pending" state bit */
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unsigned long *pstate; /* pointer to state buffer */
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bnx2x_obj_type obj_type;
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int (*wait_comp)(struct bnx2x *bp,
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struct bnx2x_raw_obj *o);
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bool (*check_pending)(struct bnx2x_raw_obj *o);
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void (*clear_pending)(struct bnx2x_raw_obj *o);
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void (*set_pending)(struct bnx2x_raw_obj *o);
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};
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/************************* VLAN-MAC commands related parameters ***************/
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struct bnx2x_mac_ramrod_data {
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u8 mac[ETH_ALEN];
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u8 is_inner_mac;
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};
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struct bnx2x_vlan_ramrod_data {
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u16 vlan;
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};
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struct bnx2x_vlan_mac_ramrod_data {
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u8 mac[ETH_ALEN];
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u8 is_inner_mac;
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u16 vlan;
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};
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union bnx2x_classification_ramrod_data {
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struct bnx2x_mac_ramrod_data mac;
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struct bnx2x_vlan_ramrod_data vlan;
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struct bnx2x_vlan_mac_ramrod_data vlan_mac;
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};
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/* VLAN_MAC commands */
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enum bnx2x_vlan_mac_cmd {
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BNX2X_VLAN_MAC_ADD,
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BNX2X_VLAN_MAC_DEL,
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BNX2X_VLAN_MAC_MOVE,
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};
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struct bnx2x_vlan_mac_data {
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/* Requested command: BNX2X_VLAN_MAC_XX */
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enum bnx2x_vlan_mac_cmd cmd;
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/* used to contain the data related vlan_mac_flags bits from
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* ramrod parameters.
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*/
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unsigned long vlan_mac_flags;
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/* Needed for MOVE command */
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struct bnx2x_vlan_mac_obj *target_obj;
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union bnx2x_classification_ramrod_data u;
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};
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/*************************** Exe Queue obj ************************************/
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union bnx2x_exe_queue_cmd_data {
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struct bnx2x_vlan_mac_data vlan_mac;
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struct {
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/* TODO */
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} mcast;
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};
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struct bnx2x_exeq_elem {
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struct list_head link;
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/* Length of this element in the exe_chunk. */
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int cmd_len;
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union bnx2x_exe_queue_cmd_data cmd_data;
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};
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union bnx2x_qable_obj;
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union bnx2x_exeq_comp_elem {
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union event_ring_elem *elem;
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};
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struct bnx2x_exe_queue_obj;
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typedef int (*exe_q_validate)(struct bnx2x *bp,
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union bnx2x_qable_obj *o,
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struct bnx2x_exeq_elem *elem);
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typedef int (*exe_q_remove)(struct bnx2x *bp,
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union bnx2x_qable_obj *o,
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struct bnx2x_exeq_elem *elem);
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/* Return positive if entry was optimized, 0 - if not, negative
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* in case of an error.
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*/
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typedef int (*exe_q_optimize)(struct bnx2x *bp,
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union bnx2x_qable_obj *o,
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struct bnx2x_exeq_elem *elem);
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typedef int (*exe_q_execute)(struct bnx2x *bp,
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union bnx2x_qable_obj *o,
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struct list_head *exe_chunk,
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unsigned long *ramrod_flags);
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typedef struct bnx2x_exeq_elem *
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(*exe_q_get)(struct bnx2x_exe_queue_obj *o,
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struct bnx2x_exeq_elem *elem);
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struct bnx2x_exe_queue_obj {
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/* Commands pending for an execution. */
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struct list_head exe_queue;
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/* Commands pending for an completion. */
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struct list_head pending_comp;
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spinlock_t lock;
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/* Maximum length of commands' list for one execution */
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int exe_chunk_len;
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union bnx2x_qable_obj *owner;
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/****** Virtual functions ******/
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/**
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* Called before commands execution for commands that are really
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* going to be executed (after 'optimize').
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*
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* Must run under exe_queue->lock
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*/
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exe_q_validate validate;
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/**
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* Called before removing pending commands, cleaning allocated
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* resources (e.g., credits from validate)
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*/
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exe_q_remove remove;
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/**
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* This will try to cancel the current pending commands list
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* considering the new command.
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*
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* Returns the number of optimized commands or a negative error code
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*
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* Must run under exe_queue->lock
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*/
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exe_q_optimize optimize;
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/**
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* Run the next commands chunk (owner specific).
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*/
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exe_q_execute execute;
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/**
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* Return the exe_queue element containing the specific command
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* if any. Otherwise return NULL.
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*/
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exe_q_get get;
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};
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/***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
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/*
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* Element in the VLAN_MAC registry list having all currently configured
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* rules.
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*/
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struct bnx2x_vlan_mac_registry_elem {
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struct list_head link;
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/* Used to store the cam offset used for the mac/vlan/vlan-mac.
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* Relevant for 57710 and 57711 only. VLANs and MACs share the
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* same CAM for these chips.
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*/
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int cam_offset;
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/* Needed for DEL and RESTORE flows */
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unsigned long vlan_mac_flags;
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union bnx2x_classification_ramrod_data u;
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};
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/* Bits representing VLAN_MAC commands specific flags */
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enum {
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BNX2X_UC_LIST_MAC,
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BNX2X_ETH_MAC,
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BNX2X_ISCSI_ETH_MAC,
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BNX2X_NETQ_ETH_MAC,
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BNX2X_DONT_CONSUME_CAM_CREDIT,
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BNX2X_DONT_CONSUME_CAM_CREDIT_DEST,
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};
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/* When looking for matching filters, some flags are not interesting */
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#define BNX2X_VLAN_MAC_CMP_MASK (1 << BNX2X_UC_LIST_MAC | \
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1 << BNX2X_ETH_MAC | \
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1 << BNX2X_ISCSI_ETH_MAC | \
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1 << BNX2X_NETQ_ETH_MAC)
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#define BNX2X_VLAN_MAC_CMP_FLAGS(flags) \
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((flags) & BNX2X_VLAN_MAC_CMP_MASK)
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struct bnx2x_vlan_mac_ramrod_params {
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/* Object to run the command from */
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struct bnx2x_vlan_mac_obj *vlan_mac_obj;
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/* General command flags: COMP_WAIT, etc. */
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unsigned long ramrod_flags;
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/* Command specific configuration request */
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struct bnx2x_vlan_mac_data user_req;
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};
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struct bnx2x_vlan_mac_obj {
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struct bnx2x_raw_obj raw;
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/* Bookkeeping list: will prevent the addition of already existing
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* entries.
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*/
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struct list_head head;
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/* Implement a simple reader/writer lock on the head list.
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* all these fields should only be accessed under the exe_queue lock
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*/
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u8 head_reader; /* Num. of readers accessing head list */
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bool head_exe_request; /* Pending execution request. */
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unsigned long saved_ramrod_flags; /* Ramrods of pending execution */
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/* TODO: Add it's initialization in the init functions */
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struct bnx2x_exe_queue_obj exe_queue;
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/* MACs credit pool */
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struct bnx2x_credit_pool_obj *macs_pool;
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/* VLANs credit pool */
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struct bnx2x_credit_pool_obj *vlans_pool;
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/* RAMROD command to be used */
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int ramrod_cmd;
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/* copy first n elements onto preallocated buffer
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*
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* @param n number of elements to get
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* @param buf buffer preallocated by caller into which elements
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* will be copied. Note elements are 4-byte aligned
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* so buffer size must be able to accommodate the
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* aligned elements.
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*
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* @return number of copied bytes
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*/
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int (*get_n_elements)(struct bnx2x *bp,
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struct bnx2x_vlan_mac_obj *o, int n, u8 *base,
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u8 stride, u8 size);
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/**
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* Checks if ADD-ramrod with the given params may be performed.
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*
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* @return zero if the element may be added
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*/
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int (*check_add)(struct bnx2x *bp,
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struct bnx2x_vlan_mac_obj *o,
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union bnx2x_classification_ramrod_data *data);
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/**
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* Checks if DEL-ramrod with the given params may be performed.
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*
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* @return true if the element may be deleted
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*/
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struct bnx2x_vlan_mac_registry_elem *
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(*check_del)(struct bnx2x *bp,
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struct bnx2x_vlan_mac_obj *o,
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union bnx2x_classification_ramrod_data *data);
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/**
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* Checks if DEL-ramrod with the given params may be performed.
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*
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* @return true if the element may be deleted
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*/
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bool (*check_move)(struct bnx2x *bp,
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struct bnx2x_vlan_mac_obj *src_o,
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struct bnx2x_vlan_mac_obj *dst_o,
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union bnx2x_classification_ramrod_data *data);
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/**
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* Update the relevant credit object(s) (consume/return
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* correspondingly).
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*/
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bool (*get_credit)(struct bnx2x_vlan_mac_obj *o);
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bool (*put_credit)(struct bnx2x_vlan_mac_obj *o);
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bool (*get_cam_offset)(struct bnx2x_vlan_mac_obj *o, int *offset);
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bool (*put_cam_offset)(struct bnx2x_vlan_mac_obj *o, int offset);
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/**
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* Configures one rule in the ramrod data buffer.
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*/
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void (*set_one_rule)(struct bnx2x *bp,
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struct bnx2x_vlan_mac_obj *o,
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struct bnx2x_exeq_elem *elem, int rule_idx,
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int cam_offset);
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/**
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* Delete all configured elements having the given
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* vlan_mac_flags specification. Assumes no pending for
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* execution commands. Will schedule all all currently
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* configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
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* specification for deletion and will use the given
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* ramrod_flags for the last DEL operation.
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*
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* @param bp
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* @param o
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* @param ramrod_flags RAMROD_XX flags
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*
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* @return 0 if the last operation has completed successfully
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* and there are no more elements left, positive value
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* if there are pending for completion commands,
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* negative value in case of failure.
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*/
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int (*delete_all)(struct bnx2x *bp,
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struct bnx2x_vlan_mac_obj *o,
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unsigned long *vlan_mac_flags,
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unsigned long *ramrod_flags);
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/**
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* Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
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* configured elements list.
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*
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* @param bp
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* @param p Command parameters (RAMROD_COMP_WAIT bit in
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* ramrod_flags is only taken into an account)
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* @param ppos a pointer to the cookie that should be given back in the
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* next call to make function handle the next element. If
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* *ppos is set to NULL it will restart the iterator.
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* If returned *ppos == NULL this means that the last
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* element has been handled.
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*
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* @return int
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*/
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int (*restore)(struct bnx2x *bp,
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struct bnx2x_vlan_mac_ramrod_params *p,
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struct bnx2x_vlan_mac_registry_elem **ppos);
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/**
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* Should be called on a completion arrival.
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*
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* @param bp
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* @param o
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* @param cqe Completion element we are handling
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* @param ramrod_flags if RAMROD_CONT is set the next bulk of
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* pending commands will be executed.
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* RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
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* may also be set if needed.
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*
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* @return 0 if there are neither pending nor waiting for
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* completion commands. Positive value if there are
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* pending for execution or for completion commands.
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* Negative value in case of an error (including an
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* error in the cqe).
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*/
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int (*complete)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
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union event_ring_elem *cqe,
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unsigned long *ramrod_flags);
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/**
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* Wait for completion of all commands. Don't schedule new ones,
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* just wait. It assumes that the completion code will schedule
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* for new commands.
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*/
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int (*wait)(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o);
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};
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enum {
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BNX2X_LLH_CAM_ISCSI_ETH_LINE = 0,
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BNX2X_LLH_CAM_ETH_LINE,
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BNX2X_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
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};
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/** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
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/* RX_MODE ramrod special flags: set in rx_mode_flags field in
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* a bnx2x_rx_mode_ramrod_params.
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*/
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enum {
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BNX2X_RX_MODE_FCOE_ETH,
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BNX2X_RX_MODE_ISCSI_ETH,
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};
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enum {
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BNX2X_ACCEPT_UNICAST,
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BNX2X_ACCEPT_MULTICAST,
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BNX2X_ACCEPT_ALL_UNICAST,
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BNX2X_ACCEPT_ALL_MULTICAST,
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BNX2X_ACCEPT_BROADCAST,
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BNX2X_ACCEPT_UNMATCHED,
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BNX2X_ACCEPT_ANY_VLAN
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};
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struct bnx2x_rx_mode_ramrod_params {
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struct bnx2x_rx_mode_obj *rx_mode_obj;
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unsigned long *pstate;
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int state;
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u8 cl_id;
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u32 cid;
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u8 func_id;
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unsigned long ramrod_flags;
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unsigned long rx_mode_flags;
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/* rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
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* a tstorm_eth_mac_filter_config (e1x).
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*/
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void *rdata;
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dma_addr_t rdata_mapping;
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/* Rx mode settings */
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unsigned long rx_accept_flags;
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/* internal switching settings */
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unsigned long tx_accept_flags;
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};
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struct bnx2x_rx_mode_obj {
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int (*config_rx_mode)(struct bnx2x *bp,
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struct bnx2x_rx_mode_ramrod_params *p);
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int (*wait_comp)(struct bnx2x *bp,
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struct bnx2x_rx_mode_ramrod_params *p);
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};
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/********************** Set multicast group ***********************************/
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struct bnx2x_mcast_list_elem {
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struct list_head link;
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u8 *mac;
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};
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|
|
union bnx2x_mcast_config_data {
|
|
u8 *mac;
|
|
u8 bin; /* used in a RESTORE flow */
|
|
};
|
|
|
|
struct bnx2x_mcast_ramrod_params {
|
|
struct bnx2x_mcast_obj *mcast_obj;
|
|
|
|
/* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
|
|
unsigned long ramrod_flags;
|
|
|
|
struct list_head mcast_list; /* list of struct bnx2x_mcast_list_elem */
|
|
/** TODO:
|
|
* - rename it to macs_num.
|
|
* - Add a new command type for handling pending commands
|
|
* (remove "zero semantics").
|
|
*
|
|
* Length of mcast_list. If zero and ADD_CONT command - post
|
|
* pending commands.
|
|
*/
|
|
int mcast_list_len;
|
|
};
|
|
|
|
enum bnx2x_mcast_cmd {
|
|
BNX2X_MCAST_CMD_ADD,
|
|
BNX2X_MCAST_CMD_CONT,
|
|
BNX2X_MCAST_CMD_DEL,
|
|
BNX2X_MCAST_CMD_RESTORE,
|
|
|
|
/* Following this, multicast configuration should equal to approx
|
|
* the set of MACs provided [i.e., remove all else].
|
|
* The two sub-commands are used internally to decide whether a given
|
|
* bin is to be added or removed
|
|
*/
|
|
BNX2X_MCAST_CMD_SET,
|
|
BNX2X_MCAST_CMD_SET_ADD,
|
|
BNX2X_MCAST_CMD_SET_DEL,
|
|
};
|
|
|
|
struct bnx2x_mcast_obj {
|
|
struct bnx2x_raw_obj raw;
|
|
|
|
union {
|
|
struct {
|
|
#define BNX2X_MCAST_BINS_NUM 256
|
|
#define BNX2X_MCAST_VEC_SZ (BNX2X_MCAST_BINS_NUM / 64)
|
|
u64 vec[BNX2X_MCAST_VEC_SZ];
|
|
|
|
/** Number of BINs to clear. Should be updated
|
|
* immediately when a command arrives in order to
|
|
* properly create DEL commands.
|
|
*/
|
|
int num_bins_set;
|
|
} aprox_match;
|
|
|
|
struct {
|
|
struct list_head macs;
|
|
int num_macs_set;
|
|
} exact_match;
|
|
} registry;
|
|
|
|
/* Pending commands */
|
|
struct list_head pending_cmds_head;
|
|
|
|
/* A state that is set in raw.pstate, when there are pending commands */
|
|
int sched_state;
|
|
|
|
/* Maximal number of mcast MACs configured in one command */
|
|
int max_cmd_len;
|
|
|
|
/* Total number of currently pending MACs to configure: both
|
|
* in the pending commands list and in the current command.
|
|
*/
|
|
int total_pending_num;
|
|
|
|
u8 engine_id;
|
|
|
|
/**
|
|
* @param cmd command to execute (BNX2X_MCAST_CMD_X, see above)
|
|
*/
|
|
int (*config_mcast)(struct bnx2x *bp,
|
|
struct bnx2x_mcast_ramrod_params *p,
|
|
enum bnx2x_mcast_cmd cmd);
|
|
|
|
/**
|
|
* Fills the ramrod data during the RESTORE flow.
|
|
*
|
|
* @param bp
|
|
* @param o
|
|
* @param start_idx Registry index to start from
|
|
* @param rdata_idx Index in the ramrod data to start from
|
|
*
|
|
* @return -1 if we handled the whole registry or index of the last
|
|
* handled registry element.
|
|
*/
|
|
int (*hdl_restore)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
|
|
int start_bin, int *rdata_idx);
|
|
|
|
int (*enqueue_cmd)(struct bnx2x *bp, struct bnx2x_mcast_obj *o,
|
|
struct bnx2x_mcast_ramrod_params *p,
|
|
enum bnx2x_mcast_cmd cmd);
|
|
|
|
void (*set_one_rule)(struct bnx2x *bp,
|
|
struct bnx2x_mcast_obj *o, int idx,
|
|
union bnx2x_mcast_config_data *cfg_data,
|
|
enum bnx2x_mcast_cmd cmd);
|
|
|
|
/** Checks if there are more mcast MACs to be set or a previous
|
|
* command is still pending.
|
|
*/
|
|
bool (*check_pending)(struct bnx2x_mcast_obj *o);
|
|
|
|
/**
|
|
* Set/Clear/Check SCHEDULED state of the object
|
|
*/
|
|
void (*set_sched)(struct bnx2x_mcast_obj *o);
|
|
void (*clear_sched)(struct bnx2x_mcast_obj *o);
|
|
bool (*check_sched)(struct bnx2x_mcast_obj *o);
|
|
|
|
/* Wait until all pending commands complete */
|
|
int (*wait_comp)(struct bnx2x *bp, struct bnx2x_mcast_obj *o);
|
|
|
|
/**
|
|
* Handle the internal object counters needed for proper
|
|
* commands handling. Checks that the provided parameters are
|
|
* feasible.
|
|
*/
|
|
int (*validate)(struct bnx2x *bp,
|
|
struct bnx2x_mcast_ramrod_params *p,
|
|
enum bnx2x_mcast_cmd cmd);
|
|
|
|
/**
|
|
* Restore the values of internal counters in case of a failure.
|
|
*/
|
|
void (*revert)(struct bnx2x *bp,
|
|
struct bnx2x_mcast_ramrod_params *p,
|
|
int old_num_bins,
|
|
enum bnx2x_mcast_cmd cmd);
|
|
|
|
int (*get_registry_size)(struct bnx2x_mcast_obj *o);
|
|
void (*set_registry_size)(struct bnx2x_mcast_obj *o, int n);
|
|
};
|
|
|
|
/*************************** Credit handling **********************************/
|
|
struct bnx2x_credit_pool_obj {
|
|
|
|
/* Current amount of credit in the pool */
|
|
atomic_t credit;
|
|
|
|
/* Maximum allowed credit. put() will check against it. */
|
|
int pool_sz;
|
|
|
|
/* Allocate a pool table statically.
|
|
*
|
|
* Currently the maximum allowed size is MAX_MAC_CREDIT_E2(272)
|
|
*
|
|
* The set bit in the table will mean that the entry is available.
|
|
*/
|
|
#define BNX2X_POOL_VEC_SIZE (MAX_MAC_CREDIT_E2 / 64)
|
|
u64 pool_mirror[BNX2X_POOL_VEC_SIZE];
|
|
|
|
/* Base pool offset (initialized differently */
|
|
int base_pool_offset;
|
|
|
|
/**
|
|
* Get the next free pool entry.
|
|
*
|
|
* @return true if there was a free entry in the pool
|
|
*/
|
|
bool (*get_entry)(struct bnx2x_credit_pool_obj *o, int *entry);
|
|
|
|
/**
|
|
* Return the entry back to the pool.
|
|
*
|
|
* @return true if entry is legal and has been successfully
|
|
* returned to the pool.
|
|
*/
|
|
bool (*put_entry)(struct bnx2x_credit_pool_obj *o, int entry);
|
|
|
|
/**
|
|
* Get the requested amount of credit from the pool.
|
|
*
|
|
* @param cnt Amount of requested credit
|
|
* @return true if the operation is successful
|
|
*/
|
|
bool (*get)(struct bnx2x_credit_pool_obj *o, int cnt);
|
|
|
|
/**
|
|
* Returns the credit to the pool.
|
|
*
|
|
* @param cnt Amount of credit to return
|
|
* @return true if the operation is successful
|
|
*/
|
|
bool (*put)(struct bnx2x_credit_pool_obj *o, int cnt);
|
|
|
|
/**
|
|
* Reads the current amount of credit.
|
|
*/
|
|
int (*check)(struct bnx2x_credit_pool_obj *o);
|
|
};
|
|
|
|
/*************************** RSS configuration ********************************/
|
|
enum {
|
|
/* RSS_MODE bits are mutually exclusive */
|
|
BNX2X_RSS_MODE_DISABLED,
|
|
BNX2X_RSS_MODE_REGULAR,
|
|
|
|
BNX2X_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
|
|
|
|
BNX2X_RSS_IPV4,
|
|
BNX2X_RSS_IPV4_TCP,
|
|
BNX2X_RSS_IPV4_UDP,
|
|
BNX2X_RSS_IPV6,
|
|
BNX2X_RSS_IPV6_TCP,
|
|
BNX2X_RSS_IPV6_UDP,
|
|
|
|
BNX2X_RSS_IPV4_VXLAN,
|
|
BNX2X_RSS_IPV6_VXLAN,
|
|
BNX2X_RSS_TUNN_INNER_HDRS,
|
|
};
|
|
|
|
struct bnx2x_config_rss_params {
|
|
struct bnx2x_rss_config_obj *rss_obj;
|
|
|
|
/* may have RAMROD_COMP_WAIT set only */
|
|
unsigned long ramrod_flags;
|
|
|
|
/* BNX2X_RSS_X bits */
|
|
unsigned long rss_flags;
|
|
|
|
/* Number hash bits to take into an account */
|
|
u8 rss_result_mask;
|
|
|
|
/* Indirection table */
|
|
u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
|
|
|
|
/* RSS hash values */
|
|
u32 rss_key[10];
|
|
|
|
/* valid only iff BNX2X_RSS_UPDATE_TOE is set */
|
|
u16 toe_rss_bitmap;
|
|
};
|
|
|
|
struct bnx2x_rss_config_obj {
|
|
struct bnx2x_raw_obj raw;
|
|
|
|
/* RSS engine to use */
|
|
u8 engine_id;
|
|
|
|
/* Last configured indirection table */
|
|
u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
|
|
|
|
/* flags for enabling 4-tupple hash on UDP */
|
|
u8 udp_rss_v4;
|
|
u8 udp_rss_v6;
|
|
|
|
int (*config_rss)(struct bnx2x *bp,
|
|
struct bnx2x_config_rss_params *p);
|
|
};
|
|
|
|
/*********************** Queue state update ***********************************/
|
|
|
|
/* UPDATE command options */
|
|
enum {
|
|
BNX2X_Q_UPDATE_IN_VLAN_REM,
|
|
BNX2X_Q_UPDATE_IN_VLAN_REM_CHNG,
|
|
BNX2X_Q_UPDATE_OUT_VLAN_REM,
|
|
BNX2X_Q_UPDATE_OUT_VLAN_REM_CHNG,
|
|
BNX2X_Q_UPDATE_ANTI_SPOOF,
|
|
BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG,
|
|
BNX2X_Q_UPDATE_ACTIVATE,
|
|
BNX2X_Q_UPDATE_ACTIVATE_CHNG,
|
|
BNX2X_Q_UPDATE_DEF_VLAN_EN,
|
|
BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
|
|
BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
|
|
BNX2X_Q_UPDATE_SILENT_VLAN_REM,
|
|
BNX2X_Q_UPDATE_TX_SWITCHING_CHNG,
|
|
BNX2X_Q_UPDATE_TX_SWITCHING,
|
|
BNX2X_Q_UPDATE_PTP_PKTS_CHNG,
|
|
BNX2X_Q_UPDATE_PTP_PKTS,
|
|
};
|
|
|
|
/* Allowed Queue states */
|
|
enum bnx2x_q_state {
|
|
BNX2X_Q_STATE_RESET,
|
|
BNX2X_Q_STATE_INITIALIZED,
|
|
BNX2X_Q_STATE_ACTIVE,
|
|
BNX2X_Q_STATE_MULTI_COS,
|
|
BNX2X_Q_STATE_MCOS_TERMINATED,
|
|
BNX2X_Q_STATE_INACTIVE,
|
|
BNX2X_Q_STATE_STOPPED,
|
|
BNX2X_Q_STATE_TERMINATED,
|
|
BNX2X_Q_STATE_FLRED,
|
|
BNX2X_Q_STATE_MAX,
|
|
};
|
|
|
|
/* Allowed Queue states */
|
|
enum bnx2x_q_logical_state {
|
|
BNX2X_Q_LOGICAL_STATE_ACTIVE,
|
|
BNX2X_Q_LOGICAL_STATE_STOPPED,
|
|
};
|
|
|
|
/* Allowed commands */
|
|
enum bnx2x_queue_cmd {
|
|
BNX2X_Q_CMD_INIT,
|
|
BNX2X_Q_CMD_SETUP,
|
|
BNX2X_Q_CMD_SETUP_TX_ONLY,
|
|
BNX2X_Q_CMD_DEACTIVATE,
|
|
BNX2X_Q_CMD_ACTIVATE,
|
|
BNX2X_Q_CMD_UPDATE,
|
|
BNX2X_Q_CMD_UPDATE_TPA,
|
|
BNX2X_Q_CMD_HALT,
|
|
BNX2X_Q_CMD_CFC_DEL,
|
|
BNX2X_Q_CMD_TERMINATE,
|
|
BNX2X_Q_CMD_EMPTY,
|
|
BNX2X_Q_CMD_MAX,
|
|
};
|
|
|
|
/* queue SETUP + INIT flags */
|
|
enum {
|
|
BNX2X_Q_FLG_TPA,
|
|
BNX2X_Q_FLG_TPA_IPV6,
|
|
BNX2X_Q_FLG_TPA_GRO,
|
|
BNX2X_Q_FLG_STATS,
|
|
BNX2X_Q_FLG_ZERO_STATS,
|
|
BNX2X_Q_FLG_ACTIVE,
|
|
BNX2X_Q_FLG_OV,
|
|
BNX2X_Q_FLG_VLAN,
|
|
BNX2X_Q_FLG_COS,
|
|
BNX2X_Q_FLG_HC,
|
|
BNX2X_Q_FLG_HC_EN,
|
|
BNX2X_Q_FLG_DHC,
|
|
BNX2X_Q_FLG_FCOE,
|
|
BNX2X_Q_FLG_LEADING_RSS,
|
|
BNX2X_Q_FLG_MCAST,
|
|
BNX2X_Q_FLG_DEF_VLAN,
|
|
BNX2X_Q_FLG_TX_SWITCH,
|
|
BNX2X_Q_FLG_TX_SEC,
|
|
BNX2X_Q_FLG_ANTI_SPOOF,
|
|
BNX2X_Q_FLG_SILENT_VLAN_REM,
|
|
BNX2X_Q_FLG_FORCE_DEFAULT_PRI,
|
|
BNX2X_Q_FLG_REFUSE_OUTBAND_VLAN,
|
|
BNX2X_Q_FLG_PCSUM_ON_PKT,
|
|
BNX2X_Q_FLG_TUN_INC_INNER_IP_ID
|
|
};
|
|
|
|
/* Queue type options: queue type may be a combination of below. */
|
|
enum bnx2x_q_type {
|
|
/** TODO: Consider moving both these flags into the init()
|
|
* ramrod params.
|
|
*/
|
|
BNX2X_Q_TYPE_HAS_RX,
|
|
BNX2X_Q_TYPE_HAS_TX,
|
|
};
|
|
|
|
#define BNX2X_PRIMARY_CID_INDEX 0
|
|
#define BNX2X_MULTI_TX_COS_E1X 3 /* QM only */
|
|
#define BNX2X_MULTI_TX_COS_E2_E3A0 2
|
|
#define BNX2X_MULTI_TX_COS_E3B0 3
|
|
#define BNX2X_MULTI_TX_COS 3 /* Maximum possible */
|
|
|
|
#define MAC_PAD (ALIGN(ETH_ALEN, sizeof(u32)) - ETH_ALEN)
|
|
/* DMAE channel to be used by FW for timesync workaroun. A driver that sends
|
|
* timesync-related ramrods must not use this DMAE command ID.
|
|
*/
|
|
#define FW_DMAE_CMD_ID 6
|
|
|
|
struct bnx2x_queue_init_params {
|
|
struct {
|
|
unsigned long flags;
|
|
u16 hc_rate;
|
|
u8 fw_sb_id;
|
|
u8 sb_cq_index;
|
|
} tx;
|
|
|
|
struct {
|
|
unsigned long flags;
|
|
u16 hc_rate;
|
|
u8 fw_sb_id;
|
|
u8 sb_cq_index;
|
|
} rx;
|
|
|
|
/* CID context in the host memory */
|
|
struct eth_context *cxts[BNX2X_MULTI_TX_COS];
|
|
|
|
/* maximum number of cos supported by hardware */
|
|
u8 max_cos;
|
|
};
|
|
|
|
struct bnx2x_queue_terminate_params {
|
|
/* index within the tx_only cids of this queue object */
|
|
u8 cid_index;
|
|
};
|
|
|
|
struct bnx2x_queue_cfc_del_params {
|
|
/* index within the tx_only cids of this queue object */
|
|
u8 cid_index;
|
|
};
|
|
|
|
struct bnx2x_queue_update_params {
|
|
unsigned long update_flags; /* BNX2X_Q_UPDATE_XX bits */
|
|
u16 def_vlan;
|
|
u16 silent_removal_value;
|
|
u16 silent_removal_mask;
|
|
/* index within the tx_only cids of this queue object */
|
|
u8 cid_index;
|
|
};
|
|
|
|
struct bnx2x_queue_update_tpa_params {
|
|
dma_addr_t sge_map;
|
|
u8 update_ipv4;
|
|
u8 update_ipv6;
|
|
u8 max_tpa_queues;
|
|
u8 max_sges_pkt;
|
|
u8 complete_on_both_clients;
|
|
u8 dont_verify_thr;
|
|
u8 tpa_mode;
|
|
u8 _pad;
|
|
|
|
u16 sge_buff_sz;
|
|
u16 max_agg_sz;
|
|
|
|
u16 sge_pause_thr_low;
|
|
u16 sge_pause_thr_high;
|
|
};
|
|
|
|
struct rxq_pause_params {
|
|
u16 bd_th_lo;
|
|
u16 bd_th_hi;
|
|
u16 rcq_th_lo;
|
|
u16 rcq_th_hi;
|
|
u16 sge_th_lo; /* valid iff BNX2X_Q_FLG_TPA */
|
|
u16 sge_th_hi; /* valid iff BNX2X_Q_FLG_TPA */
|
|
u16 pri_map;
|
|
};
|
|
|
|
/* general */
|
|
struct bnx2x_general_setup_params {
|
|
/* valid iff BNX2X_Q_FLG_STATS */
|
|
u8 stat_id;
|
|
|
|
u8 spcl_id;
|
|
u16 mtu;
|
|
u8 cos;
|
|
|
|
u8 fp_hsi;
|
|
};
|
|
|
|
struct bnx2x_rxq_setup_params {
|
|
/* dma */
|
|
dma_addr_t dscr_map;
|
|
dma_addr_t sge_map;
|
|
dma_addr_t rcq_map;
|
|
dma_addr_t rcq_np_map;
|
|
|
|
u16 drop_flags;
|
|
u16 buf_sz;
|
|
u8 fw_sb_id;
|
|
u8 cl_qzone_id;
|
|
|
|
/* valid iff BNX2X_Q_FLG_TPA */
|
|
u16 tpa_agg_sz;
|
|
u16 sge_buf_sz;
|
|
u8 max_sges_pkt;
|
|
u8 max_tpa_queues;
|
|
u8 rss_engine_id;
|
|
|
|
/* valid iff BNX2X_Q_FLG_MCAST */
|
|
u8 mcast_engine_id;
|
|
|
|
u8 cache_line_log;
|
|
|
|
u8 sb_cq_index;
|
|
|
|
/* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
|
|
u16 silent_removal_value;
|
|
u16 silent_removal_mask;
|
|
};
|
|
|
|
struct bnx2x_txq_setup_params {
|
|
/* dma */
|
|
dma_addr_t dscr_map;
|
|
|
|
u8 fw_sb_id;
|
|
u8 sb_cq_index;
|
|
u8 cos; /* valid iff BNX2X_Q_FLG_COS */
|
|
u16 traffic_type;
|
|
/* equals to the leading rss client id, used for TX classification*/
|
|
u8 tss_leading_cl_id;
|
|
|
|
/* valid iff BNX2X_Q_FLG_DEF_VLAN */
|
|
u16 default_vlan;
|
|
};
|
|
|
|
struct bnx2x_queue_setup_params {
|
|
struct bnx2x_general_setup_params gen_params;
|
|
struct bnx2x_txq_setup_params txq_params;
|
|
struct bnx2x_rxq_setup_params rxq_params;
|
|
struct rxq_pause_params pause_params;
|
|
unsigned long flags;
|
|
};
|
|
|
|
struct bnx2x_queue_setup_tx_only_params {
|
|
struct bnx2x_general_setup_params gen_params;
|
|
struct bnx2x_txq_setup_params txq_params;
|
|
unsigned long flags;
|
|
/* index within the tx_only cids of this queue object */
|
|
u8 cid_index;
|
|
};
|
|
|
|
struct bnx2x_queue_state_params {
|
|
struct bnx2x_queue_sp_obj *q_obj;
|
|
|
|
/* Current command */
|
|
enum bnx2x_queue_cmd cmd;
|
|
|
|
/* may have RAMROD_COMP_WAIT set only */
|
|
unsigned long ramrod_flags;
|
|
|
|
/* Params according to the current command */
|
|
union {
|
|
struct bnx2x_queue_update_params update;
|
|
struct bnx2x_queue_update_tpa_params update_tpa;
|
|
struct bnx2x_queue_setup_params setup;
|
|
struct bnx2x_queue_init_params init;
|
|
struct bnx2x_queue_setup_tx_only_params tx_only;
|
|
struct bnx2x_queue_terminate_params terminate;
|
|
struct bnx2x_queue_cfc_del_params cfc_del;
|
|
} params;
|
|
};
|
|
|
|
struct bnx2x_viflist_params {
|
|
u8 echo_res;
|
|
u8 func_bit_map_res;
|
|
};
|
|
|
|
struct bnx2x_queue_sp_obj {
|
|
u32 cids[BNX2X_MULTI_TX_COS];
|
|
u8 cl_id;
|
|
u8 func_id;
|
|
|
|
/* number of traffic classes supported by queue.
|
|
* The primary connection of the queue supports the first traffic
|
|
* class. Any further traffic class is supported by a tx-only
|
|
* connection.
|
|
*
|
|
* Therefore max_cos is also a number of valid entries in the cids
|
|
* array.
|
|
*/
|
|
u8 max_cos;
|
|
u8 num_tx_only, next_tx_only;
|
|
|
|
enum bnx2x_q_state state, next_state;
|
|
|
|
/* bits from enum bnx2x_q_type */
|
|
unsigned long type;
|
|
|
|
/* BNX2X_Q_CMD_XX bits. This object implements "one
|
|
* pending" paradigm but for debug and tracing purposes it's
|
|
* more convenient to have different bits for different
|
|
* commands.
|
|
*/
|
|
unsigned long pending;
|
|
|
|
/* Buffer to use as a ramrod data and its mapping */
|
|
void *rdata;
|
|
dma_addr_t rdata_mapping;
|
|
|
|
/**
|
|
* Performs one state change according to the given parameters.
|
|
*
|
|
* @return 0 in case of success and negative value otherwise.
|
|
*/
|
|
int (*send_cmd)(struct bnx2x *bp,
|
|
struct bnx2x_queue_state_params *params);
|
|
|
|
/**
|
|
* Sets the pending bit according to the requested transition.
|
|
*/
|
|
int (*set_pending)(struct bnx2x_queue_sp_obj *o,
|
|
struct bnx2x_queue_state_params *params);
|
|
|
|
/**
|
|
* Checks that the requested state transition is legal.
|
|
*/
|
|
int (*check_transition)(struct bnx2x *bp,
|
|
struct bnx2x_queue_sp_obj *o,
|
|
struct bnx2x_queue_state_params *params);
|
|
|
|
/**
|
|
* Completes the pending command.
|
|
*/
|
|
int (*complete_cmd)(struct bnx2x *bp,
|
|
struct bnx2x_queue_sp_obj *o,
|
|
enum bnx2x_queue_cmd);
|
|
|
|
int (*wait_comp)(struct bnx2x *bp,
|
|
struct bnx2x_queue_sp_obj *o,
|
|
enum bnx2x_queue_cmd cmd);
|
|
};
|
|
|
|
/********************** Function state update *********************************/
|
|
|
|
/* UPDATE command options */
|
|
enum {
|
|
BNX2X_F_UPDATE_TX_SWITCH_SUSPEND_CHNG,
|
|
BNX2X_F_UPDATE_TX_SWITCH_SUSPEND,
|
|
BNX2X_F_UPDATE_SD_VLAN_TAG_CHNG,
|
|
BNX2X_F_UPDATE_SD_VLAN_ETH_TYPE_CHNG,
|
|
BNX2X_F_UPDATE_VLAN_FORCE_PRIO_CHNG,
|
|
BNX2X_F_UPDATE_VLAN_FORCE_PRIO_FLAG,
|
|
BNX2X_F_UPDATE_TUNNEL_CFG_CHNG,
|
|
BNX2X_F_UPDATE_TUNNEL_INNER_CLSS_L2GRE,
|
|
BNX2X_F_UPDATE_TUNNEL_INNER_CLSS_VXLAN,
|
|
BNX2X_F_UPDATE_TUNNEL_INNER_CLSS_L2GENEVE,
|
|
BNX2X_F_UPDATE_TUNNEL_INNER_RSS,
|
|
};
|
|
|
|
/* Allowed Function states */
|
|
enum bnx2x_func_state {
|
|
BNX2X_F_STATE_RESET,
|
|
BNX2X_F_STATE_INITIALIZED,
|
|
BNX2X_F_STATE_STARTED,
|
|
BNX2X_F_STATE_TX_STOPPED,
|
|
BNX2X_F_STATE_MAX,
|
|
};
|
|
|
|
/* Allowed Function commands */
|
|
enum bnx2x_func_cmd {
|
|
BNX2X_F_CMD_HW_INIT,
|
|
BNX2X_F_CMD_START,
|
|
BNX2X_F_CMD_STOP,
|
|
BNX2X_F_CMD_HW_RESET,
|
|
BNX2X_F_CMD_AFEX_UPDATE,
|
|
BNX2X_F_CMD_AFEX_VIFLISTS,
|
|
BNX2X_F_CMD_TX_STOP,
|
|
BNX2X_F_CMD_TX_START,
|
|
BNX2X_F_CMD_SWITCH_UPDATE,
|
|
BNX2X_F_CMD_SET_TIMESYNC,
|
|
BNX2X_F_CMD_MAX,
|
|
};
|
|
|
|
struct bnx2x_func_hw_init_params {
|
|
/* A load phase returned by MCP.
|
|
*
|
|
* May be:
|
|
* FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
|
|
* FW_MSG_CODE_DRV_LOAD_COMMON
|
|
* FW_MSG_CODE_DRV_LOAD_PORT
|
|
* FW_MSG_CODE_DRV_LOAD_FUNCTION
|
|
*/
|
|
u32 load_phase;
|
|
};
|
|
|
|
struct bnx2x_func_hw_reset_params {
|
|
/* A load phase returned by MCP.
|
|
*
|
|
* May be:
|
|
* FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
|
|
* FW_MSG_CODE_DRV_LOAD_COMMON
|
|
* FW_MSG_CODE_DRV_LOAD_PORT
|
|
* FW_MSG_CODE_DRV_LOAD_FUNCTION
|
|
*/
|
|
u32 reset_phase;
|
|
};
|
|
|
|
struct bnx2x_func_start_params {
|
|
/* Multi Function mode:
|
|
* - Single Function
|
|
* - Switch Dependent
|
|
* - Switch Independent
|
|
*/
|
|
u16 mf_mode;
|
|
|
|
/* Switch Dependent mode outer VLAN tag */
|
|
u16 sd_vlan_tag;
|
|
|
|
/* Function cos mode */
|
|
u8 network_cos_mode;
|
|
|
|
/* UDP dest port for VXLAN */
|
|
u16 vxlan_dst_port;
|
|
|
|
/* UDP dest port for Geneve */
|
|
u16 geneve_dst_port;
|
|
|
|
/* Enable inner Rx classifications for L2GRE packets */
|
|
u8 inner_clss_l2gre;
|
|
|
|
/* Enable inner Rx classifications for L2-Geneve packets */
|
|
u8 inner_clss_l2geneve;
|
|
|
|
/* Enable inner Rx classification for vxlan packets */
|
|
u8 inner_clss_vxlan;
|
|
|
|
/* Enable RSS according to inner header */
|
|
u8 inner_rss;
|
|
|
|
/* Allows accepting of packets failing MF classification, possibly
|
|
* only matching a given ethertype
|
|
*/
|
|
u8 class_fail;
|
|
u16 class_fail_ethtype;
|
|
|
|
/* Override priority of output packets */
|
|
u8 sd_vlan_force_pri;
|
|
u8 sd_vlan_force_pri_val;
|
|
|
|
/* Replace vlan's ethertype */
|
|
u16 sd_vlan_eth_type;
|
|
|
|
/* Prevent inner vlans from being added by FW */
|
|
u8 no_added_tags;
|
|
|
|
/* Inner-to-Outer vlan priority mapping */
|
|
u8 c2s_pri[MAX_VLAN_PRIORITIES];
|
|
u8 c2s_pri_default;
|
|
u8 c2s_pri_valid;
|
|
};
|
|
|
|
struct bnx2x_func_switch_update_params {
|
|
unsigned long changes; /* BNX2X_F_UPDATE_XX bits */
|
|
u16 vlan;
|
|
u16 vlan_eth_type;
|
|
u8 vlan_force_prio;
|
|
u16 vxlan_dst_port;
|
|
u16 geneve_dst_port;
|
|
};
|
|
|
|
struct bnx2x_func_afex_update_params {
|
|
u16 vif_id;
|
|
u16 afex_default_vlan;
|
|
u8 allowed_priorities;
|
|
};
|
|
|
|
struct bnx2x_func_afex_viflists_params {
|
|
u16 vif_list_index;
|
|
u8 func_bit_map;
|
|
u8 afex_vif_list_command;
|
|
u8 func_to_clear;
|
|
};
|
|
|
|
struct bnx2x_func_tx_start_params {
|
|
struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
|
|
u8 dcb_enabled;
|
|
u8 dcb_version;
|
|
u8 dont_add_pri_0_en;
|
|
u8 dcb_outer_pri[MAX_TRAFFIC_TYPES];
|
|
};
|
|
|
|
struct bnx2x_func_set_timesync_params {
|
|
/* Reset, set or keep the current drift value */
|
|
u8 drift_adjust_cmd;
|
|
|
|
/* Dec, inc or keep the current offset */
|
|
u8 offset_cmd;
|
|
|
|
/* Drift value direction */
|
|
u8 add_sub_drift_adjust_value;
|
|
|
|
/* Drift, period and offset values to be used according to the commands
|
|
* above.
|
|
*/
|
|
u8 drift_adjust_value;
|
|
u32 drift_adjust_period;
|
|
u64 offset_delta;
|
|
};
|
|
|
|
struct bnx2x_func_state_params {
|
|
struct bnx2x_func_sp_obj *f_obj;
|
|
|
|
/* Current command */
|
|
enum bnx2x_func_cmd cmd;
|
|
|
|
/* may have RAMROD_COMP_WAIT set only */
|
|
unsigned long ramrod_flags;
|
|
|
|
/* Params according to the current command */
|
|
union {
|
|
struct bnx2x_func_hw_init_params hw_init;
|
|
struct bnx2x_func_hw_reset_params hw_reset;
|
|
struct bnx2x_func_start_params start;
|
|
struct bnx2x_func_switch_update_params switch_update;
|
|
struct bnx2x_func_afex_update_params afex_update;
|
|
struct bnx2x_func_afex_viflists_params afex_viflists;
|
|
struct bnx2x_func_tx_start_params tx_start;
|
|
struct bnx2x_func_set_timesync_params set_timesync;
|
|
} params;
|
|
};
|
|
|
|
struct bnx2x_func_sp_drv_ops {
|
|
/* Init tool + runtime initialization:
|
|
* - Common Chip
|
|
* - Common (per Path)
|
|
* - Port
|
|
* - Function phases
|
|
*/
|
|
int (*init_hw_cmn_chip)(struct bnx2x *bp);
|
|
int (*init_hw_cmn)(struct bnx2x *bp);
|
|
int (*init_hw_port)(struct bnx2x *bp);
|
|
int (*init_hw_func)(struct bnx2x *bp);
|
|
|
|
/* Reset Function HW: Common, Port, Function phases. */
|
|
void (*reset_hw_cmn)(struct bnx2x *bp);
|
|
void (*reset_hw_port)(struct bnx2x *bp);
|
|
void (*reset_hw_func)(struct bnx2x *bp);
|
|
|
|
/* Init/Free GUNZIP resources */
|
|
int (*gunzip_init)(struct bnx2x *bp);
|
|
void (*gunzip_end)(struct bnx2x *bp);
|
|
|
|
/* Prepare/Release FW resources */
|
|
int (*init_fw)(struct bnx2x *bp);
|
|
void (*release_fw)(struct bnx2x *bp);
|
|
};
|
|
|
|
struct bnx2x_func_sp_obj {
|
|
enum bnx2x_func_state state, next_state;
|
|
|
|
/* BNX2X_FUNC_CMD_XX bits. This object implements "one
|
|
* pending" paradigm but for debug and tracing purposes it's
|
|
* more convenient to have different bits for different
|
|
* commands.
|
|
*/
|
|
unsigned long pending;
|
|
|
|
/* Buffer to use as a ramrod data and its mapping */
|
|
void *rdata;
|
|
dma_addr_t rdata_mapping;
|
|
|
|
/* Buffer to use as a afex ramrod data and its mapping.
|
|
* This can't be same rdata as above because afex ramrod requests
|
|
* can arrive to the object in parallel to other ramrod requests.
|
|
*/
|
|
void *afex_rdata;
|
|
dma_addr_t afex_rdata_mapping;
|
|
|
|
/* this mutex validates that when pending flag is taken, the next
|
|
* ramrod to be sent will be the one set the pending bit
|
|
*/
|
|
struct mutex one_pending_mutex;
|
|
|
|
/* Driver interface */
|
|
struct bnx2x_func_sp_drv_ops *drv;
|
|
|
|
/**
|
|
* Performs one state change according to the given parameters.
|
|
*
|
|
* @return 0 in case of success and negative value otherwise.
|
|
*/
|
|
int (*send_cmd)(struct bnx2x *bp,
|
|
struct bnx2x_func_state_params *params);
|
|
|
|
/**
|
|
* Checks that the requested state transition is legal.
|
|
*/
|
|
int (*check_transition)(struct bnx2x *bp,
|
|
struct bnx2x_func_sp_obj *o,
|
|
struct bnx2x_func_state_params *params);
|
|
|
|
/**
|
|
* Completes the pending command.
|
|
*/
|
|
int (*complete_cmd)(struct bnx2x *bp,
|
|
struct bnx2x_func_sp_obj *o,
|
|
enum bnx2x_func_cmd cmd);
|
|
|
|
int (*wait_comp)(struct bnx2x *bp, struct bnx2x_func_sp_obj *o,
|
|
enum bnx2x_func_cmd cmd);
|
|
};
|
|
|
|
/********************** Interfaces ********************************************/
|
|
/* Queueable objects set */
|
|
union bnx2x_qable_obj {
|
|
struct bnx2x_vlan_mac_obj vlan_mac;
|
|
};
|
|
/************** Function state update *********/
|
|
void bnx2x_init_func_obj(struct bnx2x *bp,
|
|
struct bnx2x_func_sp_obj *obj,
|
|
void *rdata, dma_addr_t rdata_mapping,
|
|
void *afex_rdata, dma_addr_t afex_rdata_mapping,
|
|
struct bnx2x_func_sp_drv_ops *drv_iface);
|
|
|
|
int bnx2x_func_state_change(struct bnx2x *bp,
|
|
struct bnx2x_func_state_params *params);
|
|
|
|
enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp,
|
|
struct bnx2x_func_sp_obj *o);
|
|
/******************* Queue State **************/
|
|
void bnx2x_init_queue_obj(struct bnx2x *bp,
|
|
struct bnx2x_queue_sp_obj *obj, u8 cl_id, u32 *cids,
|
|
u8 cid_cnt, u8 func_id, void *rdata,
|
|
dma_addr_t rdata_mapping, unsigned long type);
|
|
|
|
int bnx2x_queue_state_change(struct bnx2x *bp,
|
|
struct bnx2x_queue_state_params *params);
|
|
|
|
int bnx2x_get_q_logical_state(struct bnx2x *bp,
|
|
struct bnx2x_queue_sp_obj *obj);
|
|
|
|
/********************* VLAN-MAC ****************/
|
|
void bnx2x_init_mac_obj(struct bnx2x *bp,
|
|
struct bnx2x_vlan_mac_obj *mac_obj,
|
|
u8 cl_id, u32 cid, u8 func_id, void *rdata,
|
|
dma_addr_t rdata_mapping, int state,
|
|
unsigned long *pstate, bnx2x_obj_type type,
|
|
struct bnx2x_credit_pool_obj *macs_pool);
|
|
|
|
void bnx2x_init_vlan_obj(struct bnx2x *bp,
|
|
struct bnx2x_vlan_mac_obj *vlan_obj,
|
|
u8 cl_id, u32 cid, u8 func_id, void *rdata,
|
|
dma_addr_t rdata_mapping, int state,
|
|
unsigned long *pstate, bnx2x_obj_type type,
|
|
struct bnx2x_credit_pool_obj *vlans_pool);
|
|
|
|
void bnx2x_init_vlan_mac_obj(struct bnx2x *bp,
|
|
struct bnx2x_vlan_mac_obj *vlan_mac_obj,
|
|
u8 cl_id, u32 cid, u8 func_id, void *rdata,
|
|
dma_addr_t rdata_mapping, int state,
|
|
unsigned long *pstate, bnx2x_obj_type type,
|
|
struct bnx2x_credit_pool_obj *macs_pool,
|
|
struct bnx2x_credit_pool_obj *vlans_pool);
|
|
|
|
int bnx2x_vlan_mac_h_read_lock(struct bnx2x *bp,
|
|
struct bnx2x_vlan_mac_obj *o);
|
|
void bnx2x_vlan_mac_h_read_unlock(struct bnx2x *bp,
|
|
struct bnx2x_vlan_mac_obj *o);
|
|
int bnx2x_vlan_mac_h_write_lock(struct bnx2x *bp,
|
|
struct bnx2x_vlan_mac_obj *o);
|
|
int bnx2x_config_vlan_mac(struct bnx2x *bp,
|
|
struct bnx2x_vlan_mac_ramrod_params *p);
|
|
|
|
int bnx2x_vlan_mac_move(struct bnx2x *bp,
|
|
struct bnx2x_vlan_mac_ramrod_params *p,
|
|
struct bnx2x_vlan_mac_obj *dest_o);
|
|
|
|
/********************* RX MODE ****************/
|
|
|
|
void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
|
|
struct bnx2x_rx_mode_obj *o);
|
|
|
|
/**
|
|
* bnx2x_config_rx_mode - Send and RX_MODE ramrod according to the provided parameters.
|
|
*
|
|
* @p: Command parameters
|
|
*
|
|
* Return: 0 - if operation was successful and there is no pending completions,
|
|
* positive number - if there are pending completions,
|
|
* negative - if there were errors
|
|
*/
|
|
int bnx2x_config_rx_mode(struct bnx2x *bp,
|
|
struct bnx2x_rx_mode_ramrod_params *p);
|
|
|
|
/****************** MULTICASTS ****************/
|
|
|
|
void bnx2x_init_mcast_obj(struct bnx2x *bp,
|
|
struct bnx2x_mcast_obj *mcast_obj,
|
|
u8 mcast_cl_id, u32 mcast_cid, u8 func_id,
|
|
u8 engine_id, void *rdata, dma_addr_t rdata_mapping,
|
|
int state, unsigned long *pstate,
|
|
bnx2x_obj_type type);
|
|
|
|
/**
|
|
* bnx2x_config_mcast - Configure multicast MACs list.
|
|
*
|
|
* @cmd: command to execute: BNX2X_MCAST_CMD_X
|
|
*
|
|
* May configure a new list
|
|
* provided in p->mcast_list (BNX2X_MCAST_CMD_ADD), clean up
|
|
* (BNX2X_MCAST_CMD_DEL) or restore (BNX2X_MCAST_CMD_RESTORE) a current
|
|
* configuration, continue to execute the pending commands
|
|
* (BNX2X_MCAST_CMD_CONT).
|
|
*
|
|
* If previous command is still pending or if number of MACs to
|
|
* configure is more that maximum number of MACs in one command,
|
|
* the current command will be enqueued to the tail of the
|
|
* pending commands list.
|
|
*
|
|
* Return: 0 is operation was successful and there are no pending completions,
|
|
* negative if there were errors, positive if there are pending
|
|
* completions.
|
|
*/
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int bnx2x_config_mcast(struct bnx2x *bp,
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struct bnx2x_mcast_ramrod_params *p,
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enum bnx2x_mcast_cmd cmd);
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|
|
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/****************** CREDIT POOL ****************/
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void bnx2x_init_mac_credit_pool(struct bnx2x *bp,
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struct bnx2x_credit_pool_obj *p, u8 func_id,
|
|
u8 func_num);
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|
void bnx2x_init_vlan_credit_pool(struct bnx2x *bp,
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struct bnx2x_credit_pool_obj *p, u8 func_id,
|
|
u8 func_num);
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|
void bnx2x_init_credit_pool(struct bnx2x_credit_pool_obj *p,
|
|
int base, int credit);
|
|
|
|
/****************** RSS CONFIGURATION ****************/
|
|
void bnx2x_init_rss_config_obj(struct bnx2x *bp,
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|
struct bnx2x_rss_config_obj *rss_obj,
|
|
u8 cl_id, u32 cid, u8 func_id, u8 engine_id,
|
|
void *rdata, dma_addr_t rdata_mapping,
|
|
int state, unsigned long *pstate,
|
|
bnx2x_obj_type type);
|
|
|
|
/**
|
|
* bnx2x_config_rss - Updates RSS configuration according to provided parameters
|
|
*
|
|
* Return: 0 in case of success
|
|
*/
|
|
int bnx2x_config_rss(struct bnx2x *bp,
|
|
struct bnx2x_config_rss_params *p);
|
|
|
|
/**
|
|
* bnx2x_get_rss_ind_table - Return the current ind_table configuration.
|
|
*
|
|
* @ind_table: buffer to fill with the current indirection
|
|
* table content. Should be at least
|
|
* T_ETH_INDIRECTION_TABLE_SIZE bytes long.
|
|
*/
|
|
void bnx2x_get_rss_ind_table(struct bnx2x_rss_config_obj *rss_obj,
|
|
u8 *ind_table);
|
|
|
|
#define PF_MAC_CREDIT_E2(bp, func_num) \
|
|
((MAX_MAC_CREDIT_E2 - GET_NUM_VFS_PER_PATH(bp) * VF_MAC_CREDIT_CNT) / \
|
|
func_num + GET_NUM_VFS_PER_PF(bp) * VF_MAC_CREDIT_CNT)
|
|
|
|
#define PF_VLAN_CREDIT_E2(bp, func_num) \
|
|
((MAX_MAC_CREDIT_E2 - GET_NUM_VFS_PER_PATH(bp) * VF_VLAN_CREDIT_CNT) / \
|
|
func_num + GET_NUM_VFS_PER_PF(bp) * VF_VLAN_CREDIT_CNT)
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|
|
|
#endif /* BNX2X_SP_VERBS */
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