97 lines
4.2 KiB
C
97 lines
4.2 KiB
C
/*
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* Copyright 2016 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __SOC15_COMMON_H__
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#define __SOC15_COMMON_H__
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struct nbio_hdp_flush_reg {
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u32 hdp_flush_req_offset;
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u32 hdp_flush_done_offset;
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u32 ref_and_mask_cp0;
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u32 ref_and_mask_cp1;
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u32 ref_and_mask_cp2;
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u32 ref_and_mask_cp3;
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u32 ref_and_mask_cp4;
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u32 ref_and_mask_cp5;
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u32 ref_and_mask_cp6;
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u32 ref_and_mask_cp7;
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u32 ref_and_mask_cp8;
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u32 ref_and_mask_cp9;
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u32 ref_and_mask_sdma0;
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u32 ref_and_mask_sdma1;
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};
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struct nbio_pcie_index_data {
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u32 index_offset;
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u32 data_offset;
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};
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/* Register Access Macros */
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#define SOC15_REG_OFFSET(ip, inst, reg) (0 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG0 + reg : \
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(1 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG1 + reg : \
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(2 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG2 + reg : \
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(3 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG3 + reg : \
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(ip##_BASE__INST##inst##_SEG4 + reg)))))
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#define WREG32_FIELD15(ip, idx, reg, field, val) \
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WREG32(SOC15_REG_OFFSET(ip, idx, mm##reg), (RREG32(SOC15_REG_OFFSET(ip, idx, mm##reg)) & ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field))
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#define RREG32_SOC15(ip, inst, reg) \
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RREG32( (0 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG0 + reg : \
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(1 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG1 + reg : \
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(2 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG2 + reg : \
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(3 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG3 + reg : \
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(ip##_BASE__INST##inst##_SEG4 + reg))))))
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#define RREG32_SOC15_OFFSET(ip, inst, reg, offset) \
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RREG32( (0 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG0 + reg : \
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(1 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG1 + reg : \
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(2 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG2 + reg : \
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(3 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG3 + reg : \
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(ip##_BASE__INST##inst##_SEG4 + reg))))) + offset)
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#define WREG32_SOC15(ip, inst, reg, value) \
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WREG32( (0 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG0 + reg : \
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(1 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG1 + reg : \
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(2 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG2 + reg : \
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(3 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG3 + reg : \
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(ip##_BASE__INST##inst##_SEG4 + reg))))), value)
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#define WREG32_SOC15_NO_KIQ(ip, inst, reg, value) \
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WREG32_NO_KIQ( (0 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG0 + reg : \
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(1 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG1 + reg : \
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(2 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG2 + reg : \
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(3 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG3 + reg : \
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(ip##_BASE__INST##inst##_SEG4 + reg))))), value)
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#define WREG32_SOC15_OFFSET(ip, inst, reg, offset, value) \
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WREG32( (0 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG0 + reg : \
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(1 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG1 + reg : \
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(2 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG2 + reg : \
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(3 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG3 + reg : \
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(ip##_BASE__INST##inst##_SEG4 + reg))))) + offset, value)
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#endif
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