549 lines
14 KiB
C
549 lines
14 KiB
C
/*
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* intel_mid_sfi.c: Intel MID SFI initialization code
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*
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* (C) Copyright 2013 Intel Corporation
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* Author: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/scatterlist.h>
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#include <linux/sfi.h>
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#include <linux/spi/spi.h>
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#include <linux/i2c.h>
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#include <linux/skbuff.h>
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#include <linux/gpio.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/export.h>
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#include <linux/notifier.h>
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#include <linux/mmc/core.h>
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#include <linux/mmc/card.h>
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#include <linux/blkdev.h>
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#include <asm/setup.h>
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#include <asm/mpspec_def.h>
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#include <asm/hw_irq.h>
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#include <asm/apic.h>
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#include <asm/io_apic.h>
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#include <asm/intel-mid.h>
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#include <asm/intel_mid_vrtc.h>
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#include <asm/io.h>
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#include <asm/i8259.h>
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#include <asm/intel_scu_ipc.h>
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#include <asm/apb_timer.h>
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#include <asm/reboot.h>
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#define SFI_SIG_OEM0 "OEM0"
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#define MAX_IPCDEVS 24
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#define MAX_SCU_SPI 24
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#define MAX_SCU_I2C 24
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static struct platform_device *ipc_devs[MAX_IPCDEVS];
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static struct spi_board_info *spi_devs[MAX_SCU_SPI];
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static struct i2c_board_info *i2c_devs[MAX_SCU_I2C];
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static struct sfi_gpio_table_entry *gpio_table;
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static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
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static int ipc_next_dev;
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static int spi_next_dev;
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static int i2c_next_dev;
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static int i2c_bus[MAX_SCU_I2C];
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static int gpio_num_entry;
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static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
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int sfi_mrtc_num;
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int sfi_mtimer_num;
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struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
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EXPORT_SYMBOL_GPL(sfi_mrtc_array);
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struct blocking_notifier_head intel_scu_notifier =
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BLOCKING_NOTIFIER_INIT(intel_scu_notifier);
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EXPORT_SYMBOL_GPL(intel_scu_notifier);
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#define intel_mid_sfi_get_pdata(dev, priv) \
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((dev)->get_platform_data ? (dev)->get_platform_data(priv) : NULL)
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/* parse all the mtimer info to a static mtimer array */
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int __init sfi_parse_mtmr(struct sfi_table_header *table)
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{
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struct sfi_table_simple *sb;
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struct sfi_timer_table_entry *pentry;
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struct mpc_intsrc mp_irq;
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int totallen;
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sb = (struct sfi_table_simple *)table;
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if (!sfi_mtimer_num) {
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sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb,
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struct sfi_timer_table_entry);
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pentry = (struct sfi_timer_table_entry *) sb->pentry;
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totallen = sfi_mtimer_num * sizeof(*pentry);
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memcpy(sfi_mtimer_array, pentry, totallen);
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}
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pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num);
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pentry = sfi_mtimer_array;
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for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) {
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pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz, irq = %d\n",
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totallen, (u32)pentry->phys_addr,
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pentry->freq_hz, pentry->irq);
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mp_irq.type = MP_INTSRC;
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mp_irq.irqtype = mp_INT;
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/* triggering mode edge bit 2-3, active high polarity bit 0-1 */
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mp_irq.irqflag = 5;
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mp_irq.srcbus = MP_BUS_ISA;
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mp_irq.srcbusirq = pentry->irq; /* IRQ */
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mp_irq.dstapic = MP_APIC_ALL;
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mp_irq.dstirq = pentry->irq;
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mp_save_irq(&mp_irq);
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mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC, NULL);
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}
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return 0;
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}
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struct sfi_timer_table_entry *sfi_get_mtmr(int hint)
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{
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int i;
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if (hint < sfi_mtimer_num) {
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if (!sfi_mtimer_usage[hint]) {
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pr_debug("hint taken for timer %d irq %d\n",
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hint, sfi_mtimer_array[hint].irq);
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sfi_mtimer_usage[hint] = 1;
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return &sfi_mtimer_array[hint];
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}
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}
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/* take the first timer available */
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for (i = 0; i < sfi_mtimer_num;) {
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if (!sfi_mtimer_usage[i]) {
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sfi_mtimer_usage[i] = 1;
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return &sfi_mtimer_array[i];
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}
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i++;
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}
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return NULL;
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}
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void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr)
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{
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int i;
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for (i = 0; i < sfi_mtimer_num;) {
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if (mtmr->irq == sfi_mtimer_array[i].irq) {
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sfi_mtimer_usage[i] = 0;
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return;
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}
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i++;
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}
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}
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/* parse all the mrtc info to a global mrtc array */
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int __init sfi_parse_mrtc(struct sfi_table_header *table)
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{
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struct sfi_table_simple *sb;
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struct sfi_rtc_table_entry *pentry;
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struct mpc_intsrc mp_irq;
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int totallen;
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sb = (struct sfi_table_simple *)table;
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if (!sfi_mrtc_num) {
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sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb,
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struct sfi_rtc_table_entry);
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pentry = (struct sfi_rtc_table_entry *)sb->pentry;
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totallen = sfi_mrtc_num * sizeof(*pentry);
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memcpy(sfi_mrtc_array, pentry, totallen);
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}
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pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num);
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pentry = sfi_mrtc_array;
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for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) {
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pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n",
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totallen, (u32)pentry->phys_addr, pentry->irq);
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mp_irq.type = MP_INTSRC;
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mp_irq.irqtype = mp_INT;
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mp_irq.irqflag = 0xf; /* level trigger and active low */
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mp_irq.srcbus = MP_BUS_ISA;
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mp_irq.srcbusirq = pentry->irq; /* IRQ */
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mp_irq.dstapic = MP_APIC_ALL;
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mp_irq.dstirq = pentry->irq;
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mp_save_irq(&mp_irq);
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mp_map_gsi_to_irq(pentry->irq, IOAPIC_MAP_ALLOC, NULL);
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}
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return 0;
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}
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/*
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* Parsing GPIO table first, since the DEVS table will need this table
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* to map the pin name to the actual pin.
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*/
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static int __init sfi_parse_gpio(struct sfi_table_header *table)
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{
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struct sfi_table_simple *sb;
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struct sfi_gpio_table_entry *pentry;
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int num, i;
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if (gpio_table)
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return 0;
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sb = (struct sfi_table_simple *)table;
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num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry);
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pentry = (struct sfi_gpio_table_entry *)sb->pentry;
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gpio_table = kmemdup(pentry, num * sizeof(*pentry), GFP_KERNEL);
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if (!gpio_table)
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return -1;
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gpio_num_entry = num;
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pr_debug("GPIO pin info:\n");
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for (i = 0; i < num; i++, pentry++)
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pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s,"
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" pin = %d\n", i,
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pentry->controller_name,
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pentry->pin_name,
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pentry->pin_no);
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return 0;
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}
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int get_gpio_by_name(const char *name)
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{
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struct sfi_gpio_table_entry *pentry = gpio_table;
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int i;
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if (!pentry)
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return -1;
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for (i = 0; i < gpio_num_entry; i++, pentry++) {
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if (!strncmp(name, pentry->pin_name, SFI_NAME_LEN))
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return pentry->pin_no;
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}
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return -EINVAL;
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}
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static void __init intel_scu_ipc_device_register(struct platform_device *pdev)
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{
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if (ipc_next_dev == MAX_IPCDEVS)
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pr_err("too many SCU IPC devices");
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else
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ipc_devs[ipc_next_dev++] = pdev;
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}
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static void __init intel_scu_spi_device_register(struct spi_board_info *sdev)
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{
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struct spi_board_info *new_dev;
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if (spi_next_dev == MAX_SCU_SPI) {
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pr_err("too many SCU SPI devices");
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return;
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}
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new_dev = kzalloc(sizeof(*sdev), GFP_KERNEL);
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if (!new_dev) {
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pr_err("failed to alloc mem for delayed spi dev %s\n",
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sdev->modalias);
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return;
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}
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*new_dev = *sdev;
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spi_devs[spi_next_dev++] = new_dev;
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}
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static void __init intel_scu_i2c_device_register(int bus,
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struct i2c_board_info *idev)
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{
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struct i2c_board_info *new_dev;
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if (i2c_next_dev == MAX_SCU_I2C) {
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pr_err("too many SCU I2C devices");
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return;
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}
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new_dev = kzalloc(sizeof(*idev), GFP_KERNEL);
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if (!new_dev) {
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pr_err("failed to alloc mem for delayed i2c dev %s\n",
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idev->type);
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return;
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}
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*new_dev = *idev;
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i2c_bus[i2c_next_dev] = bus;
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i2c_devs[i2c_next_dev++] = new_dev;
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}
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/* Called by IPC driver */
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void intel_scu_devices_create(void)
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{
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int i;
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for (i = 0; i < ipc_next_dev; i++)
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platform_device_add(ipc_devs[i]);
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for (i = 0; i < spi_next_dev; i++)
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spi_register_board_info(spi_devs[i], 1);
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for (i = 0; i < i2c_next_dev; i++) {
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struct i2c_adapter *adapter;
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struct i2c_client *client;
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adapter = i2c_get_adapter(i2c_bus[i]);
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if (adapter) {
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client = i2c_new_device(adapter, i2c_devs[i]);
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if (!client)
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pr_err("can't create i2c device %s\n",
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i2c_devs[i]->type);
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} else
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i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1);
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}
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intel_scu_notifier_post(SCU_AVAILABLE, NULL);
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}
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EXPORT_SYMBOL_GPL(intel_scu_devices_create);
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/* Called by IPC driver */
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void intel_scu_devices_destroy(void)
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{
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int i;
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intel_scu_notifier_post(SCU_DOWN, NULL);
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for (i = 0; i < ipc_next_dev; i++)
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platform_device_del(ipc_devs[i]);
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}
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EXPORT_SYMBOL_GPL(intel_scu_devices_destroy);
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static void __init install_irq_resource(struct platform_device *pdev, int irq)
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{
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/* Single threaded */
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static struct resource res __initdata = {
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.name = "IRQ",
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.flags = IORESOURCE_IRQ,
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};
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res.start = irq;
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platform_device_add_resources(pdev, &res, 1);
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}
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static void __init sfi_handle_ipc_dev(struct sfi_device_table_entry *pentry,
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struct devs_id *dev)
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{
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struct platform_device *pdev;
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void *pdata = NULL;
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pr_debug("IPC bus, name = %16.16s, irq = 0x%2x\n",
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pentry->name, pentry->irq);
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/*
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* We need to call platform init of IPC devices to fill misc_pdata
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* structure. It will be used in msic_init for initialization.
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*/
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pdata = intel_mid_sfi_get_pdata(dev, pentry);
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if (IS_ERR(pdata))
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return;
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/*
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* On Medfield the platform device creation is handled by the MSIC
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* MFD driver so we don't need to do it here.
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*/
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if (dev->msic && intel_mid_has_msic())
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return;
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pdev = platform_device_alloc(pentry->name, 0);
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if (pdev == NULL) {
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pr_err("out of memory for SFI platform device '%s'.\n",
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pentry->name);
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return;
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}
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install_irq_resource(pdev, pentry->irq);
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pdev->dev.platform_data = pdata;
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if (dev->delay)
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intel_scu_ipc_device_register(pdev);
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else
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platform_device_add(pdev);
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}
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static void __init sfi_handle_spi_dev(struct sfi_device_table_entry *pentry,
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struct devs_id *dev)
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{
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struct spi_board_info spi_info;
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void *pdata = NULL;
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memset(&spi_info, 0, sizeof(spi_info));
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strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN);
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spi_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq);
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spi_info.bus_num = pentry->host_num;
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spi_info.chip_select = pentry->addr;
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spi_info.max_speed_hz = pentry->max_freq;
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pr_debug("SPI bus=%d, name=%16.16s, irq=0x%2x, max_freq=%d, cs=%d\n",
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spi_info.bus_num,
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spi_info.modalias,
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spi_info.irq,
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spi_info.max_speed_hz,
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spi_info.chip_select);
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pdata = intel_mid_sfi_get_pdata(dev, &spi_info);
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if (IS_ERR(pdata))
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return;
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spi_info.platform_data = pdata;
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if (dev->delay)
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intel_scu_spi_device_register(&spi_info);
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else
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spi_register_board_info(&spi_info, 1);
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}
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static void __init sfi_handle_i2c_dev(struct sfi_device_table_entry *pentry,
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struct devs_id *dev)
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{
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struct i2c_board_info i2c_info;
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void *pdata = NULL;
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memset(&i2c_info, 0, sizeof(i2c_info));
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strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN);
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i2c_info.irq = ((pentry->irq == (u8)0xff) ? 0 : pentry->irq);
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i2c_info.addr = pentry->addr;
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pr_debug("I2C bus = %d, name = %16.16s, irq = 0x%2x, addr = 0x%x\n",
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pentry->host_num,
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i2c_info.type,
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i2c_info.irq,
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i2c_info.addr);
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pdata = intel_mid_sfi_get_pdata(dev, &i2c_info);
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i2c_info.platform_data = pdata;
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if (IS_ERR(pdata))
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return;
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if (dev->delay)
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intel_scu_i2c_device_register(pentry->host_num, &i2c_info);
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else
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i2c_register_board_info(pentry->host_num, &i2c_info, 1);
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}
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static void __init sfi_handle_sd_dev(struct sfi_device_table_entry *pentry,
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struct devs_id *dev)
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{
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struct mid_sd_board_info sd_info;
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void *pdata;
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memset(&sd_info, 0, sizeof(sd_info));
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strncpy(sd_info.name, pentry->name, SFI_NAME_LEN);
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sd_info.bus_num = pentry->host_num;
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sd_info.max_clk = pentry->max_freq;
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sd_info.addr = pentry->addr;
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pr_debug("SD bus = %d, name = %16.16s, max_clk = %d, addr = 0x%x\n",
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sd_info.bus_num,
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sd_info.name,
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sd_info.max_clk,
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sd_info.addr);
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pdata = intel_mid_sfi_get_pdata(dev, &sd_info);
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if (IS_ERR(pdata))
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return;
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/* Nothing we can do with this for now */
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sd_info.platform_data = pdata;
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pr_debug("Successfully registered %16.16s", sd_info.name);
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}
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extern struct devs_id *const __x86_intel_mid_dev_start[],
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*const __x86_intel_mid_dev_end[];
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static struct devs_id __init *get_device_id(u8 type, char *name)
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{
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struct devs_id *const *dev_table;
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for (dev_table = __x86_intel_mid_dev_start;
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dev_table < __x86_intel_mid_dev_end; dev_table++) {
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struct devs_id *dev = *dev_table;
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if (dev->type == type &&
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!strncmp(dev->name, name, SFI_NAME_LEN)) {
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return dev;
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}
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}
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return NULL;
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}
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static int __init sfi_parse_devs(struct sfi_table_header *table)
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{
|
|
struct sfi_table_simple *sb;
|
|
struct sfi_device_table_entry *pentry;
|
|
struct devs_id *dev = NULL;
|
|
int num, i, ret;
|
|
int polarity;
|
|
struct irq_alloc_info info;
|
|
|
|
sb = (struct sfi_table_simple *)table;
|
|
num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry);
|
|
pentry = (struct sfi_device_table_entry *)sb->pentry;
|
|
|
|
for (i = 0; i < num; i++, pentry++) {
|
|
int irq = pentry->irq;
|
|
|
|
if (irq != (u8)0xff) { /* native RTE case */
|
|
/* these SPI2 devices are not exposed to system as PCI
|
|
* devices, but they have separate RTE entry in IOAPIC
|
|
* so we have to enable them one by one here
|
|
*/
|
|
if (intel_mid_identify_cpu() ==
|
|
INTEL_MID_CPU_CHIP_TANGIER) {
|
|
if (!strncmp(pentry->name, "r69001-ts-i2c", 13))
|
|
/* active low */
|
|
polarity = 1;
|
|
else if (!strncmp(pentry->name,
|
|
"synaptics_3202", 14))
|
|
/* active low */
|
|
polarity = 1;
|
|
else if (irq == 41)
|
|
/* fast_int_1 */
|
|
polarity = 1;
|
|
else
|
|
/* active high */
|
|
polarity = 0;
|
|
} else {
|
|
/* PNW and CLV go with active low */
|
|
polarity = 1;
|
|
}
|
|
|
|
ioapic_set_alloc_attr(&info, NUMA_NO_NODE, 1, polarity);
|
|
ret = mp_map_gsi_to_irq(irq, IOAPIC_MAP_ALLOC, &info);
|
|
WARN_ON(ret < 0);
|
|
}
|
|
|
|
dev = get_device_id(pentry->type, pentry->name);
|
|
|
|
if (!dev)
|
|
continue;
|
|
|
|
switch (pentry->type) {
|
|
case SFI_DEV_TYPE_IPC:
|
|
sfi_handle_ipc_dev(pentry, dev);
|
|
break;
|
|
case SFI_DEV_TYPE_SPI:
|
|
sfi_handle_spi_dev(pentry, dev);
|
|
break;
|
|
case SFI_DEV_TYPE_I2C:
|
|
sfi_handle_i2c_dev(pentry, dev);
|
|
break;
|
|
case SFI_DEV_TYPE_SD:
|
|
sfi_handle_sd_dev(pentry, dev);
|
|
break;
|
|
case SFI_DEV_TYPE_UART:
|
|
case SFI_DEV_TYPE_HSI:
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int __init intel_mid_platform_init(void)
|
|
{
|
|
sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio);
|
|
sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs);
|
|
return 0;
|
|
}
|
|
arch_initcall(intel_mid_platform_init);
|