163 lines
2.5 KiB
C
163 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_SCORE_ASMMACRO_H
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#define _ASM_SCORE_ASMMACRO_H
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#include <asm/asm-offsets.h>
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#ifdef __ASSEMBLY__
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.macro SAVE_ALL
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mfcr r30, cr0
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mv r31, r0
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nop
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/* if UMs == 1, change stack. */
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slli.c r30, r30, 28
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bpl 1f
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la r31, kernelsp
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lw r31, [r31]
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1:
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mv r30, r0
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addri r0, r31, -PT_SIZE
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sw r30, [r0, PT_R0]
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.set r1
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sw r1, [r0, PT_R1]
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.set nor1
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sw r2, [r0, PT_R2]
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sw r3, [r0, PT_R3]
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sw r4, [r0, PT_R4]
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sw r5, [r0, PT_R5]
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sw r6, [r0, PT_R6]
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sw r7, [r0, PT_R7]
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sw r8, [r0, PT_R8]
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sw r9, [r0, PT_R9]
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sw r10, [r0, PT_R10]
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sw r11, [r0, PT_R11]
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sw r12, [r0, PT_R12]
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sw r13, [r0, PT_R13]
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sw r14, [r0, PT_R14]
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sw r15, [r0, PT_R15]
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sw r16, [r0, PT_R16]
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sw r17, [r0, PT_R17]
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sw r18, [r0, PT_R18]
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sw r19, [r0, PT_R19]
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sw r20, [r0, PT_R20]
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sw r21, [r0, PT_R21]
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sw r22, [r0, PT_R22]
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sw r23, [r0, PT_R23]
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sw r24, [r0, PT_R24]
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sw r25, [r0, PT_R25]
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sw r25, [r0, PT_R25]
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sw r26, [r0, PT_R26]
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sw r27, [r0, PT_R27]
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sw r28, [r0, PT_R28]
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sw r29, [r0, PT_R29]
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orri r28, r0, 0x1fff
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li r31, 0x00001fff
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xor r28, r28, r31
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mfcehl r30, r31
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sw r30, [r0, PT_CEH]
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sw r31, [r0, PT_CEL]
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mfcr r31, cr0
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sw r31, [r0, PT_PSR]
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mfcr r31, cr1
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sw r31, [r0, PT_CONDITION]
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mfcr r31, cr2
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sw r31, [r0, PT_ECR]
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mfcr r31, cr5
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srli r31, r31, 1
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slli r31, r31, 1
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sw r31, [r0, PT_EPC]
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.endm
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.macro RESTORE_ALL_AND_RET
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mfcr r30, cr0
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srli r30, r30, 1
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slli r30, r30, 1
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mtcr r30, cr0
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nop
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nop
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nop
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nop
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nop
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.set r1
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ldis r1, 0x00ff
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and r30, r30, r1
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not r1, r1
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lw r31, [r0, PT_PSR]
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and r31, r31, r1
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.set nor1
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or r31, r31, r30
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mtcr r31, cr0
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nop
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nop
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nop
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nop
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nop
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lw r30, [r0, PT_CONDITION]
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mtcr r30, cr1
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nop
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nop
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nop
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nop
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nop
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lw r30, [r0, PT_CEH]
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lw r31, [r0, PT_CEL]
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mtcehl r30, r31
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.set r1
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lw r1, [r0, PT_R1]
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.set nor1
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lw r2, [r0, PT_R2]
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lw r3, [r0, PT_R3]
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lw r4, [r0, PT_R4]
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lw r5, [r0, PT_R5]
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lw r6, [r0, PT_R6]
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lw r7, [r0, PT_R7]
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lw r8, [r0, PT_R8]
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lw r9, [r0, PT_R9]
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lw r10, [r0, PT_R10]
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lw r11, [r0, PT_R11]
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lw r12, [r0, PT_R12]
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lw r13, [r0, PT_R13]
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lw r14, [r0, PT_R14]
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lw r15, [r0, PT_R15]
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lw r16, [r0, PT_R16]
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lw r17, [r0, PT_R17]
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lw r18, [r0, PT_R18]
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lw r19, [r0, PT_R19]
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lw r20, [r0, PT_R20]
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lw r21, [r0, PT_R21]
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lw r22, [r0, PT_R22]
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lw r23, [r0, PT_R23]
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lw r24, [r0, PT_R24]
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lw r25, [r0, PT_R25]
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lw r26, [r0, PT_R26]
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lw r27, [r0, PT_R27]
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lw r28, [r0, PT_R28]
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lw r29, [r0, PT_R29]
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lw r30, [r0, PT_EPC]
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lw r0, [r0, PT_R0]
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mtcr r30, cr5
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rte
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.endm
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_SCORE_ASMMACRO_H */
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