151 lines
3.8 KiB
C
151 lines
3.8 KiB
C
/*arch/powerpc/platforms/8xx/mpc86xads_setup.c
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*
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* Platform setup for the Freescale mpc86xads board
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*
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* Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* Copyright 2005 MontaVista Software Inc.
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*
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* Heavily modified by Scott Wood <scottwood@freescale.com>
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* Copyright 2007 Freescale Semiconductor, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/init.h>
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#include <linux/of_address.h>
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#include <linux/of_fdt.h>
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#include <linux/of_platform.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/time.h>
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#include <asm/8xx_immap.h>
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#include <asm/cpm1.h>
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#include <asm/fs_pd.h>
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#include <asm/udbg.h>
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#include "mpc86xads.h"
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#include "mpc8xx.h"
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struct cpm_pin {
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int port, pin, flags;
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};
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static struct cpm_pin mpc866ads_pins[] = {
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/* SMC1 */
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{CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
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{CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
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/* SMC2 */
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{CPM_PORTB, 21, CPM_PIN_INPUT}, /* RX */
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{CPM_PORTB, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
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/* SCC1 */
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{CPM_PORTA, 6, CPM_PIN_INPUT}, /* CLK1 */
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{CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */
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{CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */
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{CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */
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{CPM_PORTB, 19, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */
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{CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */
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{CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */
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/* MII */
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{CPM_PORTD, 3, CPM_PIN_OUTPUT},
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{CPM_PORTD, 4, CPM_PIN_OUTPUT},
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{CPM_PORTD, 5, CPM_PIN_OUTPUT},
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{CPM_PORTD, 6, CPM_PIN_OUTPUT},
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{CPM_PORTD, 7, CPM_PIN_OUTPUT},
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{CPM_PORTD, 8, CPM_PIN_OUTPUT},
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{CPM_PORTD, 9, CPM_PIN_OUTPUT},
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{CPM_PORTD, 10, CPM_PIN_OUTPUT},
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{CPM_PORTD, 11, CPM_PIN_OUTPUT},
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{CPM_PORTD, 12, CPM_PIN_OUTPUT},
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{CPM_PORTD, 13, CPM_PIN_OUTPUT},
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{CPM_PORTD, 14, CPM_PIN_OUTPUT},
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{CPM_PORTD, 15, CPM_PIN_OUTPUT},
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/* I2C */
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{CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
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{CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
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};
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static void __init init_ioports(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(mpc866ads_pins); i++) {
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struct cpm_pin *pin = &mpc866ads_pins[i];
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cpm1_set_pin(pin->port, pin->pin, pin->flags);
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}
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cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
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cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX);
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cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK1, CPM_CLK_TX);
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cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
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/* Set FEC1 and FEC2 to MII mode */
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clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180);
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}
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static void __init mpc86xads_setup_arch(void)
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{
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struct device_node *np;
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u32 __iomem *bcsr_io;
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cpm_reset();
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init_ioports();
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np = of_find_compatible_node(NULL, NULL, "fsl,mpc866ads-bcsr");
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if (!np) {
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printk(KERN_CRIT "Could not find fsl,mpc866ads-bcsr node\n");
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return;
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}
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bcsr_io = of_iomap(np, 0);
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of_node_put(np);
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if (bcsr_io == NULL) {
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printk(KERN_CRIT "Could not remap BCSR\n");
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return;
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}
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clrbits32(bcsr_io, BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN);
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iounmap(bcsr_io);
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}
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static int __init mpc86xads_probe(void)
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{
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return of_machine_is_compatible("fsl,mpc866ads");
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}
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static const struct of_device_id of_bus_ids[] __initconst = {
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{ .name = "soc", },
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{ .name = "cpm", },
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{ .name = "localbus", },
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{},
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};
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static int __init declare_of_platform_devices(void)
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{
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of_platform_bus_probe(NULL, of_bus_ids, NULL);
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return 0;
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}
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machine_device_initcall(mpc86x_ads, declare_of_platform_devices);
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define_machine(mpc86x_ads) {
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.name = "MPC86x ADS",
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.probe = mpc86xads_probe,
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.setup_arch = mpc86xads_setup_arch,
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.init_IRQ = mpc8xx_pics_init,
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.get_irq = mpc8xx_get_irq,
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.restart = mpc8xx_restart,
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.calibrate_decr = mpc8xx_calibrate_decr,
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.set_rtc_time = mpc8xx_set_rtc_time,
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.get_rtc_time = mpc8xx_get_rtc_time,
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.progress = udbg_progress,
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};
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