230 lines
6.3 KiB
ArmAsm
230 lines
6.3 KiB
ArmAsm
/* bpf_jit.S: Packet/header access helper functions
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* for PPC64 BPF compiler.
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*
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* Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#include <asm/ppc_asm.h>
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#include "bpf_jit32.h"
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/*
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* All of these routines are called directly from generated code,
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* whose register usage is:
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*
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* r3 skb
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* r4,r5 A,X
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* r6 *** address parameter to helper ***
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* r7-r10 scratch
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* r14 skb->data
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* r15 skb headlen
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* r16-31 M[]
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*/
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/*
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* To consider: These helpers are so small it could be better to just
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* generate them inline. Inline code can do the simple headlen check
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* then branch directly to slow_path_XXX if required. (In fact, could
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* load a spare GPR with the address of slow_path_generic and pass size
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* as an argument, making the call site a mtlr, li and bllr.)
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*/
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.globl sk_load_word
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sk_load_word:
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PPC_LCMPI r_addr, 0
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blt bpf_slow_path_word_neg
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.globl sk_load_word_positive_offset
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sk_load_word_positive_offset:
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/* Are we accessing past headlen? */
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subi r_scratch1, r_HL, 4
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PPC_LCMP r_scratch1, r_addr
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blt bpf_slow_path_word
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/* Nope, just hitting the header. cr0 here is eq or gt! */
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#ifdef __LITTLE_ENDIAN__
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lwbrx r_A, r_D, r_addr
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#else
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lwzx r_A, r_D, r_addr
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#endif
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blr /* Return success, cr0 != LT */
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.globl sk_load_half
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sk_load_half:
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PPC_LCMPI r_addr, 0
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blt bpf_slow_path_half_neg
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.globl sk_load_half_positive_offset
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sk_load_half_positive_offset:
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subi r_scratch1, r_HL, 2
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PPC_LCMP r_scratch1, r_addr
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blt bpf_slow_path_half
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#ifdef __LITTLE_ENDIAN__
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lhbrx r_A, r_D, r_addr
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#else
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lhzx r_A, r_D, r_addr
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#endif
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blr
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.globl sk_load_byte
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sk_load_byte:
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PPC_LCMPI r_addr, 0
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blt bpf_slow_path_byte_neg
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.globl sk_load_byte_positive_offset
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sk_load_byte_positive_offset:
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PPC_LCMP r_HL, r_addr
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ble bpf_slow_path_byte
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lbzx r_A, r_D, r_addr
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blr
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/*
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* BPF_LDX | BPF_B | BPF_MSH: ldxb 4*([offset]&0xf)
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* r_addr is the offset value
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*/
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.globl sk_load_byte_msh
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sk_load_byte_msh:
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PPC_LCMPI r_addr, 0
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blt bpf_slow_path_byte_msh_neg
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.globl sk_load_byte_msh_positive_offset
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sk_load_byte_msh_positive_offset:
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PPC_LCMP r_HL, r_addr
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ble bpf_slow_path_byte_msh
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lbzx r_X, r_D, r_addr
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rlwinm r_X, r_X, 2, 32-4-2, 31-2
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blr
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/* Call out to skb_copy_bits:
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* We'll need to back up our volatile regs first; we have
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* local variable space at r1+(BPF_PPC_STACK_BASIC).
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* Allocate a new stack frame here to remain ABI-compliant in
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* stashing LR.
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*/
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#define bpf_slow_path_common(SIZE) \
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mflr r0; \
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PPC_STL r0, PPC_LR_STKOFF(r1); \
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/* R3 goes in parameter space of caller's frame */ \
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PPC_STL r_skb, (BPF_PPC_STACKFRAME+BPF_PPC_STACK_R3_OFF)(r1); \
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PPC_STL r_A, (BPF_PPC_STACK_BASIC+(0*REG_SZ))(r1); \
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PPC_STL r_X, (BPF_PPC_STACK_BASIC+(1*REG_SZ))(r1); \
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addi r5, r1, BPF_PPC_STACK_BASIC+(2*REG_SZ); \
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PPC_STLU r1, -BPF_PPC_SLOWPATH_FRAME(r1); \
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/* R3 = r_skb, as passed */ \
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mr r4, r_addr; \
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li r6, SIZE; \
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bl skb_copy_bits; \
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nop; \
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/* R3 = 0 on success */ \
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addi r1, r1, BPF_PPC_SLOWPATH_FRAME; \
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PPC_LL r0, PPC_LR_STKOFF(r1); \
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PPC_LL r_A, (BPF_PPC_STACK_BASIC+(0*REG_SZ))(r1); \
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PPC_LL r_X, (BPF_PPC_STACK_BASIC+(1*REG_SZ))(r1); \
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mtlr r0; \
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PPC_LCMPI r3, 0; \
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blt bpf_error; /* cr0 = LT */ \
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PPC_LL r_skb, (BPF_PPC_STACKFRAME+BPF_PPC_STACK_R3_OFF)(r1); \
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/* Great success! */
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bpf_slow_path_word:
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bpf_slow_path_common(4)
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/* Data value is on stack, and cr0 != LT */
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lwz r_A, BPF_PPC_STACK_BASIC+(2*REG_SZ)(r1)
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blr
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bpf_slow_path_half:
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bpf_slow_path_common(2)
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lhz r_A, BPF_PPC_STACK_BASIC+(2*8)(r1)
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blr
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bpf_slow_path_byte:
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bpf_slow_path_common(1)
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lbz r_A, BPF_PPC_STACK_BASIC+(2*8)(r1)
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blr
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bpf_slow_path_byte_msh:
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bpf_slow_path_common(1)
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lbz r_X, BPF_PPC_STACK_BASIC+(2*8)(r1)
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rlwinm r_X, r_X, 2, 32-4-2, 31-2
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blr
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/* Call out to bpf_internal_load_pointer_neg_helper:
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* We'll need to back up our volatile regs first; we have
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* local variable space at r1+(BPF_PPC_STACK_BASIC).
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* Allocate a new stack frame here to remain ABI-compliant in
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* stashing LR.
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*/
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#define sk_negative_common(SIZE) \
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mflr r0; \
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PPC_STL r0, PPC_LR_STKOFF(r1); \
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/* R3 goes in parameter space of caller's frame */ \
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PPC_STL r_skb, (BPF_PPC_STACKFRAME+BPF_PPC_STACK_R3_OFF)(r1); \
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PPC_STL r_A, (BPF_PPC_STACK_BASIC+(0*REG_SZ))(r1); \
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PPC_STL r_X, (BPF_PPC_STACK_BASIC+(1*REG_SZ))(r1); \
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PPC_STLU r1, -BPF_PPC_SLOWPATH_FRAME(r1); \
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/* R3 = r_skb, as passed */ \
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mr r4, r_addr; \
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li r5, SIZE; \
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bl bpf_internal_load_pointer_neg_helper; \
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nop; \
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/* R3 != 0 on success */ \
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addi r1, r1, BPF_PPC_SLOWPATH_FRAME; \
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PPC_LL r0, PPC_LR_STKOFF(r1); \
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PPC_LL r_A, (BPF_PPC_STACK_BASIC+(0*REG_SZ))(r1); \
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PPC_LL r_X, (BPF_PPC_STACK_BASIC+(1*REG_SZ))(r1); \
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mtlr r0; \
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PPC_LCMPLI r3, 0; \
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beq bpf_error_slow; /* cr0 = EQ */ \
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mr r_addr, r3; \
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PPC_LL r_skb, (BPF_PPC_STACKFRAME+BPF_PPC_STACK_R3_OFF)(r1); \
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/* Great success! */
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bpf_slow_path_word_neg:
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lis r_scratch1,-32 /* SKF_LL_OFF */
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PPC_LCMP r_addr, r_scratch1 /* addr < SKF_* */
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blt bpf_error /* cr0 = LT */
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.globl sk_load_word_negative_offset
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sk_load_word_negative_offset:
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sk_negative_common(4)
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lwz r_A, 0(r_addr)
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blr
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bpf_slow_path_half_neg:
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lis r_scratch1,-32 /* SKF_LL_OFF */
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PPC_LCMP r_addr, r_scratch1 /* addr < SKF_* */
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blt bpf_error /* cr0 = LT */
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.globl sk_load_half_negative_offset
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sk_load_half_negative_offset:
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sk_negative_common(2)
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lhz r_A, 0(r_addr)
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blr
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bpf_slow_path_byte_neg:
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lis r_scratch1,-32 /* SKF_LL_OFF */
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PPC_LCMP r_addr, r_scratch1 /* addr < SKF_* */
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blt bpf_error /* cr0 = LT */
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.globl sk_load_byte_negative_offset
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sk_load_byte_negative_offset:
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sk_negative_common(1)
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lbz r_A, 0(r_addr)
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blr
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bpf_slow_path_byte_msh_neg:
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lis r_scratch1,-32 /* SKF_LL_OFF */
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PPC_LCMP r_addr, r_scratch1 /* addr < SKF_* */
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blt bpf_error /* cr0 = LT */
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.globl sk_load_byte_msh_negative_offset
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sk_load_byte_msh_negative_offset:
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sk_negative_common(1)
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lbz r_X, 0(r_addr)
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rlwinm r_X, r_X, 2, 32-4-2, 31-2
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blr
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bpf_error_slow:
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/* fabricate a cr0 = lt */
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li r_scratch1, -1
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PPC_LCMPI r_scratch1, 0
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bpf_error:
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/* Entered with cr0 = lt */
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li r3, 0
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/* Generated code will 'blt epilogue', returning 0. */
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blr
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