721 lines
17 KiB
Plaintext
721 lines
17 KiB
Plaintext
/*
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* T1040 Silicon/SoC Device Tree Source (post include)
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*
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* Copyright 2013 - 2014 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <dt-bindings/thermal/thermal.h>
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&bman_fbpr {
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compatible = "fsl,bman-fbpr";
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alloc-ranges = <0 0 0x10000 0>;
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};
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&qman_fqd {
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compatible = "fsl,qman-fqd";
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alloc-ranges = <0 0 0x10000 0>;
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};
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&qman_pfdr {
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compatible = "fsl,qman-pfdr";
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alloc-ranges = <0 0 0x10000 0>;
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};
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&ifc {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "fsl,ifc", "simple-bus";
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interrupts = <25 2 0 0>;
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};
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&pci0 {
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compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0x0 0xff>;
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interrupts = <20 2 0 0>;
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fsl,iommu-parent = <&pamu0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <20 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 40 1 0 0
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0000 0 0 2 &mpic 1 1 0 0
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0000 0 0 3 &mpic 2 1 0 0
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0000 0 0 4 &mpic 3 1 0 0
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>;
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};
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};
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&pci1 {
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compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0 0xff>;
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interrupts = <21 2 0 0>;
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fsl,iommu-parent = <&pamu0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <21 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 41 1 0 0
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0000 0 0 2 &mpic 5 1 0 0
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0000 0 0 3 &mpic 6 1 0 0
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0000 0 0 4 &mpic 7 1 0 0
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>;
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};
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};
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&pci2 {
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compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0x0 0xff>;
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interrupts = <22 2 0 0>;
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fsl,iommu-parent = <&pamu0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <22 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 42 1 0 0
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0000 0 0 2 &mpic 9 1 0 0
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0000 0 0 3 &mpic 10 1 0 0
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0000 0 0 4 &mpic 11 1 0 0
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>;
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};
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};
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&pci3 {
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compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
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device_type = "pci";
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#size-cells = <2>;
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#address-cells = <3>;
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bus-range = <0x0 0xff>;
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interrupts = <23 2 0 0>;
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fsl,iommu-parent = <&pamu0>;
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pcie@0 {
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reg = <0 0 0 0 0>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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device_type = "pci";
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interrupts = <23 2 0 0>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x0 */
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0000 0 0 1 &mpic 43 1 0 0
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0000 0 0 2 &mpic 0 1 0 0
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0000 0 0 3 &mpic 4 1 0 0
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0000 0 0 4 &mpic 8 1 0 0
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>;
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};
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};
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&dcsr {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,dcsr", "simple-bus";
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dcsr-epu@0 {
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compatible = "fsl,t1040-dcsr-epu", "fsl,dcsr-epu";
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interrupts = <52 2 0 0
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84 2 0 0
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85 2 0 0>;
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reg = <0x0 0x1000>;
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};
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dcsr-npc {
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compatible = "fsl,t1040-dcsr-cnpc", "fsl,dcsr-cnpc";
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reg = <0x1000 0x1000 0x1002000 0x10000>;
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};
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dcsr-nxc@2000 {
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compatible = "fsl,dcsr-nxc";
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reg = <0x2000 0x1000>;
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};
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dcsr-corenet {
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compatible = "fsl,dcsr-corenet";
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reg = <0x8000 0x1000 0x1A000 0x1000>;
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};
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dcsr-dpaa@9000 {
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compatible = "fsl,t1040-dcsr-dpaa", "fsl,dcsr-dpaa";
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reg = <0x9000 0x1000>;
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};
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dcsr-ocn@11000 {
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compatible = "fsl,t1040-dcsr-ocn", "fsl,dcsr-ocn";
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reg = <0x11000 0x1000>;
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};
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dcsr-ddr@12000 {
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compatible = "fsl,dcsr-ddr";
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dev-handle = <&ddr1>;
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reg = <0x12000 0x1000>;
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};
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dcsr-nal@18000 {
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compatible = "fsl,t1040-dcsr-nal", "fsl,dcsr-nal";
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reg = <0x18000 0x1000>;
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};
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dcsr-rcpm@22000 {
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compatible = "fsl,t1040-dcsr-rcpm", "fsl,dcsr-rcpm";
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reg = <0x22000 0x1000>;
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};
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dcsr-snpc@30000 {
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compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
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reg = <0x30000 0x1000 0x1022000 0x10000>;
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};
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dcsr-snpc@31000 {
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compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
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reg = <0x31000 0x1000 0x1042000 0x10000>;
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};
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dcsr-cpu-sb-proxy@100000 {
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compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu0>;
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reg = <0x100000 0x1000 0x101000 0x1000>;
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};
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dcsr-cpu-sb-proxy@108000 {
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compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu1>;
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reg = <0x108000 0x1000 0x109000 0x1000>;
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};
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dcsr-cpu-sb-proxy@110000 {
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compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu2>;
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reg = <0x110000 0x1000 0x111000 0x1000>;
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};
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dcsr-cpu-sb-proxy@118000 {
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compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
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cpu-handle = <&cpu3>;
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reg = <0x118000 0x1000 0x119000 0x1000>;
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};
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};
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&bportals {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "simple-bus";
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bman-portal@0 {
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compatible = "fsl,bman-portal";
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reg = <0x0 0x4000>, <0x1000000 0x1000>;
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interrupts = <105 2 0 0>;
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};
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bman-portal@4000 {
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compatible = "fsl,bman-portal";
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reg = <0x4000 0x4000>, <0x1001000 0x1000>;
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interrupts = <107 2 0 0>;
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};
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bman-portal@8000 {
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compatible = "fsl,bman-portal";
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reg = <0x8000 0x4000>, <0x1002000 0x1000>;
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interrupts = <109 2 0 0>;
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};
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bman-portal@c000 {
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compatible = "fsl,bman-portal";
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reg = <0xc000 0x4000>, <0x1003000 0x1000>;
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interrupts = <111 2 0 0>;
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};
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bman-portal@10000 {
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compatible = "fsl,bman-portal";
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reg = <0x10000 0x4000>, <0x1004000 0x1000>;
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interrupts = <113 2 0 0>;
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};
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bman-portal@14000 {
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compatible = "fsl,bman-portal";
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reg = <0x14000 0x4000>, <0x1005000 0x1000>;
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interrupts = <115 2 0 0>;
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};
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bman-portal@18000 {
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compatible = "fsl,bman-portal";
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reg = <0x18000 0x4000>, <0x1006000 0x1000>;
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interrupts = <117 2 0 0>;
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};
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bman-portal@1c000 {
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compatible = "fsl,bman-portal";
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reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
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interrupts = <119 2 0 0>;
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};
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bman-portal@20000 {
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compatible = "fsl,bman-portal";
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reg = <0x20000 0x4000>, <0x1008000 0x1000>;
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interrupts = <121 2 0 0>;
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};
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bman-portal@24000 {
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compatible = "fsl,bman-portal";
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reg = <0x24000 0x4000>, <0x1009000 0x1000>;
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interrupts = <123 2 0 0>;
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};
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};
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&qportals {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "simple-bus";
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qportal0: qman-portal@0 {
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compatible = "fsl,qman-portal";
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reg = <0x0 0x4000>, <0x1000000 0x1000>;
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interrupts = <104 0x2 0 0>;
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cell-index = <0x0>;
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};
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qportal1: qman-portal@4000 {
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compatible = "fsl,qman-portal";
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reg = <0x4000 0x4000>, <0x1001000 0x1000>;
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interrupts = <106 0x2 0 0>;
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cell-index = <0x1>;
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};
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qportal2: qman-portal@8000 {
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compatible = "fsl,qman-portal";
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reg = <0x8000 0x4000>, <0x1002000 0x1000>;
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interrupts = <108 0x2 0 0>;
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cell-index = <0x2>;
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};
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qportal3: qman-portal@c000 {
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compatible = "fsl,qman-portal";
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reg = <0xc000 0x4000>, <0x1003000 0x1000>;
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interrupts = <110 0x2 0 0>;
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cell-index = <0x3>;
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};
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qportal4: qman-portal@10000 {
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compatible = "fsl,qman-portal";
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reg = <0x10000 0x4000>, <0x1004000 0x1000>;
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interrupts = <112 0x2 0 0>;
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cell-index = <0x4>;
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};
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qportal5: qman-portal@14000 {
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compatible = "fsl,qman-portal";
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reg = <0x14000 0x4000>, <0x1005000 0x1000>;
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interrupts = <114 0x2 0 0>;
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cell-index = <0x5>;
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};
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qportal6: qman-portal@18000 {
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compatible = "fsl,qman-portal";
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reg = <0x18000 0x4000>, <0x1006000 0x1000>;
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interrupts = <116 0x2 0 0>;
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cell-index = <0x6>;
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};
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qportal7: qman-portal@1c000 {
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compatible = "fsl,qman-portal";
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reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
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interrupts = <118 0x2 0 0>;
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cell-index = <0x7>;
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};
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qportal8: qman-portal@20000 {
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compatible = "fsl,qman-portal";
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reg = <0x20000 0x4000>, <0x1008000 0x1000>;
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interrupts = <120 0x2 0 0>;
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cell-index = <0x8>;
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};
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qportal9: qman-portal@24000 {
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compatible = "fsl,qman-portal";
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reg = <0x24000 0x4000>, <0x1009000 0x1000>;
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interrupts = <122 0x2 0 0>;
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cell-index = <0x9>;
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};
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "simple-bus";
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soc-sram-error {
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compatible = "fsl,soc-sram-error";
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interrupts = <16 2 1 29>;
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};
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corenet-law@0 {
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compatible = "fsl,corenet-law";
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reg = <0x0 0x1000>;
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fsl,num-laws = <16>;
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};
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ddr1: memory-controller@8000 {
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compatible = "fsl,qoriq-memory-controller-v5.0",
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"fsl,qoriq-memory-controller";
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reg = <0x8000 0x1000>;
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interrupts = <16 2 1 23>;
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};
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cpc: l3-cache-controller@10000 {
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compatible = "fsl,t1040-l3-cache-controller", "cache";
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reg = <0x10000 0x1000>;
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interrupts = <16 2 1 27>;
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};
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corenet-cf@18000 {
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compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
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reg = <0x18000 0x1000>;
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interrupts = <16 2 1 31>;
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fsl,ccf-num-csdids = <32>;
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fsl,ccf-num-snoopids = <32>;
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};
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iommu@20000 {
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compatible = "fsl,pamu-v1.0", "fsl,pamu";
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reg = <0x20000 0x1000>;
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ranges = <0 0x20000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupts = <
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24 2 0 0
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16 2 1 30>;
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pamu0: pamu@0 {
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reg = <0 0x1000>;
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fsl,primary-cache-geometry = <128 1>;
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fsl,secondary-cache-geometry = <16 2>;
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};
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};
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/include/ "qoriq-mpic.dtsi"
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guts: global-utilities@e0000 {
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compatible = "fsl,t1040-device-config", "fsl,qoriq-device-config-2.0";
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reg = <0xe0000 0xe00>;
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fsl,has-rstcr;
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fsl,liodn-bits = <12>;
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};
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/include/ "qoriq-clockgen2.dtsi"
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global-utilities@e1000 {
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compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
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mux0: mux0@0 {
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#clock-cells = <0>;
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reg = <0x0 4>;
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compatible = "fsl,qoriq-core-mux-2.0";
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clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
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<&pll1 0>, <&pll1 1>, <&pll1 2>;
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clock-names = "pll0", "pll0-div2", "pll1-div4",
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"pll1", "pll1-div2", "pll1-div4";
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clock-output-names = "cmux0";
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};
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mux1: mux1@20 {
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#clock-cells = <0>;
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reg = <0x20 4>;
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compatible = "fsl,qoriq-core-mux-2.0";
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clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
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<&pll1 0>, <&pll1 1>, <&pll1 2>;
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clock-names = "pll0", "pll0-div2", "pll1-div4",
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"pll1", "pll1-div2", "pll1-div4";
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clock-output-names = "cmux1";
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};
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mux2: mux2@40 {
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#clock-cells = <0>;
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reg = <0x40 4>;
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compatible = "fsl,qoriq-core-mux-2.0";
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clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
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<&pll1 0>, <&pll1 1>, <&pll1 2>;
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clock-names = "pll0", "pll0-div2", "pll1-div4",
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"pll1", "pll1-div2", "pll1-div4";
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clock-output-names = "cmux2";
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};
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|
|
mux3: mux3@60 {
|
|
#clock-cells = <0>;
|
|
reg = <0x60 4>;
|
|
compatible = "fsl,qoriq-core-mux-2.0";
|
|
clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
|
|
<&pll1 0>, <&pll1 1>, <&pll1 2>;
|
|
clock-names = "pll0_0", "pll0_1", "pll0_2",
|
|
"pll1_0", "pll1_1", "pll1_2";
|
|
clock-output-names = "cmux3";
|
|
};
|
|
};
|
|
|
|
rcpm: global-utilities@e2000 {
|
|
compatible = "fsl,t1040-rcpm", "fsl,qoriq-rcpm-2.1";
|
|
reg = <0xe2000 0x1000>;
|
|
};
|
|
|
|
sfp: sfp@e8000 {
|
|
compatible = "fsl,t1040-sfp";
|
|
reg = <0xe8000 0x1000>;
|
|
};
|
|
|
|
serdes: serdes@ea000 {
|
|
compatible = "fsl,t1040-serdes";
|
|
reg = <0xea000 0x4000>;
|
|
};
|
|
|
|
tmu: tmu@f0000 {
|
|
compatible = "fsl,qoriq-tmu";
|
|
reg = <0xf0000 0x1000>;
|
|
interrupts = <18 2 0 0>;
|
|
fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>;
|
|
fsl,tmu-calibration = <0x00000000 0x00000025
|
|
0x00000001 0x00000028
|
|
0x00000002 0x0000002d
|
|
0x00000003 0x00000031
|
|
0x00000004 0x00000036
|
|
0x00000005 0x0000003a
|
|
0x00000006 0x00000040
|
|
0x00000007 0x00000044
|
|
0x00000008 0x0000004a
|
|
0x00000009 0x0000004f
|
|
0x0000000a 0x00000054
|
|
|
|
0x00010000 0x0000000d
|
|
0x00010001 0x00000013
|
|
0x00010002 0x00000019
|
|
0x00010003 0x0000001f
|
|
0x00010004 0x00000025
|
|
0x00010005 0x0000002d
|
|
0x00010006 0x00000033
|
|
0x00010007 0x00000043
|
|
0x00010008 0x0000004b
|
|
0x00010009 0x00000053
|
|
|
|
0x00020000 0x00000010
|
|
0x00020001 0x00000017
|
|
0x00020002 0x0000001f
|
|
0x00020003 0x00000029
|
|
0x00020004 0x00000031
|
|
0x00020005 0x0000003c
|
|
0x00020006 0x00000042
|
|
0x00020007 0x0000004d
|
|
0x00020008 0x00000056
|
|
|
|
0x00030000 0x00000012
|
|
0x00030001 0x0000001d>;
|
|
#thermal-sensor-cells = <1>;
|
|
};
|
|
|
|
thermal-zones {
|
|
cpu_thermal: cpu-thermal {
|
|
polling-delay-passive = <1000>;
|
|
polling-delay = <5000>;
|
|
|
|
thermal-sensors = <&tmu 2>;
|
|
|
|
trips {
|
|
cpu_alert: cpu-alert {
|
|
temperature = <85000>;
|
|
hysteresis = <2000>;
|
|
type = "passive";
|
|
};
|
|
cpu_crit: cpu-crit {
|
|
temperature = <95000>;
|
|
hysteresis = <2000>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
|
|
cooling-maps {
|
|
map0 {
|
|
trip = <&cpu_alert>;
|
|
cooling-device =
|
|
<&cpu0 THERMAL_NO_LIMIT
|
|
THERMAL_NO_LIMIT>;
|
|
};
|
|
map1 {
|
|
trip = <&cpu_alert>;
|
|
cooling-device =
|
|
<&cpu1 THERMAL_NO_LIMIT
|
|
THERMAL_NO_LIMIT>;
|
|
};
|
|
map2 {
|
|
trip = <&cpu_alert>;
|
|
cooling-device =
|
|
<&cpu2 THERMAL_NO_LIMIT
|
|
THERMAL_NO_LIMIT>;
|
|
};
|
|
map3 {
|
|
trip = <&cpu_alert>;
|
|
cooling-device =
|
|
<&cpu3 THERMAL_NO_LIMIT
|
|
THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
scfg: global-utilities@fc000 {
|
|
compatible = "fsl,t1040-scfg";
|
|
reg = <0xfc000 0x1000>;
|
|
};
|
|
|
|
/include/ "elo3-dma-0.dtsi"
|
|
/include/ "elo3-dma-1.dtsi"
|
|
/include/ "qoriq-espi-0.dtsi"
|
|
spi@110000 {
|
|
fsl,espi-num-chipselects = <4>;
|
|
};
|
|
|
|
/include/ "qoriq-esdhc-0.dtsi"
|
|
sdhc@114000 {
|
|
compatible = "fsl,t1040-esdhc", "fsl,esdhc";
|
|
fsl,iommu-parent = <&pamu0>;
|
|
fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
|
|
sdhci,auto-cmd12;
|
|
};
|
|
/include/ "qoriq-i2c-0.dtsi"
|
|
/include/ "qoriq-i2c-1.dtsi"
|
|
/include/ "qoriq-duart-0.dtsi"
|
|
/include/ "qoriq-duart-1.dtsi"
|
|
/include/ "qoriq-gpio-0.dtsi"
|
|
/include/ "qoriq-gpio-1.dtsi"
|
|
/include/ "qoriq-gpio-2.dtsi"
|
|
/include/ "qoriq-gpio-3.dtsi"
|
|
/include/ "qoriq-usb2-mph-0.dtsi"
|
|
usb0: usb@210000 {
|
|
compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
|
|
fsl,iommu-parent = <&pamu0>;
|
|
fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
|
|
phy_type = "utmi";
|
|
port0;
|
|
};
|
|
/include/ "qoriq-usb2-dr-0.dtsi"
|
|
usb1: usb@211000 {
|
|
compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
|
|
fsl,iommu-parent = <&pamu0>;
|
|
fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
|
|
dr_mode = "host";
|
|
phy_type = "utmi";
|
|
};
|
|
|
|
display@180000 {
|
|
compatible = "fsl,t1040-diu", "fsl,diu";
|
|
reg = <0x180000 1000>;
|
|
interrupts = <74 2 0 0>;
|
|
};
|
|
|
|
/include/ "qoriq-sata2-0.dtsi"
|
|
sata@220000 {
|
|
fsl,iommu-parent = <&pamu0>;
|
|
fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
|
|
};
|
|
/include/ "qoriq-sata2-1.dtsi"
|
|
sata@221000 {
|
|
fsl,iommu-parent = <&pamu0>;
|
|
fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
|
|
};
|
|
/include/ "qoriq-sec5.0-0.dtsi"
|
|
/include/ "qoriq-qman3.dtsi"
|
|
/include/ "qoriq-bman1.dtsi"
|
|
|
|
/include/ "qoriq-fman3l-0.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-0.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-1.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-2.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-3.dtsi"
|
|
/include/ "qoriq-fman3-0-1g-4.dtsi"
|
|
fman@400000 {
|
|
enet0: ethernet@e0000 {
|
|
};
|
|
|
|
enet1: ethernet@e2000 {
|
|
};
|
|
|
|
enet2: ethernet@e4000 {
|
|
};
|
|
|
|
enet3: ethernet@e6000 {
|
|
};
|
|
|
|
enet4: ethernet@e8000 {
|
|
};
|
|
|
|
mdio@fc000 {
|
|
interrupts = <100 1 0 0>;
|
|
};
|
|
|
|
mdio@fd000 {
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|
|
&qe {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
device_type = "qe";
|
|
compatible = "fsl,qe";
|
|
fsl,qe-num-riscs = <1>;
|
|
fsl,qe-num-snums = <28>;
|
|
|
|
qeic: interrupt-controller@80 {
|
|
interrupt-controller;
|
|
compatible = "fsl,qe-ic";
|
|
#address-cells = <0>;
|
|
#interrupt-cells = <1>;
|
|
reg = <0x80 0x80>;
|
|
interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
|
|
};
|
|
|
|
ucc@2000 {
|
|
cell-index = <1>;
|
|
reg = <0x2000 0x200>;
|
|
interrupts = <32>;
|
|
interrupt-parent = <&qeic>;
|
|
};
|
|
|
|
ucc@2200 {
|
|
cell-index = <3>;
|
|
reg = <0x2200 0x200>;
|
|
interrupts = <34>;
|
|
interrupt-parent = <&qeic>;
|
|
};
|
|
|
|
muram@10000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "fsl,qe-muram", "fsl,cpm-muram";
|
|
ranges = <0x0 0x10000 0x6000>;
|
|
|
|
data-only@0 {
|
|
compatible = "fsl,qe-muram-data",
|
|
"fsl,cpm-muram-data";
|
|
reg = <0x0 0x6000>;
|
|
};
|
|
};
|
|
};
|