159 lines
2.7 KiB
ArmAsm
159 lines
2.7 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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#include <linux/linkage.h>
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#include <asm/blackfin.h>
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#include <asm/dpmc.h>
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#include <asm/context.S>
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#define PM_STACK (COREA_L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
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.section .l1.text
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ENTRY(_enter_hibernate)
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/* switch stack to L1 scratch, prepare for ddr srfr */
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P0.H = HI(PM_STACK);
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P0.L = LO(PM_STACK);
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SP = P0;
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call _bf609_ddr_sr;
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call _bfin_hibernate_syscontrol;
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P0.H = HI(DPM0_RESTORE4);
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P0.L = LO(DPM0_RESTORE4);
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P1.H = _bf609_pm_data;
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P1.L = _bf609_pm_data;
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[P0] = P1;
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P0.H = HI(DPM0_CTL);
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P0.L = LO(DPM0_CTL);
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R3.H = HI(0x00000010);
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R3.L = LO(0x00000010);
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bfin_init_pm_bench_cycles;
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[P0] = R3;
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SSYNC;
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ENDPROC(_enter_hibernate)
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/* DPM wake up interrupt won't wake up core on bf60x if its core IMASK
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* is disabled. This behavior differ from bf5xx serial processor.
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*/
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ENTRY(_dummy_deepsleep)
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[--sp] = SYSCFG;
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[--sp] = (R7:0,P5:0);
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cli r0;
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/* get wake up interrupt ID */
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P0.l = LO(SEC_SCI_BASE + SEC_CSID);
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P0.h = HI(SEC_SCI_BASE + SEC_CSID);
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R0 = [P0];
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/* ACK wake up interrupt in SEC */
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P1.l = LO(SEC_END);
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P1.h = HI(SEC_END);
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[P1] = R0;
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SSYNC;
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/* restore EVT 11 entry */
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p0.h = hi(EVT11);
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p0.l = lo(EVT11);
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p1.h = _evt_evt11;
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p1.l = _evt_evt11;
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[p0] = p1;
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SSYNC;
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(R7:0,P5:0) = [sp++];
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SYSCFG = [sp++];
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RTI;
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ENDPROC(_dummy_deepsleep)
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ENTRY(_enter_deepsleep)
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LINK 0xC;
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[--sp] = (R7:0,P5:0);
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/* Change EVT 11 entry to dummy handler for wake up event */
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p0.h = hi(EVT11);
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p0.l = lo(EVT11);
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p1.h = _dummy_deepsleep;
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p1.l = _dummy_deepsleep;
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[p0] = p1;
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P0.H = HI(PM_STACK);
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P0.L = LO(PM_STACK);
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EX_SCRATCH_REG = SP;
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SP = P0;
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SSYNC;
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/* should put ddr to self refresh mode before sleep */
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call _bf609_ddr_sr;
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/* Set DPM controller to deep sleep mode */
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P0.H = HI(DPM0_CTL);
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P0.L = LO(DPM0_CTL);
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R3.H = HI(0x00000008);
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R3.L = LO(0x00000008);
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[P0] = R3;
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CSYNC;
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/* Enable evt 11 in IMASK before idle, otherwise core doesn't wake up. */
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r0.l = 0x800;
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r0.h = 0;
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sti r0;
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SSYNC;
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bfin_init_pm_bench_cycles;
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/* Fall into deep sleep in idle*/
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idle;
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SSYNC;
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/* Restore PLL after wake up from deep sleep */
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call _bf609_resume_ccbuf;
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/* turn ddr out of self refresh mode */
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call _bf609_ddr_sr_exit;
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SP = EX_SCRATCH_REG;
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(R7:0,P5:0) = [SP++];
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UNLINK;
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RTS;
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ENDPROC(_enter_deepsleep)
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.section .text
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ENTRY(_bf609_hibernate)
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bfin_cpu_reg_save;
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bfin_core_mmr_save;
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P0.H = _bf609_pm_data;
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P0.L = _bf609_pm_data;
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R1.H = 0xDEAD;
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R1.L = 0xBEEF;
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R2.H = .Lpm_resume_here;
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R2.L = .Lpm_resume_here;
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[P0++] = R1;
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[P0++] = R2;
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[P0++] = SP;
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P1.H = _enter_hibernate;
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P1.L = _enter_hibernate;
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call (P1);
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.Lpm_resume_here:
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bfin_core_mmr_restore;
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bfin_cpu_reg_restore;
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[--sp] = RETI; /* Clear Global Interrupt Disable */
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SP += 4;
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RTS;
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ENDPROC(_bf609_hibernate)
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