1137 lines
30 KiB
Plaintext
1137 lines
30 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
#include "tegra132.dtsi"
|
|
|
|
/ {
|
|
model = "NVIDIA Tegra132 Norrin";
|
|
compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124";
|
|
|
|
aliases {
|
|
rtc0 = "/i2c@7000d000/as3722@40";
|
|
rtc1 = "/rtc@7000e000";
|
|
serial0 = &uarta;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x0 0x80000000 0x0 0x80000000>;
|
|
};
|
|
|
|
host1x@50000000 {
|
|
hdmi@54280000 {
|
|
status = "disabled";
|
|
|
|
vdd-supply = <&vdd_3v3_hdmi>;
|
|
pll-supply = <&vdd_hdmi_pll>;
|
|
hdmi-supply = <&vdd_5v0_hdmi>;
|
|
|
|
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
|
|
nvidia,hpd-gpio =
|
|
<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
sor@54540000 {
|
|
status = "okay";
|
|
|
|
nvidia,dpaux = <&dpaux>;
|
|
nvidia,panel = <&panel>;
|
|
};
|
|
|
|
dpaux: dpaux@545c0000 {
|
|
vdd-supply = <&vdd_3v3_panel>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
gpu@57000000 {
|
|
status = "okay";
|
|
|
|
vdd-supply = <&vdd_gpu>;
|
|
};
|
|
|
|
pinmux@70000868 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinmux_default>;
|
|
|
|
pinmux_default: pinmux@0 {
|
|
dap_mclk1_pw4 {
|
|
nvidia,pins = "dap_mclk1_pw4";
|
|
nvidia,function = "extperiph1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
dap2_din_pa4 {
|
|
nvidia,pins = "dap2_din_pa4";
|
|
nvidia,function = "i2s1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
dap2_dout_pa5 {
|
|
nvidia,pins = "dap2_dout_pa5",
|
|
"dap2_fs_pa2",
|
|
"dap2_sclk_pa3";
|
|
nvidia,function = "i2s1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
dap3_dout_pp2 {
|
|
nvidia,pins = "dap3_dout_pp2";
|
|
nvidia,function = "i2s2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
dvfs_pwm_px0 {
|
|
nvidia,pins = "dvfs_pwm_px0",
|
|
"dvfs_clk_px2";
|
|
nvidia,function = "cldvfs";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
ulpi_clk_py0 {
|
|
nvidia,pins = "ulpi_clk_py0",
|
|
"ulpi_nxt_py2",
|
|
"ulpi_stp_py3";
|
|
nvidia,function = "spi1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
ulpi_dir_py1 {
|
|
nvidia,pins = "ulpi_dir_py1";
|
|
nvidia,function = "spi1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
cam_i2c_scl_pbb1 {
|
|
nvidia,pins = "cam_i2c_scl_pbb1",
|
|
"cam_i2c_sda_pbb2";
|
|
nvidia,function = "i2c3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,lock = <TEGRA_PIN_DISABLE>;
|
|
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
gen2_i2c_scl_pt5 {
|
|
nvidia,pins = "gen2_i2c_scl_pt5",
|
|
"gen2_i2c_sda_pt6";
|
|
nvidia,function = "i2c2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,lock = <TEGRA_PIN_DISABLE>;
|
|
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
pj7 {
|
|
nvidia,pins = "pj7";
|
|
nvidia,function = "uartd";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
spdif_in_pk6 {
|
|
nvidia,pins = "spdif_in_pk6";
|
|
nvidia,function = "spdif";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
pk7 {
|
|
nvidia,pins = "pk7";
|
|
nvidia,function = "uartd";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
pg4 {
|
|
nvidia,pins = "pg4",
|
|
"pg5",
|
|
"pg6",
|
|
"pi3";
|
|
nvidia,function = "spi4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
pg7 {
|
|
nvidia,pins = "pg7";
|
|
nvidia,function = "spi4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
ph1 {
|
|
nvidia,pins = "ph1";
|
|
nvidia,function = "pwm1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
pk0 {
|
|
nvidia,pins = "pk0",
|
|
"kb_row15_ps7",
|
|
"clk_32k_out_pa0";
|
|
nvidia,function = "soc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
sdmmc1_clk_pz0 {
|
|
nvidia,pins = "sdmmc1_clk_pz0";
|
|
nvidia,function = "sdmmc1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
sdmmc1_cmd_pz1 {
|
|
nvidia,pins = "sdmmc1_cmd_pz1",
|
|
"sdmmc1_dat0_py7",
|
|
"sdmmc1_dat1_py6",
|
|
"sdmmc1_dat2_py5",
|
|
"sdmmc1_dat3_py4";
|
|
nvidia,function = "sdmmc1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
sdmmc3_clk_pa6 {
|
|
nvidia,pins = "sdmmc3_clk_pa6";
|
|
nvidia,function = "sdmmc3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
sdmmc3_cmd_pa7 {
|
|
nvidia,pins = "sdmmc3_cmd_pa7",
|
|
"sdmmc3_dat0_pb7",
|
|
"sdmmc3_dat1_pb6",
|
|
"sdmmc3_dat2_pb5",
|
|
"sdmmc3_dat3_pb4",
|
|
"kb_col4_pq4",
|
|
"sdmmc3_clk_lb_out_pee4",
|
|
"sdmmc3_clk_lb_in_pee5",
|
|
"sdmmc3_cd_n_pv2";
|
|
nvidia,function = "sdmmc3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
sdmmc4_clk_pcc4 {
|
|
nvidia,pins = "sdmmc4_clk_pcc4";
|
|
nvidia,function = "sdmmc4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
sdmmc4_cmd_pt7 {
|
|
nvidia,pins = "sdmmc4_cmd_pt7",
|
|
"sdmmc4_dat0_paa0",
|
|
"sdmmc4_dat1_paa1",
|
|
"sdmmc4_dat2_paa2",
|
|
"sdmmc4_dat3_paa3",
|
|
"sdmmc4_dat4_paa4",
|
|
"sdmmc4_dat5_paa5",
|
|
"sdmmc4_dat6_paa6",
|
|
"sdmmc4_dat7_paa7";
|
|
nvidia,function = "sdmmc4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
mic_det_l {
|
|
nvidia,pins = "kb_row7_pr7";
|
|
nvidia,function = "rsvd2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
kb_row10_ps2 {
|
|
nvidia,pins = "kb_row10_ps2";
|
|
nvidia,function = "uarta";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
kb_row9_ps1 {
|
|
nvidia,pins = "kb_row9_ps1";
|
|
nvidia,function = "uarta";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
pwr_i2c_scl_pz6 {
|
|
nvidia,pins = "pwr_i2c_scl_pz6",
|
|
"pwr_i2c_sda_pz7";
|
|
nvidia,function = "i2cpwr";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,lock = <TEGRA_PIN_DISABLE>;
|
|
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
jtag_rtck {
|
|
nvidia,pins = "jtag_rtck";
|
|
nvidia,function = "rtck";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
clk_32k_in {
|
|
nvidia,pins = "clk_32k_in";
|
|
nvidia,function = "clk";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
core_pwr_req {
|
|
nvidia,pins = "core_pwr_req";
|
|
nvidia,function = "pwron";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
cpu_pwr_req {
|
|
nvidia,pins = "cpu_pwr_req";
|
|
nvidia,function = "cpu";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
kb_col0_ap {
|
|
nvidia,pins = "kb_col0_pq0";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
en_vdd_sd {
|
|
nvidia,pins = "kb_row0_pr0";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
lid_open {
|
|
nvidia,pins = "kb_row4_pr4";
|
|
nvidia,function = "rsvd3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
pwr_int_n {
|
|
nvidia,pins = "pwr_int_n";
|
|
nvidia,function = "pmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
reset_out_n {
|
|
nvidia,pins = "reset_out_n";
|
|
nvidia,function = "reset_out_n";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
clk3_out_pee0 {
|
|
nvidia,pins = "clk3_out_pee0";
|
|
nvidia,function = "extperiph3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
gen1_i2c_scl_pc4 {
|
|
nvidia,pins = "gen1_i2c_scl_pc4",
|
|
"gen1_i2c_sda_pc5";
|
|
nvidia,function = "i2c1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,lock = <TEGRA_PIN_DISABLE>;
|
|
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
hdmi_cec_pee3 {
|
|
nvidia,pins = "hdmi_cec_pee3";
|
|
nvidia,function = "cec";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,lock = <TEGRA_PIN_DISABLE>;
|
|
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
hdmi_int_pn7 {
|
|
nvidia,pins = "hdmi_int_pn7";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
ddc_scl_pv4 {
|
|
nvidia,pins = "ddc_scl_pv4",
|
|
"ddc_sda_pv5";
|
|
nvidia,function = "i2c4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,lock = <TEGRA_PIN_DISABLE>;
|
|
nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
usb_vbus_en0_pn4 {
|
|
nvidia,pins = "usb_vbus_en0_pn4",
|
|
"usb_vbus_en1_pn5",
|
|
"usb_vbus_en2_pff1";
|
|
nvidia,function = "usb";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,lock = <TEGRA_PIN_DISABLE>;
|
|
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
drive_sdio1 {
|
|
nvidia,pins = "drive_sdio1";
|
|
nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
|
|
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
|
|
nvidia,pull-down-strength = <36>;
|
|
nvidia,pull-up-strength = <20>;
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
|
|
};
|
|
drive_sdio3 {
|
|
nvidia,pins = "drive_sdio3";
|
|
nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
|
|
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
|
|
nvidia,pull-down-strength = <22>;
|
|
nvidia,pull-up-strength = <36>;
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
};
|
|
drive_gma {
|
|
nvidia,pins = "drive_gma";
|
|
nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
|
|
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
|
|
nvidia,pull-down-strength = <2>;
|
|
nvidia,pull-up-strength = <1>;
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
nvidia,drive-type = <1>;
|
|
};
|
|
ac_ok {
|
|
nvidia,pins = "pj0";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
codec_irq_l {
|
|
nvidia,pins = "ph4";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
lcd_bl_en {
|
|
nvidia,pins = "ph2";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
touch_irq_l {
|
|
nvidia,pins = "gpio_w3_aud_pw3";
|
|
nvidia,function = "spi6";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
tpm_davint_l {
|
|
nvidia,pins = "ph6";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
ts_irq_l {
|
|
nvidia,pins = "pk2";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
ts_reset_l {
|
|
nvidia,pins = "pk4";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <1>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
ts_shdn_l {
|
|
nvidia,pins = "pk1";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
ph7 {
|
|
nvidia,pins = "ph7";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
sensor_irq_l {
|
|
nvidia,pins = "pi6";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
wifi_en {
|
|
nvidia,pins = "gpio_x7_aud_px7";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
chromeos_write_protect {
|
|
nvidia,pins = "kb_row1_pr1";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
hp_det_l {
|
|
nvidia,pins = "pi7";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
soc_warm_reset_l {
|
|
nvidia,pins = "pi5";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
};
|
|
};
|
|
|
|
serial@70006000 {
|
|
status = "okay";
|
|
};
|
|
|
|
pwm: pwm@7000a000 {
|
|
status = "okay";
|
|
};
|
|
|
|
/* HDMI DDC */
|
|
hdmi_ddc: i2c@7000c700 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
i2c@7000d000 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
as3722: pmic@40 {
|
|
compatible = "ams,as3722";
|
|
reg = <0x40>;
|
|
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
ams,system-power-controller;
|
|
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&as3722_default>;
|
|
|
|
as3722_default: pinmux@0 {
|
|
gpio0 {
|
|
pins = "gpio0";
|
|
function = "gpio";
|
|
bias-pull-down;
|
|
};
|
|
|
|
gpio1 {
|
|
pins = "gpio1";
|
|
function = "gpio";
|
|
bias-pull-up;
|
|
};
|
|
|
|
gpio2_4_7 {
|
|
pins = "gpio2", "gpio4", "gpio7";
|
|
function = "gpio";
|
|
bias-pull-up;
|
|
};
|
|
|
|
gpio3 {
|
|
pins = "gpio3";
|
|
function = "gpio";
|
|
bias-high-impedance;
|
|
};
|
|
|
|
gpio5 {
|
|
pins = "gpio5";
|
|
function = "clk32k-out";
|
|
bias-pull-down;
|
|
};
|
|
|
|
gpio6 {
|
|
pins = "gpio6";
|
|
function = "clk32k-out";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
regulators {
|
|
vsup-sd2-supply = <&vdd_5v0_sys>;
|
|
vsup-sd3-supply = <&vdd_5v0_sys>;
|
|
vsup-sd4-supply = <&vdd_5v0_sys>;
|
|
vsup-sd5-supply = <&vdd_5v0_sys>;
|
|
vin-ldo0-supply = <&vdd_1v35_lp0>;
|
|
vin-ldo1-6-supply = <&vdd_3v3_sys>;
|
|
vin-ldo2-5-7-supply = <&vddio_1v8>;
|
|
vin-ldo3-4-supply = <&vdd_3v3_sys>;
|
|
vin-ldo9-10-supply = <&vdd_5v0_sys>;
|
|
vin-ldo11-supply = <&vdd_3v3_run>;
|
|
|
|
sd0 {
|
|
regulator-name = "+VDD_CPU_AP";
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-max-microamp = <3500000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
ams,ext-control = <2>;
|
|
};
|
|
|
|
sd1 {
|
|
regulator-name = "+VDD_CORE";
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-max-microamp = <4000000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
ams,ext-control = <1>;
|
|
};
|
|
|
|
vdd_1v35_lp0: sd2 {
|
|
regulator-name = "+1.35V_LP0(sd2)";
|
|
regulator-min-microvolt = <1350000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
sd3 {
|
|
regulator-name = "+1.35V_LP0(sd3)";
|
|
regulator-min-microvolt = <1350000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
vdd_1v05_run: sd4 {
|
|
regulator-name = "+1.05V_RUN";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
};
|
|
|
|
vddio_1v8: sd5 {
|
|
regulator-name = "+1.8V_VDDIO";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
vdd_gpu: sd6 {
|
|
regulator-name = "+VDD_GPU_AP";
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-min-microamp = <3500000>;
|
|
regulator-max-microamp = <3500000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldo0 {
|
|
regulator-name = "+1.05_RUN_AVDD";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
ams,ext-control = <1>;
|
|
};
|
|
|
|
ldo1 {
|
|
regulator-name = "+1.8V_RUN_CAM";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo2 {
|
|
regulator-name = "+1.2V_GEN_AVDD";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
ldo3 {
|
|
regulator-name = "+1.00V_LP0_VDD_RTC";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
ams,enable-tracking;
|
|
};
|
|
|
|
vdd_run_cam: ldo4 {
|
|
regulator-name = "+2.8V_RUN_CAM";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo5 {
|
|
regulator-name = "+1.2V_RUN_CAM_FRONT";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
};
|
|
|
|
vddio_sdmmc3: ldo6 {
|
|
regulator-name = "+VDDIO_SDMMC3";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
ldo7 {
|
|
regulator-name = "+1.05V_RUN_CAM_REAR";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
};
|
|
|
|
ldo9 {
|
|
regulator-name = "+2.8V_RUN_TOUCH";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo10 {
|
|
regulator-name = "+2.8V_RUN_CAM_AF";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo11 {
|
|
regulator-name = "+1.8V_RUN_VPP_FUSE";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
spi@7000d400 {
|
|
status = "okay";
|
|
|
|
ec: cros-ec@0 {
|
|
compatible = "google,cros-ec-spi";
|
|
spi-max-frequency = <3000000>;
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
|
|
reg = <0>;
|
|
|
|
google,cros-ec-spi-msg-delay = <2000>;
|
|
|
|
i2c_20: i2c-tunnel {
|
|
compatible = "google,cros-ec-i2c-tunnel";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
google,remote-bus = <0>;
|
|
|
|
charger: bq24735 {
|
|
compatible = "ti,bq24735";
|
|
reg = <0x9>;
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(J, 0)
|
|
GPIO_ACTIVE_HIGH>;
|
|
ti,ac-detect-gpios = <&gpio
|
|
TEGRA_GPIO(J, 0)
|
|
GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
battery: smart-battery {
|
|
compatible = "sbs,sbs-battery";
|
|
reg = <0xb>;
|
|
battery-name = "battery";
|
|
sbs,i2c-retry-count = <2>;
|
|
sbs,poll-retry-count = <10>;
|
|
/* power-supplies = <&charger>; */
|
|
};
|
|
};
|
|
|
|
keyboard-controller {
|
|
compatible = "google,cros-ec-keyb";
|
|
keypad,num-rows = <8>;
|
|
keypad,num-columns = <13>;
|
|
google,needs-ghost-filter;
|
|
linux,keymap =
|
|
<MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA)
|
|
MATRIX_KEY(0x00, 0x02, KEY_F1)
|
|
MATRIX_KEY(0x00, 0x03, KEY_B)
|
|
MATRIX_KEY(0x00, 0x04, KEY_F10)
|
|
MATRIX_KEY(0x00, 0x06, KEY_N)
|
|
MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
|
|
MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
|
|
|
|
MATRIX_KEY(0x01, 0x01, KEY_ESC)
|
|
MATRIX_KEY(0x01, 0x02, KEY_F4)
|
|
MATRIX_KEY(0x01, 0x03, KEY_G)
|
|
MATRIX_KEY(0x01, 0x04, KEY_F7)
|
|
MATRIX_KEY(0x01, 0x06, KEY_H)
|
|
MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)
|
|
MATRIX_KEY(0x01, 0x09, KEY_F9)
|
|
MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)
|
|
|
|
MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)
|
|
MATRIX_KEY(0x02, 0x01, KEY_TAB)
|
|
MATRIX_KEY(0x02, 0x02, KEY_F3)
|
|
MATRIX_KEY(0x02, 0x03, KEY_T)
|
|
MATRIX_KEY(0x02, 0x04, KEY_F6)
|
|
MATRIX_KEY(0x02, 0x05, KEY_RIGHTBRACE)
|
|
MATRIX_KEY(0x02, 0x06, KEY_Y)
|
|
MATRIX_KEY(0x02, 0x07, KEY_102ND)
|
|
MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)
|
|
MATRIX_KEY(0x02, 0x09, KEY_F8)
|
|
|
|
MATRIX_KEY(0x03, 0x01, KEY_GRAVE)
|
|
MATRIX_KEY(0x03, 0x02, KEY_F2)
|
|
MATRIX_KEY(0x03, 0x03, KEY_5)
|
|
MATRIX_KEY(0x03, 0x04, KEY_F5)
|
|
MATRIX_KEY(0x03, 0x06, KEY_6)
|
|
MATRIX_KEY(0x03, 0x08, KEY_MINUS)
|
|
MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
|
|
|
|
MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)
|
|
MATRIX_KEY(0x04, 0x01, KEY_A)
|
|
MATRIX_KEY(0x04, 0x02, KEY_D)
|
|
MATRIX_KEY(0x04, 0x03, KEY_F)
|
|
MATRIX_KEY(0x04, 0x04, KEY_S)
|
|
MATRIX_KEY(0x04, 0x05, KEY_K)
|
|
MATRIX_KEY(0x04, 0x06, KEY_J)
|
|
MATRIX_KEY(0x04, 0x08, KEY_SEMICOLON)
|
|
MATRIX_KEY(0x04, 0x09, KEY_L)
|
|
MATRIX_KEY(0x04, 0x0a, KEY_BACKSLASH)
|
|
MATRIX_KEY(0x04, 0x0b, KEY_ENTER)
|
|
|
|
MATRIX_KEY(0x05, 0x01, KEY_Z)
|
|
MATRIX_KEY(0x05, 0x02, KEY_C)
|
|
MATRIX_KEY(0x05, 0x03, KEY_V)
|
|
MATRIX_KEY(0x05, 0x04, KEY_X)
|
|
MATRIX_KEY(0x05, 0x05, KEY_COMMA)
|
|
MATRIX_KEY(0x05, 0x06, KEY_M)
|
|
MATRIX_KEY(0x05, 0x07, KEY_LEFTSHIFT)
|
|
MATRIX_KEY(0x05, 0x08, KEY_SLASH)
|
|
MATRIX_KEY(0x05, 0x09, KEY_DOT)
|
|
MATRIX_KEY(0x05, 0x0b, KEY_SPACE)
|
|
|
|
MATRIX_KEY(0x06, 0x01, KEY_1)
|
|
MATRIX_KEY(0x06, 0x02, KEY_3)
|
|
MATRIX_KEY(0x06, 0x03, KEY_4)
|
|
MATRIX_KEY(0x06, 0x04, KEY_2)
|
|
MATRIX_KEY(0x06, 0x05, KEY_8)
|
|
MATRIX_KEY(0x06, 0x06, KEY_7)
|
|
MATRIX_KEY(0x06, 0x08, KEY_0)
|
|
MATRIX_KEY(0x06, 0x09, KEY_9)
|
|
MATRIX_KEY(0x06, 0x0a, KEY_LEFTALT)
|
|
MATRIX_KEY(0x06, 0x0b, KEY_DOWN)
|
|
MATRIX_KEY(0x06, 0x0c, KEY_RIGHT)
|
|
|
|
MATRIX_KEY(0x07, 0x01, KEY_Q)
|
|
MATRIX_KEY(0x07, 0x02, KEY_E)
|
|
MATRIX_KEY(0x07, 0x03, KEY_R)
|
|
MATRIX_KEY(0x07, 0x04, KEY_W)
|
|
MATRIX_KEY(0x07, 0x05, KEY_I)
|
|
MATRIX_KEY(0x07, 0x06, KEY_U)
|
|
MATRIX_KEY(0x07, 0x07, KEY_RIGHTSHIFT)
|
|
MATRIX_KEY(0x07, 0x08, KEY_P)
|
|
MATRIX_KEY(0x07, 0x09, KEY_O)
|
|
MATRIX_KEY(0x07, 0x0b, KEY_UP)
|
|
MATRIX_KEY(0x07, 0x0c, KEY_LEFT)>;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmc@7000e400 {
|
|
nvidia,invert-interrupt;
|
|
nvidia,suspend-mode = <0>;
|
|
#wake-cells = <3>;
|
|
nvidia,cpu-pwr-good-time = <500>;
|
|
nvidia,cpu-pwr-off-time = <300>;
|
|
nvidia,core-pwr-good-time = <641 3845>;
|
|
nvidia,core-pwr-off-time = <61036>;
|
|
nvidia,core-power-req-active-high;
|
|
nvidia,sys-clock-req-active-high;
|
|
nvidia,reset-gpio = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
/* WIFI/BT module */
|
|
sdhci@700b0000 {
|
|
status = "disabled";
|
|
};
|
|
|
|
/* external SD/MMC */
|
|
sdhci@700b0400 {
|
|
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
|
|
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
|
|
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
bus-width = <4>;
|
|
vqmmc-supply = <&vddio_sdmmc3>;
|
|
};
|
|
|
|
/* EMMC 4.51 */
|
|
sdhci@700b0600 {
|
|
status = "okay";
|
|
bus-width = <8>;
|
|
non-removable;
|
|
};
|
|
|
|
usb@7d000000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usb-phy@7d000000 {
|
|
status = "okay";
|
|
vbus-supply = <&vdd_usb1_vbus>;
|
|
};
|
|
|
|
usb@7d004000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usb-phy@7d004000 {
|
|
status = "okay";
|
|
vbus-supply = <&vdd_run_cam>;
|
|
};
|
|
|
|
usb@7d008000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usb-phy@7d008000 {
|
|
status = "okay";
|
|
vbus-supply = <&vdd_usb3_vbus>;
|
|
};
|
|
|
|
backlight: backlight {
|
|
compatible = "pwm-backlight";
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
|
|
power-supply = <&vdd_led>;
|
|
pwms = <&pwm 1 1000000>;
|
|
|
|
brightness-levels = <0 4 8 16 32 64 128 255>;
|
|
default-brightness-level = <6>;
|
|
|
|
backlight-boot-off;
|
|
};
|
|
|
|
clocks {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
clk32k_in: clock@0 {
|
|
compatible = "fixed-clock";
|
|
reg=<0>;
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32768>;
|
|
};
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
|
|
lid {
|
|
label = "Lid";
|
|
gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
|
|
linux,input-type = <5>;
|
|
linux,code = <0>;
|
|
debounce-interval = <1>;
|
|
wakeup-source;
|
|
};
|
|
|
|
power {
|
|
label = "Power";
|
|
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_POWER>;
|
|
debounce-interval = <10>;
|
|
wakeup-source;
|
|
};
|
|
};
|
|
|
|
panel: panel {
|
|
compatible = "innolux,n116bge", "simple-panel";
|
|
backlight = <&backlight>;
|
|
ddc-i2c-bus = <&dpaux>;
|
|
};
|
|
|
|
regulators {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
vdd_mux: regulator@0 {
|
|
compatible = "regulator-fixed";
|
|
reg = <0>;
|
|
regulator-name = "+VDD_MUX";
|
|
regulator-min-microvolt = <19000000>;
|
|
regulator-max-microvolt = <19000000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
vdd_5v0_sys: regulator@1 {
|
|
compatible = "regulator-fixed";
|
|
reg = <1>;
|
|
regulator-name = "+5V_SYS";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
vin-supply = <&vdd_mux>;
|
|
};
|
|
|
|
vdd_3v3_sys: regulator@2 {
|
|
compatible = "regulator-fixed";
|
|
reg = <2>;
|
|
regulator-name = "+3.3V_SYS";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
vin-supply = <&vdd_mux>;
|
|
};
|
|
|
|
vdd_3v3_run: regulator@3 {
|
|
compatible = "regulator-fixed";
|
|
reg = <3>;
|
|
regulator-name = "+3.3V_RUN";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_3v3_sys>;
|
|
};
|
|
|
|
vdd_3v3_hdmi: regulator@4 {
|
|
compatible = "regulator-fixed";
|
|
reg = <4>;
|
|
regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
vin-supply = <&vdd_3v3_run>;
|
|
};
|
|
|
|
vdd_led: regulator@5 {
|
|
compatible = "regulator-fixed";
|
|
reg = <5>;
|
|
regulator-name = "+VDD_LED";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_mux>;
|
|
};
|
|
|
|
vdd_usb1_vbus: regulator@6 {
|
|
compatible = "regulator-fixed";
|
|
reg = <6>;
|
|
regulator-name = "+5V_USB_HS";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
gpio-open-drain;
|
|
vin-supply = <&vdd_5v0_sys>;
|
|
};
|
|
|
|
vdd_usb3_vbus: regulator@7 {
|
|
compatible = "regulator-fixed";
|
|
reg = <7>;
|
|
regulator-name = "+5V_USB_SS";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
gpio-open-drain;
|
|
vin-supply = <&vdd_5v0_sys>;
|
|
};
|
|
|
|
vdd_3v3_panel: regulator@8 {
|
|
compatible = "regulator-fixed";
|
|
reg = <8>;
|
|
regulator-name = "+3.3V_PANEL";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_3v3_sys>;
|
|
};
|
|
|
|
vdd_hdmi_pll: regulator@9 {
|
|
compatible = "regulator-fixed";
|
|
reg = <9>;
|
|
regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE";
|
|
regulator-min-microvolt = <1050000>;
|
|
regulator-max-microvolt = <1050000>;
|
|
gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
|
|
vin-supply = <&vdd_1v05_run>;
|
|
};
|
|
|
|
vdd_5v0_hdmi: regulator@10 {
|
|
compatible = "regulator-fixed";
|
|
reg = <10>;
|
|
regulator-name = "+5V_HDMI_CON";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_5v0_sys>;
|
|
};
|
|
|
|
vdd_5v0_ts: regulator@11 {
|
|
compatible = "regulator-fixed";
|
|
reg = <11>;
|
|
regulator-name = "+5V_VDD_TS";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
};
|
|
};
|