228 lines
8.6 KiB
Plaintext
228 lines
8.6 KiB
Plaintext
ImgTec TZ1090 pin controller
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Required properties:
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- compatible: "img,tz1090-pinctrl"
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- reg: Should contain the register physical address and length of the pad
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configuration registers (CR_PADS_* and CR_IF_CTL0).
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".
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TZ1090's pin configuration nodes act as a container for an arbitrary number of
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subnodes. Each of these subnodes represents some desired configuration for a
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pin, a group, or a list of pins or groups. This configuration can include the
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mux function to select on those pin(s)/group(s), and various pin configuration
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parameters, such as pull-up, drive strength, etc.
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The name of each subnode is not important; all subnodes should be enumerated
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and processed purely based on their content.
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Each subnode only affects those parameters that are explicitly listed. In
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other words, a subnode that lists a mux function but no pin configuration
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parameters implies no information about any pin configuration parameters.
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Similarly, a pin subnode that describes a pullup parameter implies no
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information about e.g. the mux function. For this reason, even seemingly boolean
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values are actually tristates in this binding: unspecified, off, or on.
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Unspecified is represented as an absent property, and off/on are represented as
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integer values 0 and 1.
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Required subnode-properties:
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- tz1090,pins : An array of strings. Each string contains the name of a pin or
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group. Valid values for these names are listed below.
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Optional subnode-properties:
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- tz1090,function: A string containing the name of the function to mux to the
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pin or group. Valid values for function names are listed below, including
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which pingroups can be muxed to them.
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- supported generic pinconfig properties (for further details see
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Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt):
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- bias-disable
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- bias-high-impedance
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- bias-bus-hold
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- bias-pull-up
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- bias-pull-down
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- input-schmitt-enable
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- input-schmitt-disable
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- drive-strength: Integer, control drive strength of pins in mA.
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2: 2mA
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4: 4mA
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8: 8mA
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12: 12mA
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Note that many of these properties are only valid for certain specific pins
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or groups. See the TZ1090 TRM for complete details regarding which groups
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support which functionality. The Linux pinctrl driver may also be a useful
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reference.
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Valid values for pin and group names are:
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gpio pins:
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These all support bias-high-impediance, bias-pull-up, bias-pull-down, and
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bias-bus-hold (which can also be provided to any of the groups below to set
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it for all pins in that group).
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They also all support the some form of muxing. Any pins which are contained
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in one of the mux groups (see below) can be muxed only to the functions
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supported by the mux group. All other pins can be muxed to the "perip"
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function which enables them with their intended peripheral.
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Different pins in the same mux group cannot be muxed to different functions,
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however it is possible to mux only a subset of the pins in a mux group to a
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particular function and leave the remaining pins unmuxed. This is useful if
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the board connects certain pins in a group to other devices to be controlled
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by GPIO, and you don't want the usual peripheral to have any control of the
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pin.
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ant_sel0, ant_sel1, gain0, gain1, gain2, gain3, gain4, gain5, gain6, gain7,
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i2s_bclk_out, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2, i2s_lrclk_out,
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i2s_mclk, pa_on, pdm_a, pdm_b, pdm_c, pdm_d, pll_on, rx_hp, rx_on,
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scb0_sclk, scb0_sdat, scb1_sclk, scb1_sdat, scb2_sclk, scb2_sdat, sdh_cd,
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sdh_clk_in, sdh_wp, sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2, sdio_d3,
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spi0_cs0, spi0_cs1, spi0_cs2, spi0_din, spi0_dout, spi0_mclk, spi1_cs0,
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spi1_cs1, spi1_cs2, spi1_din, spi1_dout, spi1_mclk, tft_blank_ls, tft_blue0,
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tft_blue1, tft_blue2, tft_blue3, tft_blue4, tft_blue5, tft_blue6, tft_blue7,
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tft_green0, tft_green1, tft_green2, tft_green3, tft_green4, tft_green5,
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tft_green6, tft_green7, tft_hsync_nr, tft_panelclk, tft_pwrsave, tft_red0,
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tft_red1, tft_red2, tft_red3, tft_red4, tft_red5, tft_red6, tft_red7,
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tft_vd12acb, tft_vdden_gd, tft_vsync_ns, tx_on, uart0_cts, uart0_rts,
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uart0_rxd, uart0_txd, uart1_rxd, uart1_txd.
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bias-high-impediance: supported.
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bias-pull-up: supported.
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bias-pull-down: supported.
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bias-bus-hold: supported.
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function: perip or those supported by pin's mux group.
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other pins:
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These other pins are part of various pin groups below, but can't be
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controlled as GPIOs. They do however support bias-high-impediance,
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bias-pull-up, bias-pull-down, and bias-bus-hold (which can also be provided
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to any of the groups below to set it for all pins in that group).
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clk_out0, clk_out1, tck, tdi, tdo, tms, trst.
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bias-high-impediance: supported.
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bias-pull-up: supported.
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bias-pull-down: supported.
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bias-bus-hold: supported.
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mux groups:
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These all support function, and some support drive configs.
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afe
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pins: tx_on, rx_on, pll_on, pa_on, rx_hp, ant_sel0,
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ant_sel1, gain0, gain1, gain2, gain3, gain4,
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gain5, gain6, gain7.
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function: afe, ts_out_0.
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input-schmitt-enable: supported.
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input-schmitt-disable: supported.
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drive-strength: supported.
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pdm_d
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pins: pdm_d.
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function: pdm_dac, usb_vbus.
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sdh
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pins: sdh_cd, sdh_wp, sdh_clk_in.
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function: sdh, sdio.
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sdio
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pins: sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2,
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sdio_d3.
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function: sdio, sdh.
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spi1_cs2
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pins: spi1_cs2.
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function: spi1_cs2, usb_vbus.
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tft
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pins: tft_red0, tft_red1, tft_red2, tft_red3,
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tft_red4, tft_red5, tft_red6, tft_red7,
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tft_green0, tft_green1, tft_green2, tft_green3,
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tft_green4, tft_green5, tft_green6, tft_green7,
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tft_blue0, tft_blue1, tft_blue2, tft_blue3,
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tft_blue4, tft_blue5, tft_blue6, tft_blue7,
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tft_vdden_gd, tft_panelclk, tft_blank_ls,
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tft_vsync_ns, tft_hsync_nr, tft_vd12acb,
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tft_pwrsave.
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function: tft, ext_dac, not_iqadc_stb, iqdac_stb, ts_out_1,
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lcd_trace, phy_ringosc.
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input-schmitt-enable: supported.
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input-schmitt-disable: supported.
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drive-strength: supported.
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drive groups:
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These all support input-schmitt-enable, input-schmitt-disable,
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and drive-strength.
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jtag
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pins: tck, trst, tdi, tdo, tms.
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scb1
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pins: scb1_sdat, scb1_sclk.
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scb2
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pins: scb2_sdat, scb2_sclk.
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spi0
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pins: spi0_mclk, spi0_cs0, spi0_cs1, spi0_cs2, spi0_dout, spi0_din.
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spi1
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pins: spi1_mclk, spi1_cs0, spi1_cs1, spi1_cs2, spi1_dout, spi1_din.
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uart
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pins: uart0_txd, uart0_rxd, uart0_rts, uart0_cts,
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uart1_txd, uart1_rxd.
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drive_i2s
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pins: clk_out1, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2,
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i2s_lrclk_out, i2s_bclk_out, i2s_mclk.
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drive_pdm
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pins: clk_out0, pdm_b, pdm_a.
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drive_scb0
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pins: scb0_sclk, scb0_sdat, pdm_d, pdm_c.
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drive_sdio
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pins: sdio_clk, sdio_cmd, sdio_d0, sdio_d1, sdio_d2, sdio_d3,
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sdh_wp, sdh_cd, sdh_clk_in.
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convenience groups:
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These are just convenient groupings of pins and don't support any drive
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configs.
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uart0
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pins: uart0_cts, uart0_rts, uart0_rxd, uart0_txd.
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uart1
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pins: uart1_rxd, uart1_txd.
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scb0
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pins: scb0_sclk, scb0_sdat.
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i2s
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pins: i2s_bclk_out, i2s_din, i2s_dout0, i2s_dout1, i2s_dout2,
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i2s_lrclk_out, i2s_mclk.
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Example:
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pinctrl: pinctrl@2005800 {
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#gpio-range-cells = <3>;
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compatible = "img,tz1090-pinctrl";
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reg = <0x02005800 0xe4>;
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};
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Example board file extract:
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&pinctrl {
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uart0_default: uart0 {
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uart0_cfg {
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tz1090,pins = "uart0_rxd",
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"uart0_txd";
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tz1090,function = "perip";
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};
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};
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tft_default: tft {
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tft_cfg {
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tz1090,pins = "tft";
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tz1090,function = "tft";
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};
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};
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};
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uart@2004b00 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_default>;
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};
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