120 lines
4.3 KiB
Plaintext
120 lines
4.3 KiB
Plaintext
* Freescale Management Complex
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The Freescale Management Complex (fsl-mc) is a hardware resource
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manager that manages specialized hardware objects used in
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network-oriented packet processing applications. After the fsl-mc
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block is enabled, pools of hardware resources are available, such as
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queues, buffer pools, I/O interfaces. These resources are building
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blocks that can be used to create functional hardware objects/devices
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such as network interfaces, crypto accelerator instances, L2 switches,
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etc.
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Required properties:
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- compatible
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Value type: <string>
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Definition: Must be "fsl,qoriq-mc". A Freescale Management Complex
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compatible with this binding must have Block Revision
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Registers BRR1 and BRR2 at offset 0x0BF8 and 0x0BFC in
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the MC control register region.
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- reg
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Value type: <prop-encoded-array>
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Definition: A standard property. Specifies one or two regions
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defining the MC's registers:
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-the first region is the command portal for the
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this machine and must always be present
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-the second region is the MC control registers. This
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region may not be present in some scenarios, such
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as in the device tree presented to a virtual machine.
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- msi-parent
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Value type: <phandle>
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Definition: Must be present and point to the MSI controller node
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handling message interrupts for the MC.
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- ranges
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Value type: <prop-encoded-array>
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Definition: A standard property. Defines the mapping between the child
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MC address space and the parent system address space.
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The MC address space is defined by 3 components:
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<region type> <offset hi> <offset lo>
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Valid values for region type are
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0x0 - MC portals
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0x1 - QBMAN portals
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- #address-cells
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Value type: <u32>
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Definition: Must be 3. (see definition in 'ranges' property)
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- #size-cells
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Value type: <u32>
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Definition: Must be 1.
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Sub-nodes:
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The fsl-mc node may optionally have dpmac sub-nodes that describe
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the relationship between the Ethernet MACs which belong to the MC
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and the Ethernet PHYs on the system board.
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The dpmac nodes must be under a node named "dpmacs" which contains
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the following properties:
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- #address-cells
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Value type: <u32>
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Definition: Must be present if dpmac sub-nodes are defined and must
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have a value of 1.
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- #size-cells
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Value type: <u32>
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Definition: Must be present if dpmac sub-nodes are defined and must
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have a value of 0.
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These nodes must have the following properties:
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- compatible
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Value type: <string>
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Definition: Must be "fsl,qoriq-mc-dpmac".
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- reg
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Value type: <prop-encoded-array>
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Definition: Specifies the id of the dpmac.
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- phy-handle
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Value type: <phandle>
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Definition: Specifies the phandle to the PHY device node associated
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with the this dpmac.
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Example:
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fsl_mc: fsl-mc@80c000000 {
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compatible = "fsl,qoriq-mc";
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reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
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<0x00000000 0x08340000 0 0x40000>; /* MC control reg */
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msi-parent = <&its>;
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#address-cells = <3>;
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#size-cells = <1>;
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/*
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* Region type 0x0 - MC portals
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* Region type 0x1 - QBMAN portals
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*/
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ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
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0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
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dpmacs {
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#address-cells = <1>;
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#size-cells = <0>;
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dpmac@1 {
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compatible = "fsl,qoriq-mc-dpmac";
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reg = <1>;
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phy-handle = <&mdio0_phy0>;
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}
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}
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};
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