82 lines
2.5 KiB
Plaintext
82 lines
2.5 KiB
Plaintext
Samsung S5P/EXYNOS SoC series MIPI CSI-2 receiver (MIPI CSIS)
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-------------------------------------------------------------
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Required properties:
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- compatible : "samsung,s5pv210-csis" for S5PV210 (S5PC110),
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"samsung,exynos4210-csis" for Exynos4210 (S5PC210),
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"samsung,exynos4212-csis" for Exynos4212/Exynos4412,
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"samsung,exynos5250-csis" for Exynos5250;
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- reg : offset and length of the register set for the device;
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- interrupts : should contain MIPI CSIS interrupt; the format of the
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interrupt specifier depends on the interrupt controller;
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- bus-width : maximum number of data lanes supported (SoC specific);
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- vddio-supply : MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V);
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- vddcore-supply : MIPI CSIS Core voltage supply (e.g. 1.1V);
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- clocks : list of clock specifiers, corresponding to entries in
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clock-names property;
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- clock-names : must contain "csis", "sclk_csis" entries, matching entries
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in the clocks property.
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Optional properties:
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- clock-frequency : The IP's main (system bus) clock frequency in Hz, default
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value when this property is not specified is 166 MHz;
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- samsung,csis-wclk : CSI-2 wrapper clock selection. If this property is present
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external clock from CMU will be used, or the bus clock if
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if it's not specified.
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The device node should contain one 'port' child node with one child 'endpoint'
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node, according to the bindings defined in Documentation/devicetree/bindings/
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media/video-interfaces.txt. The following are properties specific to those nodes.
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port node
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---------
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- reg : (required) must be 3 for camera C input (CSIS0) or 4 for
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camera D input (CSIS1);
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endpoint node
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-------------
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- data-lanes : (required) an array specifying active physical MIPI-CSI2
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data input lanes and their mapping to logical lanes; the
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array's content is unused, only its length is meaningful;
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- samsung,csis-hs-settle : (optional) differential receiver (HS-RX) settle time;
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Example:
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reg0: regulator@0 {
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};
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reg1: regulator@1 {
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};
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/* SoC properties */
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csis_0: csis@11880000 {
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compatible = "samsung,exynos4210-csis";
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reg = <0x11880000 0x1000>;
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interrupts = <0 78 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/* Board properties */
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csis_0: csis@11880000 {
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clock-frequency = <166000000>;
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vddio-supply = <®0>;
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vddcore-supply = <®1>;
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port {
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reg = <3>; /* 3 - CSIS0, 4 - CSIS1 */
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csis0_ep: endpoint {
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remote-endpoint = <...>;
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data-lanes = <1>, <2>;
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samsung,csis-hs-settle = <12>;
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};
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};
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};
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