138 lines
3.5 KiB
Plaintext
138 lines
3.5 KiB
Plaintext
* STMicroelectronics STM32 lcd-tft display controller
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- ltdc: lcd-tft display controller host
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Required properties:
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- compatible: "st,stm32-ltdc"
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- reg: Physical base address of the IP registers and length of memory mapped region.
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- clocks: A list of phandle + clock-specifier pairs, one for each
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entry in 'clock-names'.
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- clock-names: A list of clock names. For ltdc it should contain:
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- "lcd" for the clock feeding the output pixel clock & IP clock.
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- resets: reset to be used by the device (defined by use of RCC macro).
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Required nodes:
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- Video port for RGB output.
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* STMicroelectronics STM32 DSI controller specific extensions to Synopsys
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DesignWare MIPI DSI host controller
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The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI
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DSI host controller. For all mandatory properties & nodes, please refer
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to the related documentation in [5].
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Mandatory properties specific to STM32 DSI:
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- #address-cells: Should be <1>.
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- #size-cells: Should be <0>.
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- compatible: "st,stm32-dsi".
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- clock-names:
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- phy pll reference clock string name, must be "ref".
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- resets: see [5].
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- reset-names: see [5].
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Mandatory nodes specific to STM32 DSI:
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- ports: A node containing DSI input & output port nodes with endpoint
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definitions as documented in [3] & [4].
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- port@0: DSI input port node, connected to the ltdc rgb output port.
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- port@1: DSI output port node, connected to a panel or a bridge input port.
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- panel or bridge node: A node containing the panel or bridge description as
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documented in [6].
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- port: panel or bridge port node, connected to the DSI output port (port@1).
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Note: You can find more documentation in the following references
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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[2] Documentation/devicetree/bindings/reset/reset.txt
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[3] Documentation/devicetree/bindings/media/video-interfaces.txt
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[4] Documentation/devicetree/bindings/graph.txt
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[5] Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt
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[6] Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
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Example 1: RGB panel
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/ {
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...
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soc {
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...
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ltdc: display-controller@40016800 {
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compatible = "st,stm32-ltdc";
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reg = <0x40016800 0x200>;
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interrupts = <88>, <89>;
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resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
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clocks = <&rcc 1 CLK_LCD>;
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clock-names = "lcd";
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port {
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ltdc_out_rgb: endpoint {
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};
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};
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};
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};
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};
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Example 2: DSI panel
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/ {
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...
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soc {
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...
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ltdc: display-controller@40016800 {
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compatible = "st,stm32-ltdc";
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reg = <0x40016800 0x200>;
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interrupts = <88>, <89>;
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resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
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clocks = <&rcc 1 CLK_LCD>;
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clock-names = "lcd";
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port {
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ltdc_out_dsi: endpoint {
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remote-endpoint = <&dsi_in>;
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};
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};
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};
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dsi: dsi@40016c00 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32-dsi";
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reg = <0x40016c00 0x800>;
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clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
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clock-names = "ref", "pclk";
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resets = <&rcc STM32F4_APB2_RESET(DSI)>;
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reset-names = "apb";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dsi_in: endpoint {
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remote-endpoint = <<dc_out_dsi>;
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};
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};
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port@1 {
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reg = <1>;
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dsi_out: endpoint {
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remote-endpoint = <&dsi_in_panel>;
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};
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};
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};
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panel-dsi@0 {
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reg = <0>; /* dsi virtual channel (0..3) */
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compatible = ...;
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enable-gpios = ...;
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port {
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dsi_in_panel: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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};
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};
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};
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};
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