691 lines
14 KiB
C
691 lines
14 KiB
C
/*
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* AD5592R Digital <-> Analog converters driver
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*
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* Copyright 2014-2016 Analog Devices Inc.
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* Author: Paul Cercueil <paul.cercueil@analog.com>
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/iio/iio.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/regulator/consumer.h>
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#include <linux/gpio/consumer.h>
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#include <linux/gpio/driver.h>
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#include <linux/gpio.h>
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#include <linux/property.h>
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#include <dt-bindings/iio/adi,ad5592r.h>
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#include "ad5592r-base.h"
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static int ad5592r_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct ad5592r_state *st = gpiochip_get_data(chip);
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int ret = 0;
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u8 val;
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mutex_lock(&st->gpio_lock);
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if (st->gpio_out & BIT(offset))
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val = st->gpio_val;
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else
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ret = st->ops->gpio_read(st, &val);
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mutex_unlock(&st->gpio_lock);
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if (ret < 0)
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return ret;
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return !!(val & BIT(offset));
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}
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static void ad5592r_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct ad5592r_state *st = gpiochip_get_data(chip);
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mutex_lock(&st->gpio_lock);
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if (value)
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st->gpio_val |= BIT(offset);
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else
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st->gpio_val &= ~BIT(offset);
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st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
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mutex_unlock(&st->gpio_lock);
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}
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static int ad5592r_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct ad5592r_state *st = gpiochip_get_data(chip);
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int ret;
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mutex_lock(&st->gpio_lock);
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st->gpio_out &= ~BIT(offset);
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st->gpio_in |= BIT(offset);
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ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
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if (ret < 0)
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goto err_unlock;
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ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
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err_unlock:
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mutex_unlock(&st->gpio_lock);
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return ret;
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}
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static int ad5592r_gpio_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct ad5592r_state *st = gpiochip_get_data(chip);
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int ret;
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mutex_lock(&st->gpio_lock);
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if (value)
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st->gpio_val |= BIT(offset);
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else
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st->gpio_val &= ~BIT(offset);
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st->gpio_in &= ~BIT(offset);
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st->gpio_out |= BIT(offset);
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ret = st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
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if (ret < 0)
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goto err_unlock;
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ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
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if (ret < 0)
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goto err_unlock;
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ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
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err_unlock:
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mutex_unlock(&st->gpio_lock);
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return ret;
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}
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static int ad5592r_gpio_request(struct gpio_chip *chip, unsigned offset)
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{
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struct ad5592r_state *st = gpiochip_get_data(chip);
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if (!(st->gpio_map & BIT(offset))) {
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dev_err(st->dev, "GPIO %d is reserved by alternate function\n",
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offset);
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return -ENODEV;
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}
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return 0;
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}
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static int ad5592r_gpio_init(struct ad5592r_state *st)
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{
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if (!st->gpio_map)
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return 0;
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st->gpiochip.label = dev_name(st->dev);
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st->gpiochip.base = -1;
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st->gpiochip.ngpio = 8;
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st->gpiochip.parent = st->dev;
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st->gpiochip.can_sleep = true;
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st->gpiochip.direction_input = ad5592r_gpio_direction_input;
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st->gpiochip.direction_output = ad5592r_gpio_direction_output;
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st->gpiochip.get = ad5592r_gpio_get;
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st->gpiochip.set = ad5592r_gpio_set;
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st->gpiochip.request = ad5592r_gpio_request;
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st->gpiochip.owner = THIS_MODULE;
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mutex_init(&st->gpio_lock);
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return gpiochip_add_data(&st->gpiochip, st);
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}
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static void ad5592r_gpio_cleanup(struct ad5592r_state *st)
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{
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if (st->gpio_map)
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gpiochip_remove(&st->gpiochip);
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}
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static int ad5592r_reset(struct ad5592r_state *st)
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{
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struct gpio_desc *gpio;
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struct iio_dev *iio_dev = iio_priv_to_dev(st);
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gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
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if (IS_ERR(gpio))
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return PTR_ERR(gpio);
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if (gpio) {
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udelay(1);
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gpiod_set_value(gpio, 1);
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} else {
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mutex_lock(&iio_dev->mlock);
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/* Writing this magic value resets the device */
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st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac);
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mutex_unlock(&iio_dev->mlock);
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}
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udelay(250);
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return 0;
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}
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static int ad5592r_get_vref(struct ad5592r_state *st)
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{
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int ret;
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if (st->reg) {
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ret = regulator_get_voltage(st->reg);
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if (ret < 0)
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return ret;
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return ret / 1000;
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} else {
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return 2500;
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}
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}
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static int ad5592r_set_channel_modes(struct ad5592r_state *st)
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{
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const struct ad5592r_rw_ops *ops = st->ops;
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int ret;
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unsigned i;
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struct iio_dev *iio_dev = iio_priv_to_dev(st);
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u8 pulldown = 0, tristate = 0, dac = 0, adc = 0;
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u16 read_back;
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for (i = 0; i < st->num_channels; i++) {
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switch (st->channel_modes[i]) {
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case CH_MODE_DAC:
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dac |= BIT(i);
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break;
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case CH_MODE_ADC:
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adc |= BIT(i);
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break;
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case CH_MODE_DAC_AND_ADC:
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dac |= BIT(i);
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adc |= BIT(i);
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break;
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case CH_MODE_GPIO:
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st->gpio_map |= BIT(i);
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st->gpio_in |= BIT(i); /* Default to input */
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break;
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case CH_MODE_UNUSED:
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/* fall-through */
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default:
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switch (st->channel_offstate[i]) {
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case CH_OFFSTATE_OUT_TRISTATE:
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tristate |= BIT(i);
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break;
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case CH_OFFSTATE_OUT_LOW:
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st->gpio_out |= BIT(i);
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break;
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case CH_OFFSTATE_OUT_HIGH:
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st->gpio_out |= BIT(i);
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st->gpio_val |= BIT(i);
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break;
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case CH_OFFSTATE_PULLDOWN:
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/* fall-through */
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default:
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pulldown |= BIT(i);
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break;
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}
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}
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}
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mutex_lock(&iio_dev->mlock);
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/* Pull down unused pins to GND */
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ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown);
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if (ret)
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goto err_unlock;
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ret = ops->reg_write(st, AD5592R_REG_TRISTATE, tristate);
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if (ret)
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goto err_unlock;
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/* Configure pins that we use */
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ret = ops->reg_write(st, AD5592R_REG_DAC_EN, dac);
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if (ret)
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goto err_unlock;
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ret = ops->reg_write(st, AD5592R_REG_ADC_EN, adc);
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if (ret)
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goto err_unlock;
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ret = ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
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if (ret)
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goto err_unlock;
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ret = ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
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if (ret)
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goto err_unlock;
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ret = ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
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if (ret)
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goto err_unlock;
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/* Verify that we can read back at least one register */
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ret = ops->reg_read(st, AD5592R_REG_ADC_EN, &read_back);
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if (!ret && (read_back & 0xff) != adc)
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ret = -EIO;
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err_unlock:
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mutex_unlock(&iio_dev->mlock);
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return ret;
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}
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static int ad5592r_reset_channel_modes(struct ad5592r_state *st)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(st->channel_modes); i++)
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st->channel_modes[i] = CH_MODE_UNUSED;
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return ad5592r_set_channel_modes(st);
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}
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static int ad5592r_write_raw(struct iio_dev *iio_dev,
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struct iio_chan_spec const *chan, int val, int val2, long mask)
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{
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struct ad5592r_state *st = iio_priv(iio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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if (val >= (1 << chan->scan_type.realbits) || val < 0)
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return -EINVAL;
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if (!chan->output)
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return -EINVAL;
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mutex_lock(&iio_dev->mlock);
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ret = st->ops->write_dac(st, chan->channel, val);
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if (!ret)
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st->cached_dac[chan->channel] = val;
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mutex_unlock(&iio_dev->mlock);
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return ret;
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case IIO_CHAN_INFO_SCALE:
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if (chan->type == IIO_VOLTAGE) {
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bool gain;
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if (val == st->scale_avail[0][0] &&
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val2 == st->scale_avail[0][1])
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gain = false;
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else if (val == st->scale_avail[1][0] &&
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val2 == st->scale_avail[1][1])
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gain = true;
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else
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return -EINVAL;
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mutex_lock(&iio_dev->mlock);
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ret = st->ops->reg_read(st, AD5592R_REG_CTRL,
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&st->cached_gp_ctrl);
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if (ret < 0) {
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mutex_unlock(&iio_dev->mlock);
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return ret;
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}
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if (chan->output) {
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if (gain)
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st->cached_gp_ctrl |=
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AD5592R_REG_CTRL_DAC_RANGE;
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else
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st->cached_gp_ctrl &=
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~AD5592R_REG_CTRL_DAC_RANGE;
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} else {
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if (gain)
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st->cached_gp_ctrl |=
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AD5592R_REG_CTRL_ADC_RANGE;
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else
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st->cached_gp_ctrl &=
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~AD5592R_REG_CTRL_ADC_RANGE;
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}
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ret = st->ops->reg_write(st, AD5592R_REG_CTRL,
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st->cached_gp_ctrl);
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mutex_unlock(&iio_dev->mlock);
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return ret;
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}
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int ad5592r_read_raw(struct iio_dev *iio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long m)
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{
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struct ad5592r_state *st = iio_priv(iio_dev);
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u16 read_val;
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int ret;
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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mutex_lock(&iio_dev->mlock);
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if (!chan->output) {
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ret = st->ops->read_adc(st, chan->channel, &read_val);
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if (ret)
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goto unlock;
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if ((read_val >> 12 & 0x7) != (chan->channel & 0x7)) {
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dev_err(st->dev, "Error while reading channel %u\n",
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chan->channel);
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ret = -EIO;
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goto unlock;
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}
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read_val &= GENMASK(11, 0);
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} else {
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read_val = st->cached_dac[chan->channel];
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}
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dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",
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chan->channel, read_val);
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*val = (int) read_val;
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ret = IIO_VAL_INT;
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break;
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case IIO_CHAN_INFO_SCALE:
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*val = ad5592r_get_vref(st);
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if (chan->type == IIO_TEMP) {
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s64 tmp = *val * (3767897513LL / 25LL);
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*val = div_s64_rem(tmp, 1000000000LL, val2);
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ret = IIO_VAL_INT_PLUS_MICRO;
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} else {
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int mult;
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mutex_lock(&iio_dev->mlock);
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if (chan->output)
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mult = !!(st->cached_gp_ctrl &
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AD5592R_REG_CTRL_DAC_RANGE);
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else
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mult = !!(st->cached_gp_ctrl &
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AD5592R_REG_CTRL_ADC_RANGE);
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*val *= ++mult;
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*val2 = chan->scan_type.realbits;
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ret = IIO_VAL_FRACTIONAL_LOG2;
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}
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break;
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case IIO_CHAN_INFO_OFFSET:
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ret = ad5592r_get_vref(st);
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mutex_lock(&iio_dev->mlock);
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if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE)
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*val = (-34365 * 25) / ret;
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else
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*val = (-75365 * 25) / ret;
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ret = IIO_VAL_INT;
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break;
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default:
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ret = -EINVAL;
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}
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unlock:
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mutex_unlock(&iio_dev->mlock);
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return ret;
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}
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static int ad5592r_write_raw_get_fmt(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, long mask)
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{
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switch (mask) {
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case IIO_CHAN_INFO_SCALE:
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return IIO_VAL_INT_PLUS_NANO;
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default:
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return IIO_VAL_INT_PLUS_MICRO;
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}
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return -EINVAL;
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}
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static const struct iio_info ad5592r_info = {
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.read_raw = ad5592r_read_raw,
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.write_raw = ad5592r_write_raw,
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.write_raw_get_fmt = ad5592r_write_raw_get_fmt,
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};
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static ssize_t ad5592r_show_scale_available(struct iio_dev *iio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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char *buf)
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{
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struct ad5592r_state *st = iio_priv(iio_dev);
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return sprintf(buf, "%d.%09u %d.%09u\n",
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st->scale_avail[0][0], st->scale_avail[0][1],
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st->scale_avail[1][0], st->scale_avail[1][1]);
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}
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static struct iio_chan_spec_ext_info ad5592r_ext_info[] = {
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{
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.name = "scale_available",
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.read = ad5592r_show_scale_available,
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.shared = true,
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},
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{},
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};
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static void ad5592r_setup_channel(struct iio_dev *iio_dev,
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struct iio_chan_spec *chan, bool output, unsigned id)
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{
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chan->type = IIO_VOLTAGE;
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chan->indexed = 1;
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chan->output = output;
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chan->channel = id;
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chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
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chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
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chan->scan_type.sign = 'u';
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chan->scan_type.realbits = 12;
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chan->scan_type.storagebits = 16;
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chan->ext_info = ad5592r_ext_info;
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}
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static int ad5592r_alloc_channels(struct ad5592r_state *st)
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{
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unsigned i, curr_channel = 0,
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num_channels = st->num_channels;
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struct iio_dev *iio_dev = iio_priv_to_dev(st);
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struct iio_chan_spec *channels;
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struct fwnode_handle *child;
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u32 reg, tmp;
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int ret;
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device_for_each_child_node(st->dev, child) {
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ret = fwnode_property_read_u32(child, "reg", ®);
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if (ret || reg >= ARRAY_SIZE(st->channel_modes))
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continue;
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ret = fwnode_property_read_u32(child, "adi,mode", &tmp);
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if (!ret)
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st->channel_modes[reg] = tmp;
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fwnode_property_read_u32(child, "adi,off-state", &tmp);
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if (!ret)
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st->channel_offstate[reg] = tmp;
|
|
}
|
|
|
|
channels = devm_kzalloc(st->dev,
|
|
(1 + 2 * num_channels) * sizeof(*channels), GFP_KERNEL);
|
|
if (!channels)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < num_channels; i++) {
|
|
switch (st->channel_modes[i]) {
|
|
case CH_MODE_DAC:
|
|
ad5592r_setup_channel(iio_dev, &channels[curr_channel],
|
|
true, i);
|
|
curr_channel++;
|
|
break;
|
|
|
|
case CH_MODE_ADC:
|
|
ad5592r_setup_channel(iio_dev, &channels[curr_channel],
|
|
false, i);
|
|
curr_channel++;
|
|
break;
|
|
|
|
case CH_MODE_DAC_AND_ADC:
|
|
ad5592r_setup_channel(iio_dev, &channels[curr_channel],
|
|
true, i);
|
|
curr_channel++;
|
|
ad5592r_setup_channel(iio_dev, &channels[curr_channel],
|
|
false, i);
|
|
curr_channel++;
|
|
break;
|
|
|
|
default:
|
|
continue;
|
|
}
|
|
}
|
|
|
|
channels[curr_channel].type = IIO_TEMP;
|
|
channels[curr_channel].channel = 8;
|
|
channels[curr_channel].info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
|
|
BIT(IIO_CHAN_INFO_SCALE) |
|
|
BIT(IIO_CHAN_INFO_OFFSET);
|
|
curr_channel++;
|
|
|
|
iio_dev->num_channels = curr_channel;
|
|
iio_dev->channels = channels;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ad5592r_init_scales(struct ad5592r_state *st, int vref_mV)
|
|
{
|
|
s64 tmp = (s64)vref_mV * 1000000000LL >> 12;
|
|
|
|
st->scale_avail[0][0] =
|
|
div_s64_rem(tmp, 1000000000LL, &st->scale_avail[0][1]);
|
|
st->scale_avail[1][0] =
|
|
div_s64_rem(tmp * 2, 1000000000LL, &st->scale_avail[1][1]);
|
|
}
|
|
|
|
int ad5592r_probe(struct device *dev, const char *name,
|
|
const struct ad5592r_rw_ops *ops)
|
|
{
|
|
struct iio_dev *iio_dev;
|
|
struct ad5592r_state *st;
|
|
int ret;
|
|
|
|
iio_dev = devm_iio_device_alloc(dev, sizeof(*st));
|
|
if (!iio_dev)
|
|
return -ENOMEM;
|
|
|
|
st = iio_priv(iio_dev);
|
|
st->dev = dev;
|
|
st->ops = ops;
|
|
st->num_channels = 8;
|
|
dev_set_drvdata(dev, iio_dev);
|
|
|
|
st->reg = devm_regulator_get_optional(dev, "vref");
|
|
if (IS_ERR(st->reg)) {
|
|
if ((PTR_ERR(st->reg) != -ENODEV) && dev->of_node)
|
|
return PTR_ERR(st->reg);
|
|
|
|
st->reg = NULL;
|
|
} else {
|
|
ret = regulator_enable(st->reg);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
iio_dev->dev.parent = dev;
|
|
iio_dev->name = name;
|
|
iio_dev->info = &ad5592r_info;
|
|
iio_dev->modes = INDIO_DIRECT_MODE;
|
|
|
|
ad5592r_init_scales(st, ad5592r_get_vref(st));
|
|
|
|
ret = ad5592r_reset(st);
|
|
if (ret)
|
|
goto error_disable_reg;
|
|
|
|
ret = ops->reg_write(st, AD5592R_REG_PD,
|
|
(st->reg == NULL) ? AD5592R_REG_PD_EN_REF : 0);
|
|
if (ret)
|
|
goto error_disable_reg;
|
|
|
|
ret = ad5592r_alloc_channels(st);
|
|
if (ret)
|
|
goto error_disable_reg;
|
|
|
|
ret = ad5592r_set_channel_modes(st);
|
|
if (ret)
|
|
goto error_reset_ch_modes;
|
|
|
|
ret = iio_device_register(iio_dev);
|
|
if (ret)
|
|
goto error_reset_ch_modes;
|
|
|
|
ret = ad5592r_gpio_init(st);
|
|
if (ret)
|
|
goto error_dev_unregister;
|
|
|
|
return 0;
|
|
|
|
error_dev_unregister:
|
|
iio_device_unregister(iio_dev);
|
|
|
|
error_reset_ch_modes:
|
|
ad5592r_reset_channel_modes(st);
|
|
|
|
error_disable_reg:
|
|
if (st->reg)
|
|
regulator_disable(st->reg);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(ad5592r_probe);
|
|
|
|
int ad5592r_remove(struct device *dev)
|
|
{
|
|
struct iio_dev *iio_dev = dev_get_drvdata(dev);
|
|
struct ad5592r_state *st = iio_priv(iio_dev);
|
|
|
|
iio_device_unregister(iio_dev);
|
|
ad5592r_reset_channel_modes(st);
|
|
ad5592r_gpio_cleanup(st);
|
|
|
|
if (st->reg)
|
|
regulator_disable(st->reg);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(ad5592r_remove);
|
|
|
|
MODULE_AUTHOR("Paul Cercueil <paul.cercueil@analog.com>");
|
|
MODULE_DESCRIPTION("Analog Devices AD5592R multi-channel converters");
|
|
MODULE_LICENSE("GPL v2");
|