172 lines
4.2 KiB
C
172 lines
4.2 KiB
C
/* Support for the SMSC911x NIC
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*
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* Copyright (C) 2006 Matsushita Electric Industrial Co., Ltd.
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* All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_UNIT_SMSC911X_H
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#define _ASM_UNIT_SMSC911X_H
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#include <linux/netdevice.h>
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#include <proc/irq.h>
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#include <unit/fpga-regs.h>
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#define MN10300_USE_EXT_EEPROM
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#define SMSC911X_BASE 0xA8000000UL
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#define SMSC911X_BASE_END 0xA8000100UL
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#define SMSC911X_IRQ FPGA_LAN_IRQ
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/*
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* Allow the FPGA to be initialised by the SMSC911x driver
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*/
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#undef SMSC_INITIALIZE
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#define SMSC_INITIALIZE() \
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do { \
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/* release reset */ \
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ASB2364_FPGA_REG_RESET_LAN = 0x0001; \
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SyncExBus(); \
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} while (0)
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#ifdef MN10300_USE_EXT_EEPROM
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#include <linux/delay.h>
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#include <unit/clock.h>
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#define EEPROM_ADDRESS 0xA0
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#define MAC_OFFSET 0x0008
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#define USE_IIC_CH 0 /* 0 or 1 */
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#define IIC_OFFSET (0x80000 * USE_IIC_CH)
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#define IIC_DTRM __SYSREG(0xd8400000 + IIC_OFFSET, u32)
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#define IIC_DREC __SYSREG(0xd8400004 + IIC_OFFSET, u32)
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#define IIC_MYADD __SYSREG(0xd8400008 + IIC_OFFSET, u32)
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#define IIC_CLK __SYSREG(0xd840000c + IIC_OFFSET, u32)
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#define IIC_BRST __SYSREG(0xd8400010 + IIC_OFFSET, u32)
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#define IIC_HOLD __SYSREG(0xd8400014 + IIC_OFFSET, u32)
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#define IIC_BSTS __SYSREG(0xd8400018 + IIC_OFFSET, u32)
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#define IIC_ICR __SYSREG(0xd4000080 + 4 * USE_IIC_CH, u16)
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#define IIC_CLK_PLS ((unsigned short)(MN10300_IOCLK / 100000 - 1))
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#define IIC_CLK_LOW ((unsigned short)(IIC_CLK_PLS / 2))
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#define SYS_IIC_DTRM_Bit_STA ((unsigned short)0x0400)
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#define SYS_IIC_DTRM_Bit_STO ((unsigned short)0x0200)
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#define SYS_IIC_DTRM_Bit_ACK ((unsigned short)0x0100)
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#define SYS_IIC_DTRM_Bit_DATA ((unsigned short)0x00FF)
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static inline void POLL_INT_REQ(volatile u16 *icr)
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{
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unsigned long flags;
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u16 tmp;
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while (!(*icr & GxICR_REQUEST))
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;
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flags = arch_local_cli_save();
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tmp = *icr;
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*icr = (tmp & GxICR_LEVEL) | GxICR_DETECT;
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tmp = *icr;
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arch_local_irq_restore(flags);
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}
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/*
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* Implement the SMSC911x hook for MAC address retrieval
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*/
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#undef smsc_get_mac
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static inline int smsc_get_mac(struct net_device *dev)
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{
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unsigned char *mac_buf = dev->dev_addr;
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int i;
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unsigned short value;
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unsigned int data;
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int mac_length = 6;
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int check;
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u16 orig_gicr, tmp;
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unsigned long flags;
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/* save original GnICR and clear GnICR.IE */
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flags = arch_local_cli_save();
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orig_gicr = IIC_ICR;
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IIC_ICR = orig_gicr & GxICR_LEVEL;
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tmp = IIC_ICR;
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arch_local_irq_restore(flags);
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IIC_MYADD = 0x00000008;
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IIC_CLK = (IIC_CLK_LOW << 16) + (IIC_CLK_PLS);
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/* bus hung recovery */
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while (1) {
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check = 0;
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for (i = 0; i < 3; i++) {
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if ((IIC_BSTS & 0x00000003) == 0x00000003)
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check++;
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udelay(3);
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}
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if (check == 3) {
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IIC_BRST = 0x00000003;
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break;
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} else {
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for (i = 0; i < 3; i++) {
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IIC_BRST = 0x00000002;
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udelay(8);
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IIC_BRST = 0x00000003;
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udelay(8);
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}
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}
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}
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IIC_BRST = 0x00000002;
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IIC_BRST = 0x00000003;
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value = SYS_IIC_DTRM_Bit_STA | SYS_IIC_DTRM_Bit_ACK;
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value |= (((unsigned short)EEPROM_ADDRESS & SYS_IIC_DTRM_Bit_DATA) |
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(unsigned short)0x0000);
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IIC_DTRM = value;
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POLL_INT_REQ(&IIC_ICR);
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/** send offset of MAC address in EEPROM **/
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IIC_DTRM = (unsigned char)((MAC_OFFSET & 0xFF00) >> 8);
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POLL_INT_REQ(&IIC_ICR);
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IIC_DTRM = (unsigned char)(MAC_OFFSET & 0x00FF);
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POLL_INT_REQ(&IIC_ICR);
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udelay(1000);
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value = SYS_IIC_DTRM_Bit_STA;
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value |= (((unsigned short)EEPROM_ADDRESS & SYS_IIC_DTRM_Bit_DATA) |
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(unsigned short)0x0001);
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IIC_DTRM = value;
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POLL_INT_REQ(&IIC_ICR);
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IIC_DTRM = 0x00000000;
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while (mac_length > 0) {
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POLL_INT_REQ(&IIC_ICR);
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data = IIC_DREC;
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mac_length--;
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if (mac_length == 0)
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value = 0x00000300; /* stop IIC bus */
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else if (mac_length == 1)
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value = 0x00000100; /* no ack */
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else
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value = 0x00000000; /* ack */
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IIC_DTRM = value;
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*mac_buf++ = (unsigned char)(data & 0xff);
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}
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/* restore GnICR.LV and GnICR.IE */
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flags = arch_local_cli_save();
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IIC_ICR = (orig_gicr & (GxICR_LEVEL | GxICR_ENABLE));
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tmp = IIC_ICR;
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arch_local_irq_restore(flags);
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return 0;
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}
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#endif /* MN10300_USE_EXT_EEPROM */
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#endif /* _ASM_UNIT_SMSC911X_H */
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