642 lines
15 KiB
C
642 lines
15 KiB
C
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/*
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* skl-sst.c - HDA DSP library functions for SKL platform
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*
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* Copyright (C) 2014-15, Intel Corporation.
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* Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
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* Jeeja KP <jeeja.kp@intel.com>
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/uuid.h>
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#include "../common/sst-dsp.h"
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#include "../common/sst-dsp-priv.h"
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#include "../common/sst-ipc.h"
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#include "skl-sst-ipc.h"
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#define SKL_BASEFW_TIMEOUT 300
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#define SKL_INIT_TIMEOUT 1000
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/* Intel HD Audio SRAM Window 0*/
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#define SKL_ADSP_SRAM0_BASE 0x8000
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/* Firmware status window */
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#define SKL_ADSP_FW_STATUS SKL_ADSP_SRAM0_BASE
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#define SKL_ADSP_ERROR_CODE (SKL_ADSP_FW_STATUS + 0x4)
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#define SKL_NUM_MODULES 1
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static bool skl_check_fw_status(struct sst_dsp *ctx, u32 status)
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{
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u32 cur_sts;
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cur_sts = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS) & SKL_FW_STS_MASK;
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return (cur_sts == status);
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}
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static int skl_transfer_firmware(struct sst_dsp *ctx,
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const void *basefw, u32 base_fw_size)
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{
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int ret = 0;
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ret = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, basefw, base_fw_size,
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true);
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if (ret < 0)
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return ret;
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ret = sst_dsp_register_poll(ctx,
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SKL_ADSP_FW_STATUS,
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SKL_FW_STS_MASK,
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SKL_FW_RFW_START,
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SKL_BASEFW_TIMEOUT,
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"Firmware boot");
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ctx->cl_dev.ops.cl_stop_dma(ctx);
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return ret;
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}
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#define SKL_ADSP_FW_BIN_HDR_OFFSET 0x284
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static int skl_load_base_firmware(struct sst_dsp *ctx)
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{
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int ret = 0, i;
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struct skl_sst *skl = ctx->thread_context;
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struct firmware stripped_fw;
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u32 reg;
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skl->boot_complete = false;
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init_waitqueue_head(&skl->boot_wait);
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if (ctx->fw == NULL) {
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ret = request_firmware(&ctx->fw, ctx->fw_name, ctx->dev);
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if (ret < 0) {
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dev_err(ctx->dev, "Request firmware failed %d\n", ret);
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return -EIO;
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}
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}
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/* prase uuids on first boot */
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if (skl->is_first_boot) {
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ret = snd_skl_parse_uuids(ctx, ctx->fw, SKL_ADSP_FW_BIN_HDR_OFFSET, 0);
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if (ret < 0) {
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dev_err(ctx->dev, "UUID parsing err: %d\n", ret);
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release_firmware(ctx->fw);
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skl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK);
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return ret;
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}
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}
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/* check for extended manifest */
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stripped_fw.data = ctx->fw->data;
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stripped_fw.size = ctx->fw->size;
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skl_dsp_strip_extended_manifest(&stripped_fw);
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ret = skl_dsp_boot(ctx);
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if (ret < 0) {
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dev_err(ctx->dev, "Boot dsp core failed ret: %d\n", ret);
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goto skl_load_base_firmware_failed;
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}
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ret = skl_cldma_prepare(ctx);
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if (ret < 0) {
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dev_err(ctx->dev, "CL dma prepare failed : %d\n", ret);
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goto skl_load_base_firmware_failed;
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}
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/* enable Interrupt */
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skl_ipc_int_enable(ctx);
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skl_ipc_op_int_enable(ctx);
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/* check ROM Status */
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for (i = SKL_INIT_TIMEOUT; i > 0; --i) {
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if (skl_check_fw_status(ctx, SKL_FW_INIT)) {
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dev_dbg(ctx->dev,
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"ROM loaded, we can continue with FW loading\n");
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break;
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}
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mdelay(1);
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}
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if (!i) {
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reg = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS);
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dev_err(ctx->dev,
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"Timeout waiting for ROM init done, reg:0x%x\n", reg);
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ret = -EIO;
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goto transfer_firmware_failed;
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}
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ret = skl_transfer_firmware(ctx, stripped_fw.data, stripped_fw.size);
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if (ret < 0) {
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dev_err(ctx->dev, "Transfer firmware failed%d\n", ret);
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goto transfer_firmware_failed;
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} else {
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ret = wait_event_timeout(skl->boot_wait, skl->boot_complete,
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msecs_to_jiffies(SKL_IPC_BOOT_MSECS));
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if (ret == 0) {
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dev_err(ctx->dev, "DSP boot failed, FW Ready timed-out\n");
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ret = -EIO;
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goto transfer_firmware_failed;
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}
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dev_dbg(ctx->dev, "Download firmware successful%d\n", ret);
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skl->fw_loaded = true;
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}
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return 0;
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transfer_firmware_failed:
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ctx->cl_dev.ops.cl_cleanup_controller(ctx);
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skl_load_base_firmware_failed:
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skl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK);
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release_firmware(ctx->fw);
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ctx->fw = NULL;
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return ret;
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}
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static int skl_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id)
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{
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int ret;
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struct skl_ipc_dxstate_info dx;
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struct skl_sst *skl = ctx->thread_context;
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unsigned int core_mask = SKL_DSP_CORE_MASK(core_id);
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/* If core0 is being turned on, we need to load the FW */
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if (core_id == SKL_DSP_CORE0_ID) {
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ret = skl_load_base_firmware(ctx);
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if (ret < 0) {
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dev_err(ctx->dev, "unable to load firmware\n");
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return ret;
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}
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/* load libs as they are also lost on D3 */
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if (skl->lib_count > 1) {
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ret = ctx->fw_ops.load_library(ctx, skl->lib_info,
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skl->lib_count);
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if (ret < 0) {
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dev_err(ctx->dev, "reload libs failed: %d\n",
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ret);
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return ret;
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}
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}
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}
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/*
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* If any core other than core 0 is being moved to D0, enable the
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* core and send the set dx IPC for the core.
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*/
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if (core_id != SKL_DSP_CORE0_ID) {
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ret = skl_dsp_enable_core(ctx, core_mask);
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if (ret < 0)
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return ret;
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dx.core_mask = core_mask;
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dx.dx_mask = core_mask;
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ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID,
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SKL_BASE_FW_MODULE_ID, &dx);
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if (ret < 0) {
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dev_err(ctx->dev, "Failed to set dsp to D0:core id= %d\n",
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core_id);
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skl_dsp_disable_core(ctx, core_mask);
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}
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}
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skl->cores.state[core_id] = SKL_DSP_RUNNING;
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return 0;
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}
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static int skl_set_dsp_D3(struct sst_dsp *ctx, unsigned int core_id)
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{
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int ret;
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struct skl_ipc_dxstate_info dx;
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struct skl_sst *skl = ctx->thread_context;
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unsigned int core_mask = SKL_DSP_CORE_MASK(core_id);
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dx.core_mask = core_mask;
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dx.dx_mask = SKL_IPC_D3_MASK;
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ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID, SKL_BASE_FW_MODULE_ID, &dx);
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if (ret < 0)
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dev_err(ctx->dev, "set Dx core %d fail: %d\n", core_id, ret);
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if (core_id == SKL_DSP_CORE0_ID) {
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/* disable Interrupt */
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ctx->cl_dev.ops.cl_cleanup_controller(ctx);
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skl_cldma_int_disable(ctx);
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skl_ipc_op_int_disable(ctx);
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skl_ipc_int_disable(ctx);
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}
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ret = skl_dsp_disable_core(ctx, core_mask);
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if (ret < 0)
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return ret;
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skl->cores.state[core_id] = SKL_DSP_RESET;
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return ret;
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}
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static unsigned int skl_get_errorcode(struct sst_dsp *ctx)
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{
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return sst_dsp_shim_read(ctx, SKL_ADSP_ERROR_CODE);
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}
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/*
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* since get/set_module are called from DAPM context,
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* we don't need lock for usage count
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*/
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static int skl_get_module(struct sst_dsp *ctx, u16 mod_id)
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{
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struct skl_module_table *module;
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list_for_each_entry(module, &ctx->module_list, list) {
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if (module->mod_info->mod_id == mod_id)
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return ++module->usage_cnt;
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}
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return -EINVAL;
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}
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static int skl_put_module(struct sst_dsp *ctx, u16 mod_id)
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{
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struct skl_module_table *module;
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list_for_each_entry(module, &ctx->module_list, list) {
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if (module->mod_info->mod_id == mod_id)
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return --module->usage_cnt;
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}
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return -EINVAL;
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}
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static struct skl_module_table *skl_fill_module_table(struct sst_dsp *ctx,
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char *mod_name, int mod_id)
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{
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const struct firmware *fw;
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struct skl_module_table *skl_module;
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unsigned int size;
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int ret;
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ret = request_firmware(&fw, mod_name, ctx->dev);
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if (ret < 0) {
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dev_err(ctx->dev, "Request Module %s failed :%d\n",
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mod_name, ret);
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return NULL;
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}
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skl_module = devm_kzalloc(ctx->dev, sizeof(*skl_module), GFP_KERNEL);
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if (skl_module == NULL) {
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release_firmware(fw);
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return NULL;
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}
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size = sizeof(*skl_module->mod_info);
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skl_module->mod_info = devm_kzalloc(ctx->dev, size, GFP_KERNEL);
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if (skl_module->mod_info == NULL) {
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release_firmware(fw);
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return NULL;
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}
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skl_module->mod_info->mod_id = mod_id;
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skl_module->mod_info->fw = fw;
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list_add(&skl_module->list, &ctx->module_list);
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return skl_module;
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}
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/* get a module from it's unique ID */
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static struct skl_module_table *skl_module_get_from_id(
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struct sst_dsp *ctx, u16 mod_id)
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{
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struct skl_module_table *module;
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if (list_empty(&ctx->module_list)) {
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dev_err(ctx->dev, "Module list is empty\n");
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return NULL;
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}
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list_for_each_entry(module, &ctx->module_list, list) {
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if (module->mod_info->mod_id == mod_id)
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return module;
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}
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return NULL;
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}
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static int skl_transfer_module(struct sst_dsp *ctx, const void *data,
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u32 size, u16 mod_id, u8 table_id, bool is_module)
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{
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int ret, bytes_left, curr_pos;
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struct skl_sst *skl = ctx->thread_context;
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skl->mod_load_complete = false;
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bytes_left = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, data, size, false);
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if (bytes_left < 0)
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return bytes_left;
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/* check is_module flag to load module or library */
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if (is_module)
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ret = skl_ipc_load_modules(&skl->ipc, SKL_NUM_MODULES, &mod_id);
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else
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ret = skl_sst_ipc_load_library(&skl->ipc, 0, table_id, false);
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if (ret < 0) {
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dev_err(ctx->dev, "Failed to Load %s with err %d\n",
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is_module ? "module" : "lib", ret);
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goto out;
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}
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/*
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* if bytes_left > 0 then wait for BDL complete interrupt and
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* copy the next chunk till bytes_left is 0. if bytes_left is
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* is zero, then wait for load module IPC reply
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*/
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while (bytes_left > 0) {
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curr_pos = size - bytes_left;
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ret = skl_cldma_wait_interruptible(ctx);
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if (ret < 0)
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goto out;
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bytes_left = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx,
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data + curr_pos,
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bytes_left, false);
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}
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ret = wait_event_timeout(skl->mod_load_wait, skl->mod_load_complete,
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msecs_to_jiffies(SKL_IPC_BOOT_MSECS));
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if (ret == 0 || !skl->mod_load_status) {
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dev_err(ctx->dev, "Module Load failed\n");
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ret = -EIO;
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}
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out:
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ctx->cl_dev.ops.cl_stop_dma(ctx);
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return ret;
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}
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static int
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kbl_load_library(struct sst_dsp *ctx, struct skl_lib_info *linfo, int lib_count)
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{
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struct skl_sst *skl = ctx->thread_context;
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struct firmware stripped_fw;
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int ret, i;
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/* library indices start from 1 to N. 0 represents base FW */
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for (i = 1; i < lib_count; i++) {
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ret = skl_prepare_lib_load(skl, &skl->lib_info[i], &stripped_fw,
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SKL_ADSP_FW_BIN_HDR_OFFSET, i);
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if (ret < 0)
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goto load_library_failed;
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ret = skl_transfer_module(ctx, stripped_fw.data,
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stripped_fw.size, 0, i, false);
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if (ret < 0)
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goto load_library_failed;
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}
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return 0;
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load_library_failed:
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skl_release_library(linfo, lib_count);
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return ret;
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}
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static int skl_load_module(struct sst_dsp *ctx, u16 mod_id, u8 *guid)
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{
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struct skl_module_table *module_entry = NULL;
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||
|
int ret = 0;
|
||
|
char mod_name[64]; /* guid str = 32 chars + 4 hyphens */
|
||
|
uuid_le *uuid_mod;
|
||
|
|
||
|
uuid_mod = (uuid_le *)guid;
|
||
|
snprintf(mod_name, sizeof(mod_name), "%s%pUL%s",
|
||
|
"intel/dsp_fw_", uuid_mod, ".bin");
|
||
|
|
||
|
module_entry = skl_module_get_from_id(ctx, mod_id);
|
||
|
if (module_entry == NULL) {
|
||
|
module_entry = skl_fill_module_table(ctx, mod_name, mod_id);
|
||
|
if (module_entry == NULL) {
|
||
|
dev_err(ctx->dev, "Failed to Load module\n");
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
if (!module_entry->usage_cnt) {
|
||
|
ret = skl_transfer_module(ctx, module_entry->mod_info->fw->data,
|
||
|
module_entry->mod_info->fw->size,
|
||
|
mod_id, 0, true);
|
||
|
if (ret < 0) {
|
||
|
dev_err(ctx->dev, "Failed to Load module\n");
|
||
|
return ret;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
ret = skl_get_module(ctx, mod_id);
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
static int skl_unload_module(struct sst_dsp *ctx, u16 mod_id)
|
||
|
{
|
||
|
int usage_cnt;
|
||
|
struct skl_sst *skl = ctx->thread_context;
|
||
|
int ret = 0;
|
||
|
|
||
|
usage_cnt = skl_put_module(ctx, mod_id);
|
||
|
if (usage_cnt < 0) {
|
||
|
dev_err(ctx->dev, "Module bad usage cnt!:%d\n", usage_cnt);
|
||
|
return -EIO;
|
||
|
}
|
||
|
|
||
|
/* if module is used by others return, no need to unload */
|
||
|
if (usage_cnt > 0)
|
||
|
return 0;
|
||
|
|
||
|
ret = skl_ipc_unload_modules(&skl->ipc,
|
||
|
SKL_NUM_MODULES, &mod_id);
|
||
|
if (ret < 0) {
|
||
|
dev_err(ctx->dev, "Failed to UnLoad module\n");
|
||
|
skl_get_module(ctx, mod_id);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
void skl_clear_module_cnt(struct sst_dsp *ctx)
|
||
|
{
|
||
|
struct skl_module_table *module;
|
||
|
|
||
|
if (list_empty(&ctx->module_list))
|
||
|
return;
|
||
|
|
||
|
list_for_each_entry(module, &ctx->module_list, list) {
|
||
|
module->usage_cnt = 0;
|
||
|
}
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(skl_clear_module_cnt);
|
||
|
|
||
|
static void skl_clear_module_table(struct sst_dsp *ctx)
|
||
|
{
|
||
|
struct skl_module_table *module, *tmp;
|
||
|
|
||
|
if (list_empty(&ctx->module_list))
|
||
|
return;
|
||
|
|
||
|
list_for_each_entry_safe(module, tmp, &ctx->module_list, list) {
|
||
|
list_del(&module->list);
|
||
|
release_firmware(module->mod_info->fw);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static const struct skl_dsp_fw_ops skl_fw_ops = {
|
||
|
.set_state_D0 = skl_set_dsp_D0,
|
||
|
.set_state_D3 = skl_set_dsp_D3,
|
||
|
.load_fw = skl_load_base_firmware,
|
||
|
.get_fw_errcode = skl_get_errorcode,
|
||
|
.load_mod = skl_load_module,
|
||
|
.unload_mod = skl_unload_module,
|
||
|
};
|
||
|
|
||
|
static const struct skl_dsp_fw_ops kbl_fw_ops = {
|
||
|
.set_state_D0 = skl_set_dsp_D0,
|
||
|
.set_state_D3 = skl_set_dsp_D3,
|
||
|
.load_fw = skl_load_base_firmware,
|
||
|
.get_fw_errcode = skl_get_errorcode,
|
||
|
.load_library = kbl_load_library,
|
||
|
.load_mod = skl_load_module,
|
||
|
.unload_mod = skl_unload_module,
|
||
|
};
|
||
|
|
||
|
static struct sst_ops skl_ops = {
|
||
|
.irq_handler = skl_dsp_sst_interrupt,
|
||
|
.write = sst_shim32_write,
|
||
|
.read = sst_shim32_read,
|
||
|
.ram_read = sst_memcpy_fromio_32,
|
||
|
.ram_write = sst_memcpy_toio_32,
|
||
|
.free = skl_dsp_free,
|
||
|
};
|
||
|
|
||
|
static struct sst_dsp_device skl_dev = {
|
||
|
.thread = skl_dsp_irq_thread_handler,
|
||
|
.ops = &skl_ops,
|
||
|
};
|
||
|
|
||
|
int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq,
|
||
|
const char *fw_name, struct skl_dsp_loader_ops dsp_ops, struct skl_sst **dsp)
|
||
|
{
|
||
|
struct skl_sst *skl;
|
||
|
struct sst_dsp *sst;
|
||
|
int ret;
|
||
|
|
||
|
ret = skl_sst_ctx_init(dev, irq, fw_name, dsp_ops, dsp, &skl_dev);
|
||
|
if (ret < 0) {
|
||
|
dev_err(dev, "%s: no device\n", __func__);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
skl = *dsp;
|
||
|
sst = skl->dsp;
|
||
|
sst->addr.lpe = mmio_base;
|
||
|
sst->addr.shim = mmio_base;
|
||
|
sst->addr.sram0_base = SKL_ADSP_SRAM0_BASE;
|
||
|
sst->addr.sram1_base = SKL_ADSP_SRAM1_BASE;
|
||
|
sst->addr.w0_stat_sz = SKL_ADSP_W0_STAT_SZ;
|
||
|
sst->addr.w0_up_sz = SKL_ADSP_W0_UP_SZ;
|
||
|
|
||
|
sst_dsp_mailbox_init(sst, (SKL_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ),
|
||
|
SKL_ADSP_W0_UP_SZ, SKL_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ);
|
||
|
|
||
|
ret = skl_ipc_init(dev, skl);
|
||
|
if (ret) {
|
||
|
skl_dsp_free(sst);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
sst->fw_ops = skl_fw_ops;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(skl_sst_dsp_init);
|
||
|
|
||
|
int kbl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq,
|
||
|
const char *fw_name, struct skl_dsp_loader_ops dsp_ops,
|
||
|
struct skl_sst **dsp)
|
||
|
{
|
||
|
struct sst_dsp *sst;
|
||
|
int ret;
|
||
|
|
||
|
ret = skl_sst_dsp_init(dev, mmio_base, irq, fw_name, dsp_ops, dsp);
|
||
|
if (ret < 0) {
|
||
|
dev_err(dev, "%s: Init failed %d\n", __func__, ret);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
sst = (*dsp)->dsp;
|
||
|
sst->fw_ops = kbl_fw_ops;
|
||
|
|
||
|
return 0;
|
||
|
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(kbl_sst_dsp_init);
|
||
|
|
||
|
int skl_sst_init_fw(struct device *dev, struct skl_sst *ctx)
|
||
|
{
|
||
|
int ret;
|
||
|
struct sst_dsp *sst = ctx->dsp;
|
||
|
|
||
|
ret = sst->fw_ops.load_fw(sst);
|
||
|
if (ret < 0) {
|
||
|
dev_err(dev, "Load base fw failed : %d\n", ret);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
skl_dsp_init_core_state(sst);
|
||
|
|
||
|
if (ctx->lib_count > 1) {
|
||
|
ret = sst->fw_ops.load_library(sst, ctx->lib_info,
|
||
|
ctx->lib_count);
|
||
|
if (ret < 0) {
|
||
|
dev_err(dev, "Load Library failed : %x\n", ret);
|
||
|
return ret;
|
||
|
}
|
||
|
}
|
||
|
ctx->is_first_boot = false;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(skl_sst_init_fw);
|
||
|
|
||
|
void skl_sst_dsp_cleanup(struct device *dev, struct skl_sst *ctx)
|
||
|
{
|
||
|
|
||
|
if (ctx->dsp->fw)
|
||
|
release_firmware(ctx->dsp->fw);
|
||
|
skl_clear_module_table(ctx->dsp);
|
||
|
skl_freeup_uuid_list(ctx);
|
||
|
skl_ipc_free(&ctx->ipc);
|
||
|
ctx->dsp->ops->free(ctx->dsp);
|
||
|
if (ctx->boot_complete) {
|
||
|
ctx->dsp->cl_dev.ops.cl_cleanup_controller(ctx->dsp);
|
||
|
skl_cldma_int_disable(ctx->dsp);
|
||
|
}
|
||
|
}
|
||
|
EXPORT_SYMBOL_GPL(skl_sst_dsp_cleanup);
|
||
|
|
||
|
MODULE_LICENSE("GPL v2");
|
||
|
MODULE_DESCRIPTION("Intel Skylake IPC driver");
|