335 lines
8.5 KiB
C
335 lines
8.5 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Serial Port driver for Open Firmware platform devices
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*
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* Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
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*/
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#include <linux/console.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/pm_runtime.h>
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#include <linux/clk.h>
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#include <linux/reset.h>
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#include "8250.h"
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struct of_serial_info {
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struct clk *clk;
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struct reset_control *rst;
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int type;
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int line;
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};
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#ifdef CONFIG_ARCH_TEGRA
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static void tegra_serial_handle_break(struct uart_port *p)
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{
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unsigned int status, tmout = 10000;
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do {
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status = p->serial_in(p, UART_LSR);
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if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
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status = p->serial_in(p, UART_RX);
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else
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break;
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if (--tmout == 0)
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break;
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udelay(1);
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} while (1);
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}
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#else
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static inline void tegra_serial_handle_break(struct uart_port *port)
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{
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}
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#endif
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/*
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* Fill a struct uart_port for a given device node
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*/
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static int of_platform_serial_setup(struct platform_device *ofdev,
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int type, struct uart_port *port,
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struct of_serial_info *info)
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{
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struct resource resource;
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struct device_node *np = ofdev->dev.of_node;
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u32 clk, spd, prop;
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int ret;
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memset(port, 0, sizeof *port);
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pm_runtime_enable(&ofdev->dev);
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pm_runtime_get_sync(&ofdev->dev);
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if (of_property_read_u32(np, "clock-frequency", &clk)) {
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/* Get clk rate through clk driver if present */
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info->clk = devm_clk_get(&ofdev->dev, NULL);
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if (IS_ERR(info->clk)) {
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dev_warn(&ofdev->dev,
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"clk or clock-frequency not defined\n");
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ret = PTR_ERR(info->clk);
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goto err_pmruntime;
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}
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ret = clk_prepare_enable(info->clk);
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if (ret < 0)
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goto err_pmruntime;
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clk = clk_get_rate(info->clk);
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}
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/* If current-speed was set, then try not to change it. */
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if (of_property_read_u32(np, "current-speed", &spd) == 0)
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port->custom_divisor = clk / (16 * spd);
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ret = of_address_to_resource(np, 0, &resource);
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if (ret) {
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dev_warn(&ofdev->dev, "invalid address\n");
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goto err_unprepare;
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}
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spin_lock_init(&port->lock);
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port->mapbase = resource.start;
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port->mapsize = resource_size(&resource);
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/* Check for shifted address mapping */
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if (of_property_read_u32(np, "reg-offset", &prop) == 0)
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port->mapbase += prop;
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/* Check for registers offset within the devices address range */
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if (of_property_read_u32(np, "reg-shift", &prop) == 0)
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port->regshift = prop;
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/* Check for fifo size */
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if (of_property_read_u32(np, "fifo-size", &prop) == 0)
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port->fifosize = prop;
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/* Check for a fixed line number */
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ret = of_alias_get_id(np, "serial");
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if (ret >= 0)
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port->line = ret;
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port->irq = irq_of_parse_and_map(np, 0);
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port->iotype = UPIO_MEM;
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if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
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switch (prop) {
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case 1:
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port->iotype = UPIO_MEM;
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break;
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case 2:
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port->iotype = UPIO_MEM16;
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break;
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case 4:
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port->iotype = of_device_is_big_endian(np) ?
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UPIO_MEM32BE : UPIO_MEM32;
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break;
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default:
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dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
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prop);
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ret = -EINVAL;
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goto err_dispose;
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}
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}
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info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
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if (IS_ERR(info->rst))
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goto err_dispose;
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ret = reset_control_deassert(info->rst);
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if (ret)
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goto err_dispose;
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port->type = type;
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port->uartclk = clk;
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port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
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| UPF_FIXED_PORT | UPF_FIXED_TYPE;
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if (of_property_read_bool(np, "no-loopback-test"))
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port->flags |= UPF_SKIP_TEST;
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port->dev = &ofdev->dev;
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switch (type) {
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case PORT_TEGRA:
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port->handle_break = tegra_serial_handle_break;
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break;
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case PORT_RT2880:
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port->iotype = UPIO_AU;
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break;
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}
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if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
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(of_device_is_compatible(np, "fsl,ns16550") ||
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of_device_is_compatible(np, "fsl,16550-FIFO64")))
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port->handle_irq = fsl8250_handle_irq;
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return 0;
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err_dispose:
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irq_dispose_mapping(port->irq);
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err_unprepare:
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clk_disable_unprepare(info->clk);
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err_pmruntime:
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pm_runtime_put_sync(&ofdev->dev);
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pm_runtime_disable(&ofdev->dev);
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return ret;
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}
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/*
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* Try to register a serial port
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*/
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static const struct of_device_id of_platform_serial_table[];
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static int of_platform_serial_probe(struct platform_device *ofdev)
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{
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const struct of_device_id *match;
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struct of_serial_info *info;
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struct uart_8250_port port8250;
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u32 tx_threshold;
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int port_type;
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int ret;
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match = of_match_device(of_platform_serial_table, &ofdev->dev);
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if (!match)
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return -EINVAL;
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if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas"))
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return -EBUSY;
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info = kzalloc(sizeof(*info), GFP_KERNEL);
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if (info == NULL)
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return -ENOMEM;
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port_type = (unsigned long)match->data;
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memset(&port8250, 0, sizeof(port8250));
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ret = of_platform_serial_setup(ofdev, port_type, &port8250.port, info);
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if (ret)
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goto err_free;
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if (port8250.port.fifosize)
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port8250.capabilities = UART_CAP_FIFO;
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/* Check for TX FIFO threshold & set tx_loadsz */
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if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
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&tx_threshold) == 0) &&
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(tx_threshold < port8250.port.fifosize))
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port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
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if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
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port8250.capabilities |= UART_CAP_AFE;
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ret = serial8250_register_8250_port(&port8250);
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if (ret < 0)
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goto err_dispose;
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info->type = port_type;
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info->line = ret;
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platform_set_drvdata(ofdev, info);
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return 0;
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err_dispose:
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irq_dispose_mapping(port8250.port.irq);
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pm_runtime_put_sync(&ofdev->dev);
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pm_runtime_disable(&ofdev->dev);
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clk_disable_unprepare(info->clk);
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err_free:
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kfree(info);
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return ret;
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}
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/*
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* Release a line
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*/
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static int of_platform_serial_remove(struct platform_device *ofdev)
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{
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struct of_serial_info *info = platform_get_drvdata(ofdev);
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serial8250_unregister_port(info->line);
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reset_control_assert(info->rst);
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pm_runtime_put_sync(&ofdev->dev);
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pm_runtime_disable(&ofdev->dev);
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clk_disable_unprepare(info->clk);
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kfree(info);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int of_serial_suspend(struct device *dev)
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{
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struct of_serial_info *info = dev_get_drvdata(dev);
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struct uart_8250_port *port8250 = serial8250_get_port(info->line);
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struct uart_port *port = &port8250->port;
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serial8250_suspend_port(info->line);
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if (!uart_console(port) || console_suspend_enabled) {
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pm_runtime_put_sync(dev);
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clk_disable_unprepare(info->clk);
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}
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return 0;
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}
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static int of_serial_resume(struct device *dev)
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{
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struct of_serial_info *info = dev_get_drvdata(dev);
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struct uart_8250_port *port8250 = serial8250_get_port(info->line);
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struct uart_port *port = &port8250->port;
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if (!uart_console(port) || console_suspend_enabled) {
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pm_runtime_get_sync(dev);
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clk_prepare_enable(info->clk);
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}
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serial8250_resume_port(info->line);
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return 0;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
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/*
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* A few common types, add more as needed.
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*/
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static const struct of_device_id of_platform_serial_table[] = {
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{ .compatible = "ns8250", .data = (void *)PORT_8250, },
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{ .compatible = "ns16450", .data = (void *)PORT_16450, },
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{ .compatible = "ns16550a", .data = (void *)PORT_16550A, },
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{ .compatible = "ns16550", .data = (void *)PORT_16550, },
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{ .compatible = "ns16750", .data = (void *)PORT_16750, },
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{ .compatible = "ns16850", .data = (void *)PORT_16850, },
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{ .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
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{ .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
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{ .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
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{ .compatible = "altr,16550-FIFO32",
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.data = (void *)PORT_ALTR_16550_F32, },
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{ .compatible = "altr,16550-FIFO64",
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.data = (void *)PORT_ALTR_16550_F64, },
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{ .compatible = "altr,16550-FIFO128",
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.data = (void *)PORT_ALTR_16550_F128, },
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{ .compatible = "mediatek,mtk-btif",
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.data = (void *)PORT_MTK_BTIF, },
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{ .compatible = "mrvl,mmp-uart",
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.data = (void *)PORT_XSCALE, },
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{ .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
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{ /* end of list */ },
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};
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MODULE_DEVICE_TABLE(of, of_platform_serial_table);
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static struct platform_driver of_platform_serial_driver = {
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.driver = {
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.name = "of_serial",
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.of_match_table = of_platform_serial_table,
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.pm = &of_serial_pm_ops,
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},
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.probe = of_platform_serial_probe,
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.remove = of_platform_serial_remove,
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};
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module_platform_driver(of_platform_serial_driver);
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MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
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