603 lines
15 KiB
C
603 lines
15 KiB
C
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/*
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* Copyright (c) 2005 Topspin Communications. All rights reserved.
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* Copyright (c) 2005 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2013 Cisco Systems. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/mm.h>
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#include <linux/dma-mapping.h>
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#include <linux/sched/signal.h>
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#include <linux/sched/mm.h>
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#include <linux/hugetlb.h>
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#include <linux/iommu.h>
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#include <linux/workqueue.h>
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#include <linux/list.h>
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#include <linux/pci.h>
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#include "usnic_log.h"
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#include "usnic_uiom.h"
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#include "usnic_uiom_interval_tree.h"
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static struct workqueue_struct *usnic_uiom_wq;
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#define USNIC_UIOM_PAGE_CHUNK \
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((PAGE_SIZE - offsetof(struct usnic_uiom_chunk, page_list)) /\
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((void *) &((struct usnic_uiom_chunk *) 0)->page_list[1] - \
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(void *) &((struct usnic_uiom_chunk *) 0)->page_list[0]))
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static void usnic_uiom_reg_account(struct work_struct *work)
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{
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struct usnic_uiom_reg *umem = container_of(work,
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struct usnic_uiom_reg, work);
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down_write(&umem->mm->mmap_sem);
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umem->mm->locked_vm -= umem->diff;
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up_write(&umem->mm->mmap_sem);
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mmput(umem->mm);
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kfree(umem);
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}
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static int usnic_uiom_dma_fault(struct iommu_domain *domain,
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struct device *dev,
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unsigned long iova, int flags,
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void *token)
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{
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usnic_err("Device %s iommu fault domain 0x%pK va 0x%lx flags 0x%x\n",
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dev_name(dev),
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domain, iova, flags);
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return -ENOSYS;
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}
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static void usnic_uiom_put_pages(struct list_head *chunk_list, int dirty)
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{
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struct usnic_uiom_chunk *chunk, *tmp;
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struct page *page;
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struct scatterlist *sg;
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int i;
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dma_addr_t pa;
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list_for_each_entry_safe(chunk, tmp, chunk_list, list) {
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for_each_sg(chunk->page_list, sg, chunk->nents, i) {
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page = sg_page(sg);
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pa = sg_phys(sg);
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if (dirty)
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set_page_dirty_lock(page);
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put_page(page);
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usnic_dbg("pa: %pa\n", &pa);
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}
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kfree(chunk);
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}
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}
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static int usnic_uiom_get_pages(unsigned long addr, size_t size, int writable,
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int dmasync, struct list_head *chunk_list)
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{
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struct page **page_list;
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struct scatterlist *sg;
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struct usnic_uiom_chunk *chunk;
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unsigned long locked;
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unsigned long lock_limit;
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unsigned long cur_base;
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unsigned long npages;
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int ret;
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int off;
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int i;
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int flags;
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dma_addr_t pa;
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unsigned int gup_flags;
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if (!can_do_mlock())
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return -EPERM;
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INIT_LIST_HEAD(chunk_list);
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page_list = (struct page **) __get_free_page(GFP_KERNEL);
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if (!page_list)
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return -ENOMEM;
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npages = PAGE_ALIGN(size + (addr & ~PAGE_MASK)) >> PAGE_SHIFT;
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down_write(¤t->mm->mmap_sem);
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locked = npages + current->mm->locked_vm;
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lock_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT;
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if ((locked > lock_limit) && !capable(CAP_IPC_LOCK)) {
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ret = -ENOMEM;
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goto out;
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}
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flags = IOMMU_READ | IOMMU_CACHE;
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flags |= (writable) ? IOMMU_WRITE : 0;
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gup_flags = FOLL_WRITE;
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gup_flags |= (writable) ? 0 : FOLL_FORCE;
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cur_base = addr & PAGE_MASK;
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ret = 0;
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while (npages) {
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ret = get_user_pages(cur_base,
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min_t(unsigned long, npages,
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PAGE_SIZE / sizeof(struct page *)),
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gup_flags, page_list, NULL);
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if (ret < 0)
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goto out;
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npages -= ret;
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off = 0;
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while (ret) {
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chunk = kmalloc(sizeof(*chunk) +
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sizeof(struct scatterlist) *
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min_t(int, ret, USNIC_UIOM_PAGE_CHUNK),
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GFP_KERNEL);
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if (!chunk) {
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ret = -ENOMEM;
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goto out;
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}
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chunk->nents = min_t(int, ret, USNIC_UIOM_PAGE_CHUNK);
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sg_init_table(chunk->page_list, chunk->nents);
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for_each_sg(chunk->page_list, sg, chunk->nents, i) {
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sg_set_page(sg, page_list[i + off],
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PAGE_SIZE, 0);
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pa = sg_phys(sg);
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usnic_dbg("va: 0x%lx pa: %pa\n",
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cur_base + i*PAGE_SIZE, &pa);
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}
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cur_base += chunk->nents * PAGE_SIZE;
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ret -= chunk->nents;
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off += chunk->nents;
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list_add_tail(&chunk->list, chunk_list);
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}
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ret = 0;
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}
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out:
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if (ret < 0)
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usnic_uiom_put_pages(chunk_list, 0);
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else
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current->mm->locked_vm = locked;
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up_write(¤t->mm->mmap_sem);
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free_page((unsigned long) page_list);
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return ret;
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}
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static void usnic_uiom_unmap_sorted_intervals(struct list_head *intervals,
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struct usnic_uiom_pd *pd)
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{
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struct usnic_uiom_interval_node *interval, *tmp;
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long unsigned va, size;
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list_for_each_entry_safe(interval, tmp, intervals, link) {
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va = interval->start << PAGE_SHIFT;
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size = ((interval->last - interval->start) + 1) << PAGE_SHIFT;
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while (size > 0) {
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/* Workaround for RH 970401 */
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usnic_dbg("va 0x%lx size 0x%lx", va, PAGE_SIZE);
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iommu_unmap(pd->domain, va, PAGE_SIZE);
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va += PAGE_SIZE;
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size -= PAGE_SIZE;
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}
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}
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}
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static void __usnic_uiom_reg_release(struct usnic_uiom_pd *pd,
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struct usnic_uiom_reg *uiomr,
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int dirty)
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{
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int npages;
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unsigned long vpn_start, vpn_last;
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struct usnic_uiom_interval_node *interval, *tmp;
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int writable = 0;
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LIST_HEAD(rm_intervals);
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npages = PAGE_ALIGN(uiomr->length + uiomr->offset) >> PAGE_SHIFT;
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vpn_start = (uiomr->va & PAGE_MASK) >> PAGE_SHIFT;
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vpn_last = vpn_start + npages - 1;
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spin_lock(&pd->lock);
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usnic_uiom_remove_interval(&pd->root, vpn_start,
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vpn_last, &rm_intervals);
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usnic_uiom_unmap_sorted_intervals(&rm_intervals, pd);
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list_for_each_entry_safe(interval, tmp, &rm_intervals, link) {
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if (interval->flags & IOMMU_WRITE)
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writable = 1;
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list_del(&interval->link);
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kfree(interval);
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}
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usnic_uiom_put_pages(&uiomr->chunk_list, dirty & writable);
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spin_unlock(&pd->lock);
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}
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static int usnic_uiom_map_sorted_intervals(struct list_head *intervals,
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struct usnic_uiom_reg *uiomr)
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{
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int i, err;
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size_t size;
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struct usnic_uiom_chunk *chunk;
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struct usnic_uiom_interval_node *interval_node;
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dma_addr_t pa;
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dma_addr_t pa_start = 0;
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dma_addr_t pa_end = 0;
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long int va_start = -EINVAL;
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struct usnic_uiom_pd *pd = uiomr->pd;
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long int va = uiomr->va & PAGE_MASK;
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int flags = IOMMU_READ | IOMMU_CACHE;
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flags |= (uiomr->writable) ? IOMMU_WRITE : 0;
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chunk = list_first_entry(&uiomr->chunk_list, struct usnic_uiom_chunk,
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list);
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list_for_each_entry(interval_node, intervals, link) {
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iter_chunk:
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for (i = 0; i < chunk->nents; i++, va += PAGE_SIZE) {
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pa = sg_phys(&chunk->page_list[i]);
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if ((va >> PAGE_SHIFT) < interval_node->start)
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continue;
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if ((va >> PAGE_SHIFT) == interval_node->start) {
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/* First page of the interval */
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va_start = va;
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pa_start = pa;
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pa_end = pa;
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}
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WARN_ON(va_start == -EINVAL);
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if ((pa_end + PAGE_SIZE != pa) &&
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(pa != pa_start)) {
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/* PAs are not contiguous */
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size = pa_end - pa_start + PAGE_SIZE;
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usnic_dbg("va 0x%lx pa %pa size 0x%zx flags 0x%x",
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va_start, &pa_start, size, flags);
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err = iommu_map(pd->domain, va_start, pa_start,
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size, flags);
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if (err) {
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usnic_err("Failed to map va 0x%lx pa %pa size 0x%zx with err %d\n",
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va_start, &pa_start, size, err);
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goto err_out;
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}
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va_start = va;
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pa_start = pa;
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pa_end = pa;
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}
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if ((va >> PAGE_SHIFT) == interval_node->last) {
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/* Last page of the interval */
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size = pa - pa_start + PAGE_SIZE;
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usnic_dbg("va 0x%lx pa %pa size 0x%zx flags 0x%x\n",
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va_start, &pa_start, size, flags);
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err = iommu_map(pd->domain, va_start, pa_start,
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size, flags);
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if (err) {
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usnic_err("Failed to map va 0x%lx pa %pa size 0x%zx with err %d\n",
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va_start, &pa_start, size, err);
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goto err_out;
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}
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break;
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}
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if (pa != pa_start)
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pa_end += PAGE_SIZE;
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}
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if (i == chunk->nents) {
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/*
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* Hit last entry of the chunk,
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* hence advance to next chunk
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*/
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chunk = list_first_entry(&chunk->list,
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struct usnic_uiom_chunk,
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list);
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goto iter_chunk;
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}
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}
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return 0;
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err_out:
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usnic_uiom_unmap_sorted_intervals(intervals, pd);
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return err;
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}
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struct usnic_uiom_reg *usnic_uiom_reg_get(struct usnic_uiom_pd *pd,
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unsigned long addr, size_t size,
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int writable, int dmasync)
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{
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struct usnic_uiom_reg *uiomr;
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unsigned long va_base, vpn_start, vpn_last;
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unsigned long npages;
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int offset, err;
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LIST_HEAD(sorted_diff_intervals);
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/*
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* Intel IOMMU map throws an error if a translation entry is
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* changed from read to write. This module may not unmap
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* and then remap the entry after fixing the permission
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* b/c this open up a small windows where hw DMA may page fault
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* Hence, make all entries to be writable.
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*/
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writable = 1;
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va_base = addr & PAGE_MASK;
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offset = addr & ~PAGE_MASK;
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npages = PAGE_ALIGN(size + offset) >> PAGE_SHIFT;
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vpn_start = (addr & PAGE_MASK) >> PAGE_SHIFT;
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vpn_last = vpn_start + npages - 1;
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uiomr = kmalloc(sizeof(*uiomr), GFP_KERNEL);
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if (!uiomr)
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return ERR_PTR(-ENOMEM);
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|
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uiomr->va = va_base;
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uiomr->offset = offset;
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uiomr->length = size;
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uiomr->writable = writable;
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uiomr->pd = pd;
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err = usnic_uiom_get_pages(addr, size, writable, dmasync,
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&uiomr->chunk_list);
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if (err) {
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usnic_err("Failed get_pages vpn [0x%lx,0x%lx] err %d\n",
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vpn_start, vpn_last, err);
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goto out_free_uiomr;
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}
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|
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spin_lock(&pd->lock);
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err = usnic_uiom_get_intervals_diff(vpn_start, vpn_last,
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(writable) ? IOMMU_WRITE : 0,
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IOMMU_WRITE,
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&pd->root,
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&sorted_diff_intervals);
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if (err) {
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usnic_err("Failed disjoint interval vpn [0x%lx,0x%lx] err %d\n",
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vpn_start, vpn_last, err);
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goto out_put_pages;
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}
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err = usnic_uiom_map_sorted_intervals(&sorted_diff_intervals, uiomr);
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if (err) {
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usnic_err("Failed map interval vpn [0x%lx,0x%lx] err %d\n",
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vpn_start, vpn_last, err);
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goto out_put_intervals;
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}
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err = usnic_uiom_insert_interval(&pd->root, vpn_start, vpn_last,
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(writable) ? IOMMU_WRITE : 0);
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if (err) {
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usnic_err("Failed insert interval vpn [0x%lx,0x%lx] err %d\n",
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vpn_start, vpn_last, err);
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goto out_unmap_intervals;
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}
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usnic_uiom_put_interval_set(&sorted_diff_intervals);
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spin_unlock(&pd->lock);
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return uiomr;
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out_unmap_intervals:
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usnic_uiom_unmap_sorted_intervals(&sorted_diff_intervals, pd);
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out_put_intervals:
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usnic_uiom_put_interval_set(&sorted_diff_intervals);
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|
out_put_pages:
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usnic_uiom_put_pages(&uiomr->chunk_list, 0);
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spin_unlock(&pd->lock);
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out_free_uiomr:
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kfree(uiomr);
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||
|
return ERR_PTR(err);
|
||
|
}
|
||
|
|
||
|
void usnic_uiom_reg_release(struct usnic_uiom_reg *uiomr, int closing)
|
||
|
{
|
||
|
struct mm_struct *mm;
|
||
|
unsigned long diff;
|
||
|
|
||
|
__usnic_uiom_reg_release(uiomr->pd, uiomr, 1);
|
||
|
|
||
|
mm = get_task_mm(current);
|
||
|
if (!mm) {
|
||
|
kfree(uiomr);
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
diff = PAGE_ALIGN(uiomr->length + uiomr->offset) >> PAGE_SHIFT;
|
||
|
|
||
|
/*
|
||
|
* We may be called with the mm's mmap_sem already held. This
|
||
|
* can happen when a userspace munmap() is the call that drops
|
||
|
* the last reference to our file and calls our release
|
||
|
* method. If there are memory regions to destroy, we'll end
|
||
|
* up here and not be able to take the mmap_sem. In that case
|
||
|
* we defer the vm_locked accounting to the system workqueue.
|
||
|
*/
|
||
|
if (closing) {
|
||
|
if (!down_write_trylock(&mm->mmap_sem)) {
|
||
|
INIT_WORK(&uiomr->work, usnic_uiom_reg_account);
|
||
|
uiomr->mm = mm;
|
||
|
uiomr->diff = diff;
|
||
|
|
||
|
queue_work(usnic_uiom_wq, &uiomr->work);
|
||
|
return;
|
||
|
}
|
||
|
} else
|
||
|
down_write(&mm->mmap_sem);
|
||
|
|
||
|
current->mm->locked_vm -= diff;
|
||
|
up_write(&mm->mmap_sem);
|
||
|
mmput(mm);
|
||
|
kfree(uiomr);
|
||
|
}
|
||
|
|
||
|
struct usnic_uiom_pd *usnic_uiom_alloc_pd(void)
|
||
|
{
|
||
|
struct usnic_uiom_pd *pd;
|
||
|
void *domain;
|
||
|
|
||
|
pd = kzalloc(sizeof(*pd), GFP_KERNEL);
|
||
|
if (!pd)
|
||
|
return ERR_PTR(-ENOMEM);
|
||
|
|
||
|
pd->domain = domain = iommu_domain_alloc(&pci_bus_type);
|
||
|
if (!domain) {
|
||
|
usnic_err("Failed to allocate IOMMU domain");
|
||
|
kfree(pd);
|
||
|
return ERR_PTR(-ENOMEM);
|
||
|
}
|
||
|
|
||
|
iommu_set_fault_handler(pd->domain, usnic_uiom_dma_fault, NULL);
|
||
|
|
||
|
spin_lock_init(&pd->lock);
|
||
|
INIT_LIST_HEAD(&pd->devs);
|
||
|
|
||
|
return pd;
|
||
|
}
|
||
|
|
||
|
void usnic_uiom_dealloc_pd(struct usnic_uiom_pd *pd)
|
||
|
{
|
||
|
iommu_domain_free(pd->domain);
|
||
|
kfree(pd);
|
||
|
}
|
||
|
|
||
|
int usnic_uiom_attach_dev_to_pd(struct usnic_uiom_pd *pd, struct device *dev)
|
||
|
{
|
||
|
struct usnic_uiom_dev *uiom_dev;
|
||
|
int err;
|
||
|
|
||
|
uiom_dev = kzalloc(sizeof(*uiom_dev), GFP_ATOMIC);
|
||
|
if (!uiom_dev)
|
||
|
return -ENOMEM;
|
||
|
uiom_dev->dev = dev;
|
||
|
|
||
|
err = iommu_attach_device(pd->domain, dev);
|
||
|
if (err)
|
||
|
goto out_free_dev;
|
||
|
|
||
|
if (!iommu_capable(dev->bus, IOMMU_CAP_CACHE_COHERENCY)) {
|
||
|
usnic_err("IOMMU of %s does not support cache coherency\n",
|
||
|
dev_name(dev));
|
||
|
err = -EINVAL;
|
||
|
goto out_detach_device;
|
||
|
}
|
||
|
|
||
|
spin_lock(&pd->lock);
|
||
|
list_add_tail(&uiom_dev->link, &pd->devs);
|
||
|
pd->dev_cnt++;
|
||
|
spin_unlock(&pd->lock);
|
||
|
|
||
|
return 0;
|
||
|
|
||
|
out_detach_device:
|
||
|
iommu_detach_device(pd->domain, dev);
|
||
|
out_free_dev:
|
||
|
kfree(uiom_dev);
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
void usnic_uiom_detach_dev_from_pd(struct usnic_uiom_pd *pd, struct device *dev)
|
||
|
{
|
||
|
struct usnic_uiom_dev *uiom_dev;
|
||
|
int found = 0;
|
||
|
|
||
|
spin_lock(&pd->lock);
|
||
|
list_for_each_entry(uiom_dev, &pd->devs, link) {
|
||
|
if (uiom_dev->dev == dev) {
|
||
|
found = 1;
|
||
|
break;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
if (!found) {
|
||
|
usnic_err("Unable to free dev %s - not found\n",
|
||
|
dev_name(dev));
|
||
|
spin_unlock(&pd->lock);
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
list_del(&uiom_dev->link);
|
||
|
pd->dev_cnt--;
|
||
|
spin_unlock(&pd->lock);
|
||
|
|
||
|
return iommu_detach_device(pd->domain, dev);
|
||
|
}
|
||
|
|
||
|
struct device **usnic_uiom_get_dev_list(struct usnic_uiom_pd *pd)
|
||
|
{
|
||
|
struct usnic_uiom_dev *uiom_dev;
|
||
|
struct device **devs;
|
||
|
int i = 0;
|
||
|
|
||
|
spin_lock(&pd->lock);
|
||
|
devs = kcalloc(pd->dev_cnt + 1, sizeof(*devs), GFP_ATOMIC);
|
||
|
if (!devs) {
|
||
|
devs = ERR_PTR(-ENOMEM);
|
||
|
goto out;
|
||
|
}
|
||
|
|
||
|
list_for_each_entry(uiom_dev, &pd->devs, link) {
|
||
|
devs[i++] = uiom_dev->dev;
|
||
|
}
|
||
|
out:
|
||
|
spin_unlock(&pd->lock);
|
||
|
return devs;
|
||
|
}
|
||
|
|
||
|
void usnic_uiom_free_dev_list(struct device **devs)
|
||
|
{
|
||
|
kfree(devs);
|
||
|
}
|
||
|
|
||
|
int usnic_uiom_init(char *drv_name)
|
||
|
{
|
||
|
if (!iommu_present(&pci_bus_type)) {
|
||
|
usnic_err("IOMMU required but not present or enabled. USNIC QPs will not function w/o enabling IOMMU\n");
|
||
|
return -EPERM;
|
||
|
}
|
||
|
|
||
|
usnic_uiom_wq = create_workqueue(drv_name);
|
||
|
if (!usnic_uiom_wq) {
|
||
|
usnic_err("Unable to alloc wq for drv %s\n", drv_name);
|
||
|
return -ENOMEM;
|
||
|
}
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
void usnic_uiom_fini(void)
|
||
|
{
|
||
|
flush_workqueue(usnic_uiom_wq);
|
||
|
destroy_workqueue(usnic_uiom_wq);
|
||
|
}
|