86 lines
2.5 KiB
C
86 lines
2.5 KiB
C
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include "regsnv04.h"
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static void
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nv41_timer_init(struct nvkm_timer *tmr)
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{
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struct nvkm_subdev *subdev = &tmr->subdev;
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struct nvkm_device *device = subdev->device;
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u32 f = device->crystal;
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u32 m = 1, n, d;
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/* aim for 31.25MHz, which gives us nanosecond timestamps */
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d = 1000000 / 32;
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n = f;
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while (n < (d * 2)) {
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n += (n / m);
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m++;
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}
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/* reduce ratio to acceptable values */
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while (((n % 5) == 0) && ((d % 5) == 0)) {
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n /= 5;
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d /= 5;
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}
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while (((n % 2) == 0) && ((d % 2) == 0)) {
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n /= 2;
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d /= 2;
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}
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while (n > 0xffff || d > 0xffff) {
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n >>= 1;
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d >>= 1;
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}
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nvkm_debug(subdev, "input frequency : %dHz\n", f);
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nvkm_debug(subdev, "input multiplier: %d\n", m);
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nvkm_debug(subdev, "numerator : %08x\n", n);
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nvkm_debug(subdev, "denominator : %08x\n", d);
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nvkm_debug(subdev, "timer frequency : %dHz\n", (f * m) * d / n);
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nvkm_wr32(device, 0x009220, m - 1);
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nvkm_wr32(device, NV04_PTIMER_NUMERATOR, n);
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nvkm_wr32(device, NV04_PTIMER_DENOMINATOR, d);
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}
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static const struct nvkm_timer_func
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nv41_timer = {
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.init = nv41_timer_init,
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.intr = nv04_timer_intr,
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.read = nv04_timer_read,
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.time = nv04_timer_time,
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.alarm_init = nv04_timer_alarm_init,
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.alarm_fini = nv04_timer_alarm_fini,
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};
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int
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nv41_timer_new(struct nvkm_device *device, int index, struct nvkm_timer **ptmr)
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{
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return nvkm_timer_new_(&nv41_timer, device, index, ptmr);
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}
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