355 lines
10 KiB
C
355 lines
10 KiB
C
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/*
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* Copyright 2013 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs <bskeggs@redhat.com>
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*/
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#include "gf100.h"
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#include "ctxgf100.h"
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#include <nvif/class.h>
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/*******************************************************************************
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* PGRAPH register lists
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******************************************************************************/
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const struct gf100_gr_init
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gk104_gr_init_main_0[] = {
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{ 0x400080, 1, 0x04, 0x003083c2 },
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{ 0x400088, 1, 0x04, 0x0001ffe7 },
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{ 0x40008c, 1, 0x04, 0x00000000 },
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{ 0x400090, 1, 0x04, 0x00000030 },
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{ 0x40013c, 1, 0x04, 0x003901f7 },
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{ 0x400140, 1, 0x04, 0x00000100 },
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{ 0x400144, 1, 0x04, 0x00000000 },
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{ 0x400148, 1, 0x04, 0x00000110 },
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{ 0x400138, 1, 0x04, 0x00000000 },
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{ 0x400130, 2, 0x04, 0x00000000 },
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{ 0x400124, 1, 0x04, 0x00000002 },
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{}
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};
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static const struct gf100_gr_init
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gk104_gr_init_ds_0[] = {
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{ 0x405844, 1, 0x04, 0x00ffffff },
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{ 0x405850, 1, 0x04, 0x00000000 },
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{ 0x405900, 1, 0x04, 0x0000ff34 },
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{ 0x405908, 1, 0x04, 0x00000000 },
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{ 0x405928, 2, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gk104_gr_init_sked_0[] = {
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{ 0x407010, 1, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gk104_gr_init_cwd_0[] = {
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{ 0x405b50, 1, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gk104_gr_init_gpc_unk_1[] = {
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{ 0x418d00, 1, 0x04, 0x00000000 },
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{ 0x418d28, 2, 0x04, 0x00000000 },
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{ 0x418f00, 1, 0x04, 0x00000000 },
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{ 0x418f08, 1, 0x04, 0x00000000 },
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{ 0x418f20, 2, 0x04, 0x00000000 },
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{ 0x418e00, 1, 0x04, 0x00000060 },
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{ 0x418e08, 1, 0x04, 0x00000000 },
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{ 0x418e1c, 2, 0x04, 0x00000000 },
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{}
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};
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const struct gf100_gr_init
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gk104_gr_init_tpccs_0[] = {
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{ 0x419d0c, 1, 0x04, 0x00000000 },
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{ 0x419d10, 1, 0x04, 0x00000014 },
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{}
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};
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const struct gf100_gr_init
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gk104_gr_init_pe_0[] = {
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{ 0x41980c, 1, 0x04, 0x00000010 },
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{ 0x419844, 1, 0x04, 0x00000000 },
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{ 0x419850, 1, 0x04, 0x00000004 },
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{ 0x419854, 2, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gk104_gr_init_l1c_0[] = {
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{ 0x419c98, 1, 0x04, 0x00000000 },
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{ 0x419ca8, 1, 0x04, 0x00000000 },
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{ 0x419cb0, 1, 0x04, 0x01000000 },
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{ 0x419cb4, 1, 0x04, 0x00000000 },
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{ 0x419cb8, 1, 0x04, 0x00b08bea },
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{ 0x419c84, 1, 0x04, 0x00010384 },
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{ 0x419cbc, 1, 0x04, 0x28137646 },
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{ 0x419cc0, 2, 0x04, 0x00000000 },
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{ 0x419c80, 1, 0x04, 0x00020232 },
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{}
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};
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static const struct gf100_gr_init
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gk104_gr_init_sm_0[] = {
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{ 0x419e00, 1, 0x04, 0x00000000 },
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{ 0x419ea0, 1, 0x04, 0x00000000 },
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{ 0x419ee4, 1, 0x04, 0x00000000 },
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{ 0x419ea4, 1, 0x04, 0x00000100 },
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{ 0x419ea8, 1, 0x04, 0x00000000 },
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{ 0x419eb4, 4, 0x04, 0x00000000 },
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{ 0x419edc, 1, 0x04, 0x00000000 },
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{ 0x419f00, 1, 0x04, 0x00000000 },
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{ 0x419f74, 1, 0x04, 0x00000555 },
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{}
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};
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const struct gf100_gr_init
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gk104_gr_init_be_0[] = {
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{ 0x40880c, 1, 0x04, 0x00000000 },
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{ 0x408850, 1, 0x04, 0x00000004 },
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{ 0x408910, 9, 0x04, 0x00000000 },
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{ 0x408950, 1, 0x04, 0x00000000 },
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{ 0x408954, 1, 0x04, 0x0000ffff },
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{ 0x408958, 1, 0x04, 0x00000034 },
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{ 0x408984, 1, 0x04, 0x00000000 },
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{ 0x408988, 1, 0x04, 0x08040201 },
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{ 0x40898c, 1, 0x04, 0x80402010 },
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{}
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};
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const struct gf100_gr_pack
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gk104_gr_pack_mmio[] = {
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{ gk104_gr_init_main_0 },
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{ gf100_gr_init_fe_0 },
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{ gf100_gr_init_pri_0 },
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{ gf100_gr_init_rstr2d_0 },
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{ gf119_gr_init_pd_0 },
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{ gk104_gr_init_ds_0 },
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{ gf100_gr_init_scc_0 },
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{ gk104_gr_init_sked_0 },
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{ gk104_gr_init_cwd_0 },
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{ gf119_gr_init_prop_0 },
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{ gf108_gr_init_gpc_unk_0 },
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{ gf100_gr_init_setup_0 },
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{ gf100_gr_init_crstr_0 },
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{ gf108_gr_init_setup_1 },
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{ gf100_gr_init_zcull_0 },
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{ gf119_gr_init_gpm_0 },
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{ gk104_gr_init_gpc_unk_1 },
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{ gf100_gr_init_gcc_0 },
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{ gk104_gr_init_tpccs_0 },
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{ gf119_gr_init_tex_0 },
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{ gk104_gr_init_pe_0 },
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{ gk104_gr_init_l1c_0 },
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{ gf100_gr_init_mpc_0 },
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{ gk104_gr_init_sm_0 },
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{ gf117_gr_init_pes_0 },
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{ gf117_gr_init_wwdx_0 },
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{ gf117_gr_init_cbm_0 },
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{ gk104_gr_init_be_0 },
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{ gf100_gr_init_fe_1 },
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{}
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};
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/*******************************************************************************
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* PGRAPH engine/subdev functions
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******************************************************************************/
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void
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gk104_gr_init_rop_active_fbps(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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const u32 fbp_count = nvkm_rd32(device, 0x120074);
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nvkm_mask(device, 0x408850, 0x0000000f, fbp_count); /* zrop */
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nvkm_mask(device, 0x408958, 0x0000000f, fbp_count); /* crop */
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}
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void
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gk104_gr_init_ppc_exceptions(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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int gpc, ppc;
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for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
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for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) {
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if (!(gr->ppc_mask[gpc] & (1 << ppc)))
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continue;
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nvkm_wr32(device, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000);
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}
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}
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}
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int
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gk104_gr_init(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
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u32 data[TPC_MAX / 8] = {};
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u8 tpcnr[GPC_MAX];
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int gpc, tpc, rop;
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int i;
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gr->func->init_gpc_mmu(gr);
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gf100_gr_mmio(gr, gr->func->mmio);
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nvkm_wr32(device, GPC_UNIT(0, 0x3018), 0x00000001);
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memset(data, 0x00, sizeof(data));
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memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));
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for (i = 0, gpc = -1; i < gr->tpc_total; i++) {
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do {
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gpc = (gpc + 1) % gr->gpc_nr;
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} while (!tpcnr[gpc]);
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tpc = gr->tpc_nr[gpc] - tpcnr[gpc]--;
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data[i / 8] |= tpc << ((i % 8) * 4);
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}
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nvkm_wr32(device, GPC_BCAST(0x0980), data[0]);
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nvkm_wr32(device, GPC_BCAST(0x0984), data[1]);
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nvkm_wr32(device, GPC_BCAST(0x0988), data[2]);
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nvkm_wr32(device, GPC_BCAST(0x098c), data[3]);
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for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
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nvkm_wr32(device, GPC_UNIT(gpc, 0x0914),
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gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]);
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nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 |
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gr->tpc_total);
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nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918);
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}
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nvkm_wr32(device, GPC_BCAST(0x3fd4), magicgpc918);
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nvkm_wr32(device, GPC_BCAST(0x08ac), nvkm_rd32(device, 0x100800));
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gr->func->init_rop_active_fbps(gr);
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nvkm_wr32(device, 0x400500, 0x00010001);
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nvkm_wr32(device, 0x400100, 0xffffffff);
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nvkm_wr32(device, 0x40013c, 0xffffffff);
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nvkm_wr32(device, 0x409ffc, 0x00000000);
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nvkm_wr32(device, 0x409c14, 0x00003e3e);
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nvkm_wr32(device, 0x409c24, 0x000f0001);
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nvkm_wr32(device, 0x404000, 0xc0000000);
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nvkm_wr32(device, 0x404600, 0xc0000000);
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nvkm_wr32(device, 0x408030, 0xc0000000);
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nvkm_wr32(device, 0x404490, 0xc0000000);
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nvkm_wr32(device, 0x406018, 0xc0000000);
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nvkm_wr32(device, 0x407020, 0x40000000);
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nvkm_wr32(device, 0x405840, 0xc0000000);
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nvkm_wr32(device, 0x405844, 0x00ffffff);
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nvkm_mask(device, 0x419cc0, 0x00000008, 0x00000008);
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nvkm_mask(device, 0x419eb4, 0x00001000, 0x00001000);
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gr->func->init_ppc_exceptions(gr);
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for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
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nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000);
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nvkm_wr32(device, GPC_UNIT(gpc, 0x0900), 0xc0000000);
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nvkm_wr32(device, GPC_UNIT(gpc, 0x1028), 0xc0000000);
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nvkm_wr32(device, GPC_UNIT(gpc, 0x0824), 0xc0000000);
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for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
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}
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nvkm_wr32(device, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
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nvkm_wr32(device, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
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}
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for (rop = 0; rop < gr->rop_nr; rop++) {
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nvkm_wr32(device, ROP_UNIT(rop, 0x144), 0xc0000000);
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nvkm_wr32(device, ROP_UNIT(rop, 0x070), 0xc0000000);
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nvkm_wr32(device, ROP_UNIT(rop, 0x204), 0xffffffff);
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nvkm_wr32(device, ROP_UNIT(rop, 0x208), 0xffffffff);
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}
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nvkm_wr32(device, 0x400108, 0xffffffff);
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nvkm_wr32(device, 0x400138, 0xffffffff);
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nvkm_wr32(device, 0x400118, 0xffffffff);
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nvkm_wr32(device, 0x400130, 0xffffffff);
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nvkm_wr32(device, 0x40011c, 0xffffffff);
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nvkm_wr32(device, 0x400134, 0xffffffff);
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nvkm_wr32(device, 0x400054, 0x34ce3464);
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gf100_gr_zbc_init(gr);
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return gf100_gr_init_ctxctl(gr);
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}
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#include "fuc/hubgk104.fuc3.h"
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static struct gf100_gr_ucode
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gk104_gr_fecs_ucode = {
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.code.data = gk104_grhub_code,
|
||
|
|
.code.size = sizeof(gk104_grhub_code),
|
||
|
|
.data.data = gk104_grhub_data,
|
||
|
|
.data.size = sizeof(gk104_grhub_data),
|
||
|
|
};
|
||
|
|
|
||
|
|
#include "fuc/gpcgk104.fuc3.h"
|
||
|
|
|
||
|
|
static struct gf100_gr_ucode
|
||
|
|
gk104_gr_gpccs_ucode = {
|
||
|
|
.code.data = gk104_grgpc_code,
|
||
|
|
.code.size = sizeof(gk104_grgpc_code),
|
||
|
|
.data.data = gk104_grgpc_data,
|
||
|
|
.data.size = sizeof(gk104_grgpc_data),
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct gf100_gr_func
|
||
|
|
gk104_gr = {
|
||
|
|
.init = gk104_gr_init,
|
||
|
|
.init_gpc_mmu = gf100_gr_init_gpc_mmu,
|
||
|
|
.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
|
||
|
|
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
|
||
|
|
.mmio = gk104_gr_pack_mmio,
|
||
|
|
.fecs.ucode = &gk104_gr_fecs_ucode,
|
||
|
|
.gpccs.ucode = &gk104_gr_gpccs_ucode,
|
||
|
|
.rops = gf100_gr_rops,
|
||
|
|
.ppc_nr = 1,
|
||
|
|
.grctx = &gk104_grctx,
|
||
|
|
.sclass = {
|
||
|
|
{ -1, -1, FERMI_TWOD_A },
|
||
|
|
{ -1, -1, KEPLER_INLINE_TO_MEMORY_A },
|
||
|
|
{ -1, -1, KEPLER_A, &gf100_fermi },
|
||
|
|
{ -1, -1, KEPLER_COMPUTE_A },
|
||
|
|
{}
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
int
|
||
|
|
gk104_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
|
||
|
|
{
|
||
|
|
return gf100_gr_new_(&gk104_gr, device, index, pgr);
|
||
|
|
}
|