253 lines
6.2 KiB
C
253 lines
6.2 KiB
C
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/*
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* DMA coherent memory allocation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* Copyright (C) 2002 - 2005 Tensilica Inc.
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* Copyright (C) 2015 Cadence Design Systems Inc.
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*
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* Based on version for i386.
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*
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* Chris Zankel <chris@zankel.net>
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* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
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*/
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#include <linux/dma-contiguous.h>
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#include <linux/gfp.h>
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#include <linux/highmem.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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static void do_cache_op(dma_addr_t dma_handle, size_t size,
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void (*fn)(unsigned long, unsigned long))
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{
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unsigned long off = dma_handle & (PAGE_SIZE - 1);
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unsigned long pfn = PFN_DOWN(dma_handle);
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struct page *page = pfn_to_page(pfn);
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if (!PageHighMem(page))
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fn((unsigned long)bus_to_virt(dma_handle), size);
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else
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while (size > 0) {
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size_t sz = min_t(size_t, size, PAGE_SIZE - off);
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void *vaddr = kmap_atomic(page);
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fn((unsigned long)vaddr + off, sz);
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kunmap_atomic(vaddr);
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off = 0;
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++page;
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size -= sz;
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}
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}
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static void xtensa_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_BIDIRECTIONAL:
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case DMA_FROM_DEVICE:
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do_cache_op(dma_handle, size, __invalidate_dcache_range);
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break;
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case DMA_NONE:
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BUG();
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break;
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default:
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break;
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}
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}
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static void xtensa_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_BIDIRECTIONAL:
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case DMA_TO_DEVICE:
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if (XCHAL_DCACHE_IS_WRITEBACK)
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do_cache_op(dma_handle, size, __flush_dcache_range);
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break;
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case DMA_NONE:
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BUG();
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break;
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default:
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break;
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}
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}
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static void xtensa_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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xtensa_sync_single_for_cpu(dev, sg_dma_address(s),
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sg_dma_len(s), dir);
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}
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}
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static void xtensa_sync_sg_for_device(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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xtensa_sync_single_for_device(dev, sg_dma_address(s),
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sg_dma_len(s), dir);
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}
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}
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/*
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* Note: We assume that the full memory space is always mapped to 'kseg'
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* Otherwise we have to use page attributes (not implemented).
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*/
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static void *xtensa_dma_alloc(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t flag,
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unsigned long attrs)
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{
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unsigned long ret;
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unsigned long uncached = 0;
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unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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struct page *page = NULL;
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/* ignore region speicifiers */
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flag &= ~(__GFP_DMA | __GFP_HIGHMEM);
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if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
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flag |= GFP_DMA;
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if (gfpflags_allow_blocking(flag))
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page = dma_alloc_from_contiguous(dev, count, get_order(size),
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flag);
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if (!page)
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page = alloc_pages(flag, get_order(size));
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if (!page)
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return NULL;
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ret = (unsigned long)page_address(page);
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/* We currently don't support coherent memory outside KSEG */
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BUG_ON(ret < XCHAL_KSEG_CACHED_VADDR ||
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ret > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1);
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uncached = ret + XCHAL_KSEG_BYPASS_VADDR - XCHAL_KSEG_CACHED_VADDR;
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*handle = virt_to_bus((void *)ret);
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__invalidate_dcache_range(ret, size);
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return (void *)uncached;
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}
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static void xtensa_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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unsigned long addr = (unsigned long)vaddr +
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XCHAL_KSEG_CACHED_VADDR - XCHAL_KSEG_BYPASS_VADDR;
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struct page *page = virt_to_page(addr);
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unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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BUG_ON(addr < XCHAL_KSEG_CACHED_VADDR ||
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addr > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1);
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if (!dma_release_from_contiguous(dev, page, count))
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__free_pages(page, get_order(size));
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}
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static dma_addr_t xtensa_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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dma_addr_t dma_handle = page_to_phys(page) + offset;
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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xtensa_sync_single_for_device(dev, dma_handle, size, dir);
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return dma_handle;
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}
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static void xtensa_unmap_page(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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xtensa_sync_single_for_cpu(dev, dma_handle, size, dir);
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}
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static int xtensa_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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s->dma_address = xtensa_map_page(dev, sg_page(s), s->offset,
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s->length, dir, attrs);
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}
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return nents;
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}
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static void xtensa_unmap_sg(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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xtensa_unmap_page(dev, sg_dma_address(s),
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sg_dma_len(s), dir, attrs);
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}
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}
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int xtensa_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return 0;
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}
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const struct dma_map_ops xtensa_dma_map_ops = {
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.alloc = xtensa_dma_alloc,
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.free = xtensa_dma_free,
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.map_page = xtensa_map_page,
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.unmap_page = xtensa_unmap_page,
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.map_sg = xtensa_map_sg,
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.unmap_sg = xtensa_unmap_sg,
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.sync_single_for_cpu = xtensa_sync_single_for_cpu,
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.sync_single_for_device = xtensa_sync_single_for_device,
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.sync_sg_for_cpu = xtensa_sync_sg_for_cpu,
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.sync_sg_for_device = xtensa_sync_sg_for_device,
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.mapping_error = xtensa_dma_mapping_error,
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};
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EXPORT_SYMBOL(xtensa_dma_map_ops);
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#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
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static int __init xtensa_dma_init(void)
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{
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dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
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return 0;
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}
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fs_initcall(xtensa_dma_init);
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