368 lines
8.3 KiB
C
368 lines
8.3 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_STRING_32_H
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#define _ASM_X86_STRING_32_H
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#ifdef __KERNEL__
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/* Let gcc decide whether to inline or use the out of line functions */
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#define __HAVE_ARCH_STRCPY
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extern char *strcpy(char *dest, const char *src);
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#define __HAVE_ARCH_STRNCPY
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extern char *strncpy(char *dest, const char *src, size_t count);
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#define __HAVE_ARCH_STRCAT
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extern char *strcat(char *dest, const char *src);
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#define __HAVE_ARCH_STRNCAT
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extern char *strncat(char *dest, const char *src, size_t count);
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#define __HAVE_ARCH_STRCMP
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extern int strcmp(const char *cs, const char *ct);
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#define __HAVE_ARCH_STRNCMP
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extern int strncmp(const char *cs, const char *ct, size_t count);
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#define __HAVE_ARCH_STRCHR
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extern char *strchr(const char *s, int c);
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#define __HAVE_ARCH_STRLEN
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extern size_t strlen(const char *s);
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static __always_inline void *__memcpy(void *to, const void *from, size_t n)
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{
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int d0, d1, d2;
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asm volatile("rep ; movsl\n\t"
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"movl %4,%%ecx\n\t"
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"andl $3,%%ecx\n\t"
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"jz 1f\n\t"
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"rep ; movsb\n\t"
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"1:"
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: "=&c" (d0), "=&D" (d1), "=&S" (d2)
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: "0" (n / 4), "g" (n), "1" ((long)to), "2" ((long)from)
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: "memory");
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return to;
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}
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/*
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* This looks ugly, but the compiler can optimize it totally,
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* as the count is constant.
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*/
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static __always_inline void *__constant_memcpy(void *to, const void *from,
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size_t n)
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{
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long esi, edi;
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if (!n)
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return to;
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switch (n) {
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case 1:
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*(char *)to = *(char *)from;
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return to;
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case 2:
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*(short *)to = *(short *)from;
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return to;
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case 4:
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*(int *)to = *(int *)from;
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return to;
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case 3:
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*(short *)to = *(short *)from;
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*((char *)to + 2) = *((char *)from + 2);
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return to;
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case 5:
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*(int *)to = *(int *)from;
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*((char *)to + 4) = *((char *)from + 4);
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return to;
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case 6:
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*(int *)to = *(int *)from;
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*((short *)to + 2) = *((short *)from + 2);
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return to;
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case 8:
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*(int *)to = *(int *)from;
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*((int *)to + 1) = *((int *)from + 1);
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return to;
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}
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esi = (long)from;
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edi = (long)to;
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if (n >= 5 * 4) {
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/* large block: use rep prefix */
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int ecx;
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asm volatile("rep ; movsl"
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: "=&c" (ecx), "=&D" (edi), "=&S" (esi)
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: "0" (n / 4), "1" (edi), "2" (esi)
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: "memory"
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);
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} else {
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/* small block: don't clobber ecx + smaller code */
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if (n >= 4 * 4)
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asm volatile("movsl"
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: "=&D"(edi), "=&S"(esi)
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: "0"(edi), "1"(esi)
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: "memory");
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if (n >= 3 * 4)
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asm volatile("movsl"
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: "=&D"(edi), "=&S"(esi)
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: "0"(edi), "1"(esi)
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: "memory");
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if (n >= 2 * 4)
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asm volatile("movsl"
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: "=&D"(edi), "=&S"(esi)
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: "0"(edi), "1"(esi)
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: "memory");
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if (n >= 1 * 4)
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asm volatile("movsl"
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: "=&D"(edi), "=&S"(esi)
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: "0"(edi), "1"(esi)
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: "memory");
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}
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switch (n % 4) {
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/* tail */
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case 0:
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return to;
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case 1:
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asm volatile("movsb"
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: "=&D"(edi), "=&S"(esi)
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: "0"(edi), "1"(esi)
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: "memory");
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return to;
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case 2:
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asm volatile("movsw"
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: "=&D"(edi), "=&S"(esi)
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: "0"(edi), "1"(esi)
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: "memory");
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return to;
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default:
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asm volatile("movsw\n\tmovsb"
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: "=&D"(edi), "=&S"(esi)
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: "0"(edi), "1"(esi)
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: "memory");
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return to;
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}
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}
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#define __HAVE_ARCH_MEMCPY
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extern void *memcpy(void *, const void *, size_t);
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#ifndef CONFIG_FORTIFY_SOURCE
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#ifdef CONFIG_X86_USE_3DNOW
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#include <asm/mmx.h>
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/*
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* This CPU favours 3DNow strongly (eg AMD Athlon)
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*/
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static inline void *__constant_memcpy3d(void *to, const void *from, size_t len)
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{
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if (len < 512)
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return __constant_memcpy(to, from, len);
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return _mmx_memcpy(to, from, len);
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}
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static inline void *__memcpy3d(void *to, const void *from, size_t len)
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{
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if (len < 512)
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return __memcpy(to, from, len);
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return _mmx_memcpy(to, from, len);
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}
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#define memcpy(t, f, n) \
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(__builtin_constant_p((n)) \
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? __constant_memcpy3d((t), (f), (n)) \
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: __memcpy3d((t), (f), (n)))
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#else
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/*
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* No 3D Now!
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*/
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#if (__GNUC__ >= 4)
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#define memcpy(t, f, n) __builtin_memcpy(t, f, n)
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#else
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#define memcpy(t, f, n) \
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(__builtin_constant_p((n)) \
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? __constant_memcpy((t), (f), (n)) \
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: __memcpy((t), (f), (n)))
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#endif
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#endif
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#endif /* !CONFIG_FORTIFY_SOURCE */
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#define __HAVE_ARCH_MEMMOVE
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void *memmove(void *dest, const void *src, size_t n);
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extern int memcmp(const void *, const void *, size_t);
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#ifndef CONFIG_FORTIFY_SOURCE
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#define memcmp __builtin_memcmp
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#endif
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#define __HAVE_ARCH_MEMCHR
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extern void *memchr(const void *cs, int c, size_t count);
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static inline void *__memset_generic(void *s, char c, size_t count)
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{
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int d0, d1;
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asm volatile("rep\n\t"
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"stosb"
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: "=&c" (d0), "=&D" (d1)
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: "a" (c), "1" (s), "0" (count)
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: "memory");
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return s;
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}
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/* we might want to write optimized versions of these later */
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#define __constant_count_memset(s, c, count) __memset_generic((s), (c), (count))
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/*
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* memset(x, 0, y) is a reasonably common thing to do, so we want to fill
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* things 32 bits at a time even when we don't know the size of the
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* area at compile-time..
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*/
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static __always_inline
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void *__constant_c_memset(void *s, unsigned long c, size_t count)
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{
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int d0, d1;
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asm volatile("rep ; stosl\n\t"
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"testb $2,%b3\n\t"
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"je 1f\n\t"
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"stosw\n"
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"1:\ttestb $1,%b3\n\t"
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"je 2f\n\t"
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"stosb\n"
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"2:"
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: "=&c" (d0), "=&D" (d1)
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: "a" (c), "q" (count), "0" (count/4), "1" ((long)s)
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: "memory");
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return s;
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}
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/* Added by Gertjan van Wingerde to make minix and sysv module work */
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#define __HAVE_ARCH_STRNLEN
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extern size_t strnlen(const char *s, size_t count);
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/* end of additional stuff */
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#define __HAVE_ARCH_STRSTR
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extern char *strstr(const char *cs, const char *ct);
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/*
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* This looks horribly ugly, but the compiler can optimize it totally,
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* as we by now know that both pattern and count is constant..
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*/
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static __always_inline
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void *__constant_c_and_count_memset(void *s, unsigned long pattern,
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size_t count)
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{
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switch (count) {
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case 0:
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return s;
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case 1:
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*(unsigned char *)s = pattern & 0xff;
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return s;
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case 2:
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*(unsigned short *)s = pattern & 0xffff;
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return s;
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case 3:
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*(unsigned short *)s = pattern & 0xffff;
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*((unsigned char *)s + 2) = pattern & 0xff;
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return s;
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case 4:
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*(unsigned long *)s = pattern;
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return s;
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}
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#define COMMON(x) \
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asm volatile("rep ; stosl" \
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x \
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: "=&c" (d0), "=&D" (d1) \
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: "a" (eax), "0" (count/4), "1" ((long)s) \
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: "memory")
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{
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int d0, d1;
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#if __GNUC__ == 4 && __GNUC_MINOR__ == 0
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/* Workaround for broken gcc 4.0 */
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register unsigned long eax asm("%eax") = pattern;
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#else
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unsigned long eax = pattern;
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#endif
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switch (count % 4) {
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case 0:
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COMMON("");
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return s;
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case 1:
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COMMON("\n\tstosb");
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return s;
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case 2:
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COMMON("\n\tstosw");
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return s;
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default:
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COMMON("\n\tstosw\n\tstosb");
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return s;
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}
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}
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#undef COMMON
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}
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#define __constant_c_x_memset(s, c, count) \
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(__builtin_constant_p(count) \
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? __constant_c_and_count_memset((s), (c), (count)) \
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: __constant_c_memset((s), (c), (count)))
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#define __memset(s, c, count) \
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(__builtin_constant_p(count) \
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? __constant_count_memset((s), (c), (count)) \
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: __memset_generic((s), (c), (count)))
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#define __HAVE_ARCH_MEMSET
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extern void *memset(void *, int, size_t);
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#ifndef CONFIG_FORTIFY_SOURCE
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#if (__GNUC__ >= 4)
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#define memset(s, c, count) __builtin_memset(s, c, count)
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#else
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#define memset(s, c, count) \
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(__builtin_constant_p(c) \
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? __constant_c_x_memset((s), (0x01010101UL * (unsigned char)(c)), \
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(count)) \
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: __memset((s), (c), (count)))
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#endif
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#endif /* !CONFIG_FORTIFY_SOURCE */
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#define __HAVE_ARCH_MEMSET16
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static inline void *memset16(uint16_t *s, uint16_t v, size_t n)
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{
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int d0, d1;
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asm volatile("rep\n\t"
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"stosw"
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: "=&c" (d0), "=&D" (d1)
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: "a" (v), "1" (s), "0" (n)
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: "memory");
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return s;
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}
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#define __HAVE_ARCH_MEMSET32
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static inline void *memset32(uint32_t *s, uint32_t v, size_t n)
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{
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int d0, d1;
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asm volatile("rep\n\t"
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"stosl"
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: "=&c" (d0), "=&D" (d1)
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: "a" (v), "1" (s), "0" (n)
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: "memory");
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return s;
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}
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/*
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* find the first occurrence of byte 'c', or 1 past the area if none
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*/
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#define __HAVE_ARCH_MEMSCAN
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extern void *memscan(void *addr, int c, size_t size);
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#endif /* __KERNEL__ */
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#endif /* _ASM_X86_STRING_32_H */
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