303 lines
7.8 KiB
C
303 lines
7.8 KiB
C
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/*
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* This file implements an irqchip for OPAL events. Whenever there is
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* an interrupt that is handled by OPAL we get passed a list of events
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* that Linux needs to do something about. These basically look like
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* interrupts to Linux so we implement an irqchip to handle them.
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*
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* Copyright Alistair Popple, IBM Corporation 2014.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/bitops.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqdomain.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/kthread.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/irq_work.h>
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#include <asm/machdep.h>
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#include <asm/opal.h>
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#include "powernv.h"
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/* Maximum number of events supported by OPAL firmware */
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#define MAX_NUM_EVENTS 64
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struct opal_event_irqchip {
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struct irq_chip irqchip;
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struct irq_domain *domain;
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unsigned long mask;
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};
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static struct opal_event_irqchip opal_event_irqchip;
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static unsigned int opal_irq_count;
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static unsigned int *opal_irqs;
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static void opal_handle_irq_work(struct irq_work *work);
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static u64 last_outstanding_events;
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static struct irq_work opal_event_irq_work = {
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.func = opal_handle_irq_work,
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};
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void opal_handle_events(uint64_t events)
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{
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int virq, hwirq = 0;
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u64 mask = opal_event_irqchip.mask;
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if (!in_irq() && (events & mask)) {
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last_outstanding_events = events;
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irq_work_queue(&opal_event_irq_work);
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return;
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}
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while (events & mask) {
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hwirq = fls64(events) - 1;
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if (BIT_ULL(hwirq) & mask) {
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virq = irq_find_mapping(opal_event_irqchip.domain,
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hwirq);
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if (virq)
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generic_handle_irq(virq);
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}
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events &= ~BIT_ULL(hwirq);
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}
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}
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static void opal_event_mask(struct irq_data *d)
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{
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clear_bit(d->hwirq, &opal_event_irqchip.mask);
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}
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static void opal_event_unmask(struct irq_data *d)
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{
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__be64 events;
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set_bit(d->hwirq, &opal_event_irqchip.mask);
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opal_poll_events(&events);
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last_outstanding_events = be64_to_cpu(events);
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/*
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* We can't just handle the events now with opal_handle_events().
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* If we did we would deadlock when opal_event_unmask() is called from
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* handle_level_irq() with the irq descriptor lock held, because
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* calling opal_handle_events() would call generic_handle_irq() and
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* then handle_level_irq() which would try to take the descriptor lock
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* again. Instead queue the events for later.
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*/
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if (last_outstanding_events & opal_event_irqchip.mask)
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/* Need to retrigger the interrupt */
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irq_work_queue(&opal_event_irq_work);
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}
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static int opal_event_set_type(struct irq_data *d, unsigned int flow_type)
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{
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/*
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* For now we only support level triggered events. The irq
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* handler will be called continuously until the event has
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* been cleared in OPAL.
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*/
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if (flow_type != IRQ_TYPE_LEVEL_HIGH)
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return -EINVAL;
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return 0;
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}
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static struct opal_event_irqchip opal_event_irqchip = {
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.irqchip = {
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.name = "OPAL EVT",
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.irq_mask = opal_event_mask,
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.irq_unmask = opal_event_unmask,
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.irq_set_type = opal_event_set_type,
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},
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.mask = 0,
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};
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static int opal_event_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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irq_set_chip_data(irq, &opal_event_irqchip);
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irq_set_chip_and_handler(irq, &opal_event_irqchip.irqchip,
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handle_level_irq);
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return 0;
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}
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static irqreturn_t opal_interrupt(int irq, void *data)
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{
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__be64 events;
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opal_handle_interrupt(virq_to_hw(irq), &events);
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opal_handle_events(be64_to_cpu(events));
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return IRQ_HANDLED;
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}
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static void opal_handle_irq_work(struct irq_work *work)
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{
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opal_handle_events(last_outstanding_events);
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}
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static int opal_event_match(struct irq_domain *h, struct device_node *node,
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enum irq_domain_bus_token bus_token)
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{
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return irq_domain_get_of_node(h) == node;
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}
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static int opal_event_xlate(struct irq_domain *h, struct device_node *np,
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const u32 *intspec, unsigned int intsize,
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irq_hw_number_t *out_hwirq, unsigned int *out_flags)
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{
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*out_hwirq = intspec[0];
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*out_flags = IRQ_TYPE_LEVEL_HIGH;
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return 0;
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}
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static const struct irq_domain_ops opal_event_domain_ops = {
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.match = opal_event_match,
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.map = opal_event_map,
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.xlate = opal_event_xlate,
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};
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void opal_event_shutdown(void)
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{
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unsigned int i;
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/* First free interrupts, which will also mask them */
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for (i = 0; i < opal_irq_count; i++) {
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if (!opal_irqs[i])
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continue;
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if (in_interrupt())
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disable_irq_nosync(opal_irqs[i]);
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else
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free_irq(opal_irqs[i], NULL);
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opal_irqs[i] = 0;
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}
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}
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int __init opal_event_init(void)
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{
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struct device_node *dn, *opal_node;
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const char **names;
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u32 *irqs;
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int i, rc;
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opal_node = of_find_node_by_path("/ibm,opal");
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if (!opal_node) {
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pr_warn("opal: Node not found\n");
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return -ENODEV;
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}
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/* If dn is NULL it means the domain won't be linked to a DT
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* node so therefore irq_of_parse_and_map(...) wont work. But
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* that shouldn't be problem because if we're running a
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* version of skiboot that doesn't have the dn then the
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* devices won't have the correct properties and will have to
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* fall back to the legacy method (opal_event_request(...))
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* anyway. */
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dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event");
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opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS,
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&opal_event_domain_ops, &opal_event_irqchip);
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of_node_put(dn);
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if (!opal_event_irqchip.domain) {
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pr_warn("opal: Unable to create irq domain\n");
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rc = -ENOMEM;
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goto out;
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}
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/* Get opal-interrupts property and names if present */
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rc = of_property_count_u32_elems(opal_node, "opal-interrupts");
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if (rc < 0)
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goto out;
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opal_irq_count = rc;
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pr_debug("Found %d interrupts reserved for OPAL\n", opal_irq_count);
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irqs = kcalloc(opal_irq_count, sizeof(*irqs), GFP_KERNEL);
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names = kcalloc(opal_irq_count, sizeof(*names), GFP_KERNEL);
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opal_irqs = kcalloc(opal_irq_count, sizeof(*opal_irqs), GFP_KERNEL);
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if (WARN_ON(!irqs || !names || !opal_irqs))
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goto out_free;
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rc = of_property_read_u32_array(opal_node, "opal-interrupts",
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irqs, opal_irq_count);
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if (rc < 0) {
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pr_err("Error %d reading opal-interrupts array\n", rc);
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goto out_free;
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}
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/* It's not an error for the names to be missing */
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of_property_read_string_array(opal_node, "opal-interrupts-names",
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names, opal_irq_count);
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/* Install interrupt handlers */
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for (i = 0; i < opal_irq_count; i++) {
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unsigned int virq;
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char *name;
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/* Get hardware and virtual IRQ */
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virq = irq_create_mapping(NULL, irqs[i]);
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if (!virq) {
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pr_warn("Failed to map irq 0x%x\n", irqs[i]);
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continue;
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}
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if (names[i] && strlen(names[i]))
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name = kasprintf(GFP_KERNEL, "opal-%s", names[i]);
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else
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name = kasprintf(GFP_KERNEL, "opal");
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/* Install interrupt handler */
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rc = request_irq(virq, opal_interrupt, IRQF_TRIGGER_LOW,
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name, NULL);
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if (rc) {
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irq_dispose_mapping(virq);
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pr_warn("Error %d requesting irq %d (0x%x)\n",
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rc, virq, irqs[i]);
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continue;
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}
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/* Cache IRQ */
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opal_irqs[i] = virq;
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}
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out_free:
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kfree(irqs);
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kfree(names);
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out:
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of_node_put(opal_node);
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return rc;
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}
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machine_arch_initcall(powernv, opal_event_init);
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/**
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* opal_event_request(unsigned int opal_event_nr) - Request an event
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* @opal_event_nr: the opal event number to request
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*
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* This routine can be used to find the linux virq number which can
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* then be passed to request_irq to assign a handler for a particular
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* opal event. This should only be used by legacy devices which don't
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* have proper device tree bindings. Most devices should use
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* irq_of_parse_and_map() instead.
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*/
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int opal_event_request(unsigned int opal_event_nr)
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{
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if (WARN_ON_ONCE(!opal_event_irqchip.domain))
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return 0;
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return irq_create_mapping(opal_event_irqchip.domain, opal_event_nr);
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}
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EXPORT_SYMBOL(opal_event_request);
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